JPS616688A - Musical sound generation system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention]

INDUSTRIAL APPLICATION FIELD The present invention relates to a musical tone generation system that can be used in electronic musical instruments and the like. Conventional configurations and their problems In recent years, the roles of musical tone generation systems used in electronic musical instruments have diversified, and in polyphonic musical tone generation systems that can independently generate multiple musical tones, it is necessary to use the same tone for all channels. , the same effect is not necessarily added and used, but the key range is divided during automatic performance or manual performance, and multiple sounding channels are divided to assign different tones or add different effects. It becomes necessary to do something. In conventional polyphonic musical sound generation systems for electronic musical instruments, even when adding effects such as vibrato and glide, they were often added to all thionels. In Japanese Patent Application No. 58-143015 "Note Clock Generator", a note clock generator that adds vibrato only to a specific channel is proposed, but it is not possible to add effects such as delay vibrato and key glide that are common to all channels. detects key-on in the channel that is
Since it did not have a function for initial setting, it had the disadvantage that there were restrictions on how to set channels to which effects were added. For example, when assigning two sound channels to one key-on and adding vibrato to one channel, the number of key-on information and the number of vibrato adding channels are the same, so at least one It is sufficient to start delay vibrato when key-on is detected, but if you divide the keyboard range into two and add vibrato only to the musical tones corresponding to one of the keys, the vibrato-off channel will start when key-on is detected. In a state where
There was an inconvenience that even if you turned on just one of the vibrato-on channels, the delay vibrato would not start. OBJECTS OF THE INVENTION An object of the present invention is to make it possible to add effects such as vibrato only to a specific channel in a polyphonic musical sound generation system, to detect key-on only on the channel to which the effect has been added, and to generate at least one To provide a musical tone generation system capable of controlling delay vibrato, etc. that starts when key-on is detected. Structure of the Invention The musical sound generation system of the present invention includes a sound generation control data generating means that independently generates sound generation control data for specifying the scale and five-tone timing of the generated musical sound for a plurality of channels, and independently specifies the on/off of vibrato for each channel. A vibrato enable data generating means for generating vibrato enable data to be added, and adding vibrato only to the channels for which the vibrato enable data is on, and at least one channel of the channels for which the vibrato enable data is on to generate sound. It has a function to start delay vibrato at the point when the above sound control data and vibrato enable are started.
It consists of a vibrato adding device that sends frequency data based on the data to a musical tone generating device, and a musical tone generating device that generates a musical tone with a pitch corresponding to the frequency data sent from the vibrato adding device, and is only available on specific channels. It is possible to add effects such as vibrato to the channel, and by detecting key-on only on the channel to which the effect is added, it is possible to control delay vibrato that starts when at least one key-on is detected. Description of Embodiments [1] Configuration of musical tone generation system FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention in which the musical tone generation system of the present invention is applied to an electronic musical instrument. The main microcomputer MμC (101) receives signals from input devices such as a keyboard (102) and a tab 0 switch (1'03), and controls a plurality of musical tone generation systems (10B-1 to 10B-4). The musical tone signals outputted from the musical tone generation system (108-1 to 108-4) are added by an adder (109), and the musical tone signals are added by an adder (109).
The sound is generated from the speaker (111) through the speaker (111). 4 Sub microcomputer SμC (104) C, sound generation control data SCD and tone selection data sent from the main microcomputer MμC (101)
Receiving data TSD etc., digital sound generator DSG (106), low pass filter L
PF (1o6) and amplitude modulation section AMS (1o7) are controlled. The DSG (105) independently generates eight channels of musical tones based on the sound generation control data SCD, timbre selection data TSD, etc. sent from the sub-microcomputer SμC (104). A digital sound generator DSG having such a function has been proposed in Japanese Patent Application No. 57-231482 titled "Music Sound Generator". The above musical tone generator sequentially reads two waveform data from the waveform memory, performs interpolation calculation, and passes the obtained output data through a digital-to-analog converter DAC.
It is configured to obtain analog musical sound output. However, the digital sound generator DSG (105) in the musical sound generation system of the present invention has functions such as generation of frequency data corresponding to musical scales, vibrato addition processing, glide addition processing, etc., and sub-processes the above processing.
This is performed by the microcomputer SμC (104), and the digital musical tone output in front of the digital-to-analog converter DAC is checked independently on each channel to perform all-O detection, and there is a chart indicating whether musical tone is being generated or not. channel state data CH8T to sub microcomputer Sμ
It has a function to send data to C (104). Furthermore, when the DSG (1os) receives a channel-independent fast damper request signal sent from the SμC (104), it has a function of attenuating the musical tone being generated in a short time. This fast damper function is DSG (10
This can be easily achieved by manipulating the envelope data in 5). Further, the signal FDP sent from the SμC (104) is ANDed with the inverted value KD of the key-on/off data KD of the corresponding channel, and the data K
When D is on, the first damper is not applied. [2] Sub-microcomputer “User Input Data Fist Format Figure 2 shows the main microcomputer MμC (1
01) to sub-microcomputer SμC(1
04) is a data transfer I10 map. 3-5 are data format diagrams of the data shown in FIG. 2. Sound control data SCD is note data NT
D, octave data OTD, and key data KD. OTD and NTD are sent to the digital sound generator DSG (105), which generates a musical tone with a basic pitch, timbre, and envelope corresponding to the note name. generated. Key #7/off data KD is sent to DSG (105) to control the start and end of sound generation. The pitch control data PCD is data that provides channel-independent pitch deviation from the basic pitch determined by the note data NTD and the octave data OTD. Level control data L CDu is data for setting the level of the musical tones to be sounded independently of the channels. The timbre selection data TSD is data that determines which memory area in the waveform data memory corresponds to the timbre to be selected.This data allows, for example, to select 16 types of timbres such as piano, guitar, etc. for each channel independently. can be selected. Vibrato enable data VEN is data that specifies on/off of vibrato for each channel. Glide enable data GE and N are data that independently specify glide on/off. Effect control data ECD includes delay vibrato, data DVIB that specifies on/off, and vibrato depth. vibrato depth data VDP that specifies the vibrato frequency in 4 levels, vibrato frequency data VFD that specifies the vibrato frequency in 4 levels, damper on/off data DMP that specifies damper on/off, and tremolo on/off. Specified tremolo on/off data TR
It is composed of M and data GL specifying on/off of glide. [3] Data transfer method Next, the main microcomputer MμC (10
1) to sub-microcomputer SμC (104)
The transfer method of data sent to is explained below. FIG. 6 is a block diagram of a data transfer device that implements the data transfer method used in the musical tone generation system of the present invention. The main microcomputer (201) transfers data to the sub microcomputer (203) via an 8-bit data bus DB. The data on the data bus is transferred to the main microcomputer MpC (2
The transfer flag TRF sent from 01) distinguishes between addresses and data, and determines the order of data. The reception and reception of data by the sub microcomputer SμC begins when the RS flip-flop (202) is sent by the interrupt request signal WR sent from the main microcomputer MpC.
The RS flip is triggered by the reset signal sent from T.
It ends with the flop (202) being reset. FIG. 7 is a functional block diagram of the data transfer device. Data transmission and placement (306) includes data generation means (301) for generating sound generation control data 5CD1 pitch competition control data PCD, etc.;
data output means (304) that sends the data generated by (301) to the data receiving device (312);
and a timer means (302) that controls the timing of data output by the data output means (3'04). and an interrupt request means (305) that sends an interrupt request signal to the SμC (312) when outputting data. The data receiving device (312) is a data transmitting device (3oe
) receives the interrupt request signal sent from the TRF input means (307), puts the data input means (308) into an interrupt processing state, and when the data input is completed, the interrupt control means (309) goes into an interrupt standby state, and the TRF input means (307). ) is sent from the data input means (30
8) and a data storage means (310) for distinguishing the data sent from and storing the data. The above data transfer device is configured as 8049 in Figure 6.
Figure 8 shows a flowchart of the program when it is realized on a microcomputer such as . It is shown in FIG. FIG. 8 is a flowchart showing the operation of the data transmitting device realized by MgO (201), and FIG.
(203) is a flow chart showing the operation of the data receiving device realized in step (203). There are two programs in the data transfer program for MgO (201), and FIG.
1) is a flow chart of a word transfer method in which one word of data is transferred to a specific address. In the case of the block transfer method shown in FIG. 8 (-), in advance,
Assume that 24 words of block data (SCD, PCD, LCD) are stored continuously in the memory on MgO (201). In the process (401), an address counter is set at the beginning of the block data area of the memory on the MgO (201), and in the process (402), the transfer flag TRF is set.
0# (“0# represents logic O”) and initializes. In the process (403), an interrupt request signal WR is output to the S pC (203), and then in the process (404) data ooH indicating that block transfer is to be started.
(H represents a hexadecimal number), and a flag indicating that the next data will be sent in the process (408) T RF =
By outputting "1"(--1# represents logical 1) and waiting for a certain period of time in the process (406), Sμ
C (203) suspends transmission of the next data until it becomes possible to receive and receive the next data. Next, in processing (407), data is read from the memory block data area on MgO (201), and processing (
At step 408), the data is sent to SμC (203), and at step (409), the memory address counter is incremented. Thereafter, for the same purpose as the above-mentioned process (406), in process (410), the process waits for a certain period of time. Processing (412)
Checks whether the address counter has incremented to the final address. For example, SCD, PCD
. If 8 words of data on the LCD are simultaneously transferred in blocks, the processes from (407) to (411) are repeated 24 times. In the case of word transfer method (in Figure 8) 1. Processing (413)
Set the address data to be output with and process (414
), the flag TRF-” indicating sending of address data is set.
O'' is output, the interrupt request signal WR is output to SμC (203) in process (415), the address data is output in process (41e), and the above process (406) is output in process (417). For the same purpose, wait for a certain period of time. Next, flag T RF = "1" indicating that data is to be sent.
Outputs the interrupt request signal WR in processing (419), outputs data in processing (420), and outputs the data in processing (421).
Then, the process waits for a certain period of time for the same purpose as the process (406) described above. Figure 9 shows that MgO(,201) sends data to S
A flowchart of the interrupt routine when receiving is shown in μC (203). By interrupt request signal WR from MgO (201),
When entering the interrupt routine, data is first input in processing (501), and in processing (502) it is checked whether the input data is 00H or not, and if it is OOH, it is determined that block transfer will be started, and processing is started. (504) is executed, and if it is not ○oH, it is determined that a word transfer is to be performed, and processing (515) is executed. In the case of block transfer, the process (504) initializes the address counters of the SCD, PCD, and LCD memories in which data is to be stored. Incidentally, a memory map of the memory in the SμC (203) is shown in FIG. The data format of the data described here is the same as the data format explained in FIG. 4 from addresses 20H to 3FH. Next, in the process (505), wait at the trench where the flag TRF changes from ``O'' to 1'', and then in the process (soe),
Data is input and stored in the memory shown in FIG. 10 in a process (507). Next, in the process (SOa), address e
After incrementing the counter and waiting until the flag TRF is inverted in step 509, the address counter is incremented and it is checked whether the address counter exceeds the last address. After checking whether the counter is 38H or not, processing (505) or processing (514) is executed. When the address counter is not 38H, again (505
) to (612) are repeated, and when the address counter reaches 38H, in the process (514), the interlaced flip-flop (RS flip-flop in FIG.
202)) is output, and the process ends. In the case of word transfer, in the process (616), the process (5
01), use the input data as address data,
After saving and waiting for flag TRF to be inverted in process (516), data is input in process (s17), and in process (618), data is input based on the address data saved in process (515). The data is stored in the memory, and finally, in step 519, the included flip-flop is reset. Figure 11 (-) shows the range from MBC (201) to SμC (20
FIG. 11 (1) is a timing chart when performing block transfer to 3), and FIG. 11 (1) is a timing chart when performing word transfer. Note that the signal names in the figure match the signal names in FIG. 6. In Figure 11 (-), from MgO (201) to SμC
When the interrupt request signal WR is sent to (203), SμC (203) enters the interrupt process, checks the data OoH on the DB bus, determines that it is a block transfer, and sets the transfer flag TRFO value. As a child, I received data one by one, from data 5 CDO to data LCD 7.
When all four pieces of data are received, the RS flip-flop (202) is reset by the signal RST and enters an interrupt standby state. Note that the signal INT is connected to an RS flip-flop (2,02
) is an interrupt request signal sent from Sμc (203), and is held in a state where it is reset by signal R8T. In FIG. 11 (with), MgO (201) sends an interrupt request signal WR to SμC (203), and then
Send address ADH via DB bus and set flag TR
After F is inverted, data DATA is S/1c (203)
Send to. When the SμC (203) receives the data DATA, it resets the RS flip-flop (202) and returns to normal processing. Block transfer and word transfer are performed at the timings described above. Note that M/1G (1
01) to SμC (104) is a data SCD with a large number of words and a high transfer frequency. PCD, LCD, etc. use block transfer, and data TSD and EFT have a small number of words and have low transfer frequency. VBE and the like use word transfer. In other words, block transfer, which does not require address transfer, is advantageous when transferring a large amount of data at the same time, and word transfer is advantageous when transferring a small number of data at discrete timing. By using different transfer methods depending on the data to be transferred,
0 [4] Sub-microcomputer processing The sub-microcomputer SμC (104) transfers the sound generation control data SCD to the digital sound generator DSG (1OS). Sending timing control, control when switching tone select data TSD,
Based on the data SCD, processing for creating frequency data FQD corresponding to the fundamental frequency, control of delay vibrato, tremolo addition processing, glide addition processing, and output processing of various data to DSG (1 os) are performed. [5] Digital Sound Generator Input/Output Data Format FIG. 12 is an I10 map showing the input/output format of data between the SμC (104) and the DSG (105). I1
The channel state data at address 44H is D
Data indicating that SG (1o5) is generating sound, independently of the channel, is transmitted from DSG (1o6) to SμC (
104). All other data are SμC (
104) to DSCi (1o5). The sound generation control data SCD is exactly the same as the data formant diagram shown in FIG. 3 when data is transferred from MgO (101) to 571C (104). The level control data LCD1 timbre selection data TSD and envelope data ENV are the same as the data format when transferred from MgO (101) to SμC (104) shown in FIG. FIG. 13(a) to (C) are S p C (104) to D
This is the data format of frequency data FQD sent to SG (105). Data FQD consists of 8 independent channels of data with 1 word consisting of 13 bits9.
The lower 8 pins and upper 5 bits are transferred sequentially, and the DS
G (105) outputs a musical tone signal with a period corresponding to the value of this data FQD. Figure 13 ('d1) and (d2) show damper on/
13 (el) and (e2) show the data format of the first damper data FDP, and the data format of the data FDP is shown.
DP is data that independently requests a fast damper for the 8 sound generation channels that are generated by the DSG (105). When a fast damper is requested from SμC (104) for a certain channel of DSG (105), if that channel is generating sound, DSG (105)
05) attenuates the musical tone in a shorter time than normal musical tone attenuation.0 The shorter the decay time of the first damper, the faster the next new musical tone will be generated, but if it is too short, it will cause a click. Since you can hear it, you need to set it at an appropriate time. FIGS. 13(fl) and (f2) are data formant diagrams of the above-mentioned channel state data CH3T. (6) Allocation processing Sμ of sound production control data
The control of the sending timing of the sound generation control data SCD from the C (104) to the DSG (105) will be described below. FIG. 14 shows the M/iC (1o1) in FIG. FIG. 3 is a functional block diagram in which S p C (104) and D S G (105) are viewed as one system for controlling sound production. The SCD generator (601) actually generates MμC (10
1) This is a generation device for generating sound control data SCD, which is realized by the above software. The sound generation control device (soo) is realized by software on the S/JC (104) and is a means for controlling the allocation timing of the data SCD, and is a musical sound generation device (6o4).
corresponds to DSG (105). The sound generation control device (600) is an SCD generator (6o1)
receives the data SCD sent out from the musical tone generating device (604), looks at the channel state data CH8T sent out from the musical tone generating device (604), and sends the data SCD to the musical tone generating device (604).
04), and if the corresponding channel of the musical tone generator (604) is generating sound, the first damper request means (603) requests the first damper to the corresponding channel. FIG. 15 is a detailed functional block diagram showing the functions of the sound generation control device (600). The data SCD generated by the SCD generator (601)
is transferred using the block transfer method described in the section of the data transfer method above, and is stored in the SCD storage means (606). Data stored in SCD storage means SCD
is transferred to the assignment flag generating means (607). The assignment flag generation means (607) stores the data SCD from the SCD storage means (eoe),
It has a function to turn on the assignment flag when the data SCD changes. This assignment flag is
This flag requests the CD output means (609) to output data SCD, and is reset in the SCD output means when new data SCD is output. As shown in FIG. 3, the sound production control data SCD includes rate data NTD and octave data O.
It is composed of TD and key on/off data KD. Data NTD and data ○TD determine the basic pitch, timbre, and basic envelope of the musical tone to be sounded, and data KD determines the start and end timing of sound generation. Control. However, if the data SCD with the data KD turned off is a musical tone generator (6
04), the sound generation does not end immediately, and the output of musical tones becomes zero after passing through a specific release section. The KD determination means (605) is the SCD storage means (eoe).
Turning on/off the data KD in the data SCD stored in
Determine off. The CH8T determining means (610) receives the channel state data CH3T sent from the musical tone generator (e, o4), and determines the first state data when the assign flag is on and output of new data SCD is requested. The damper requesting means (603) is controlled to request a first damper from the musical tone generating device (604). The SCD output means (609) is the KD determination means (606)
, the SCD storage means (606) based on the signals from the assignment flag generation means (607) and the CH8T determination means.
) is stored in the musical tone generator (6).
04) and at the same time controls the first damper request means (eos) to reset the first damper request. At the same time, the C3CD (currently 5CD) storage means (eos) has a function of storing the same data as the output data SCD. Further, the SCD output means outputs data SCD when a signal indicating key-on is sent from the KD determination means (605).
It has a function of resetting and outputting the data KD of the current SCD data C3CD stored in the C8CD storage means before outputting the data. In other words, key-off processing is always performed before data SCD is output in response to key-on. Therefore, even if a different key-on data SCD is sent from the SCD generator, key-off processing is performed once and then a new key-on data SCD is sent to the tone generator (604). . FIG. 16 is a flowchart of a program when the function of the sound production control device (eoo) is realized using a microcomputer such as Intel 8049. In the sound production control process, the internal memory of the microcomputer is used as a variable area. Figure 10 shows the sub-
The memory map of the microcomputer SμC (104) is shown. In FIG. 10, addresses 20H to aFH
The content of the data up to is MpC (101) in Figures 3 to 5.
) and S p C (104), so the explanation will be omitted here. The assignment flag ASN is a flag that is set when the sound generation control data SCD transferred from the MμC (101) changes, and is reset when the assignment of the data SCD is completed, and is a flag for 8 channels. have an area. The old sound generation control data 08CD is a memory for realizing the function of the above-mentioned assign flag generating means (607), and the assign flag generating means (6or) is
Data SC stored in the SCD storage means (6o6)
D and the data 08CD (old 5CD) in the 03CD memory are compared, and if they are different, the assign flag ASN is set, and then the 08CD memory is rewritten with the new data SCD. The C3CD (currently 5C1) memory is connected to the SCD output means (6
09) to the musical tone generator (604), and is rewritten simultaneously with the output of the data SCD from the SCD output means (609). Next, the flowchart shown in FIG. 16 will be explained. This flowchart shows one channel of basic processing for timing control of data SCD allocation. Processing (Too) is the assignment flag ASN on memory.
This is a process that determines whether it is on or off by looking at the
), the SCD key-on/off data KD is checked, and if the key is off, the data SCD is output as is, and if the key is on, SCD key-off processing is performed in step (702). SCD key-off processing is performed by C3CD (currently SCD
Data) Data C8CD is read from the memory, data with cleared data KD is output, and key-off processing is performed. With this process, the key-off process is always performed when the key-on data SCD is output, that is, before the sound corresponding to the new data SCD is generated. Therefore, different key-on data SCD
Even if S is sent continuously from MμC (101), there will always be a key-off process in between, and new data S
Every time a CD is output, it is recognized as new pronunciation information in DSG (1oes). The process (703) checks the channel state data CH8T sent from the DSG (1o6), and if the data CH8T is on (sounding), the process (-roc
In a), set the first damper data FDP, and if data CH3T is off, process (704)
Then, data FDP is cleared, and data SCD is output in a process (705). Next, in processing (-ro6)
Data SC output in processing (end 05) to 3CD memory
Write D, and in process (707) assign φ flag A
Clears SN to indicate that data SCD allocation is complete. In the process (708), the process (704). The data pFDP operated in (709) is transferred to DSG (105).
). Figure 18 shows the DSG (
1 is a timing chart showing input/output of 1oes). Figure 18(a) shows Sμc(104) to DSG(1
Figure 18(b) shows the output to SμC (104
) is shown. KD in FIG. 18 (-) is the key-on/
It represents off data KD, and FDP represents first damper data FDP. Figure 8(b) oAout is DSG(105)(7)
It represents the amplitude of the analog musical tone output signal, and CH3T
represents channel state data CH3T indicating that sound is being generated. In FIG. 18, data KD rises at time (SOO), and signal AOUT also rises accordingly. Next, at time (8o1), when data KD falls, signal AOUT enters the release section and attenuates. In this state, the first damper data FDP is turned on from SμC (104) in order to allocate the next data SCD. The signal AOUT then enters a faster damping state than the I717-state, ie, fast damper mode. After that, at time (802), signal AOUT becomes zero and data CH3T turns off, and S□C (104) sends new data SCD at time (803) T, and then resets data FDP at time (SO4). It's coming. This allocation of new data SCD and resetting of data FDP cannot be performed simultaneously if a serial processing microcomputer is used. Also, if the FDP off data is done before the data SCD allocation, it will be necessary to send the data FDP every time for each channel, so in order to speed up the program,
8 channels of FDP off data transmission
This is done after the CD has finished playing, and in the (5oes) section, the F
DP! : The signal FDR obtained by ANDing KD is used inside the DSG (1o6) as a fast damper request signal. The above-described processing is performed independently for the 8 channels to realize control of the data SCD allocation timing independently of the channels. When the above-described sound generation control processing is performed on the SμC (104), there are the following advantages. ■ The sound generation control data SCD is SμC (10
4) In the above, the note is once held and then transferred to the digital sound generator DSG (105) at a predetermined timing. Processing becomes easier. ■ In SμC ('104), when assigning new data SCD to a channel that is currently producing sound, a fast damper request is made to the corresponding channel to quickly attenuate the musical tone being produced, and the end of the sound is confirmed. Since the new data SCD is then assigned, new pronunciation can be performed in the shortest possible time without causing click noise. [7] Forced mute processing The forced mute flag generator (611)
When data TSD is switched or when the musical tone generation system itself is reset, a forced mute flag is generated to quickly attenuate the musical tone being generated in the musical tone generating device (604). In FIG. 16, the forced silencing control means (612) in the sound generation control device (eoo) receives the forced silencing flag, and the SC
The D output means (6゛09) is the 0SCD storage means (eos
) is controlled to reset and output the data KD of the data C8CD stored in the data C8CD, and is also controlled to unconditionally send a first damper request signal to the first damper request means (eoa). It has the function of FIG. 17 is a flowchart of a program on the sound generation control device (60Q) of FIG. 16 with a forced mute function added. Note that the sound generation control data SCD shown in FIG. 3 is used for the signal specifying forced silencing sent from MgO (1o1), and the forced silencing mode is defined when data 5CD=00H. In FIG. 17, data 5CD-0 in processing (VlO)
It is determined whether the data is 0H or not, and if the data is SCD\00H, normal SCD allocation processing is performed, while data 5CD=o
If it's oH, then! (711), the first damper
Set the corresponding bit of data FDP and process (71
In step 2), key-off processing for the data SCD is performed. This key-off process is similar to the key-off process in step (702). The above silencing process is performed using MgO(1o1).
This is realized by a forced mute request signal (data 5CD-ooH) from the 1000A, and the musical tone can be smoothly extinguished when switching timbres or when the system is set. Note that forced muting when changing tones, etc., is performed using SμC.
In step (104), a memory for storing timbre selection data TSD may be provided, and by comparing the old and new data TSD, forced muting processing may be entered. [8] Vibrato addition processing The vibrato addition processing performed in SμC (104) will be explained. The vibrato addition process in the musical sound generation system of the present invention is capable of adding a vibrato effect only to a specific channel, and detects key-on only in the channel to which the effect is added, and detects at least one key-on. Sometimes it starts a delay vibrato. The vibrato addition process is performed using the software on SμC (104).
This is a function realized by software. FIG. 19 shows SμC (104) with vibrato. Addition
It is a functional block diagram when viewed as one device having the function. The vibrato adding device (903) is S p C (104
) is a device with a vibrato addition function realized by the software above, and includes an SCD generating means (900), vE
N, DvIB generation means (9o1) is M/1C (101
), and the musical tone generator (915) corresponds to the DSG (105) in FIG. 1. The SCD generation means (900) has a function of generating sound generation control data SCD, and has the function of generating sound generation control data SCD. The DVIB generating means (901) has the function of setting the delay vibrato on/off data DVIB in the end effect control data ECD explained in FIG.
It has the function of setting the vibrato enable data VEN explained in the figure and specifying which channel out of eight channels is to be turned on with vibrato. These functions are all based on MμC (1Q1
) is realized by the software above. The vibrato adding device (903) is a device realized by software on the SμC (104), and the SCD storage means (905) and the VEN and DVIB storage means (908) are transferred from the M/JC (101). This corresponds to a memory that stores data, and corresponds to the memory shown in the memory map of FIG. The on-key data generation unit (906) looks at the key-on/off data KD in the data SCD stored in the SCD storage means (905) and determines which channel is key-on among the eight channels. On-key data ○NK shown is generated. The key-on start flag KO8 generation unit (907) generates data ONK and VEN generated by the ONK generation unit (906), and vibrato enable data VEN (FIG. 4) stored in the DVIB storage unit (908). d)
), perform a logical product for each channel, and determine whether all channels become zero. That is, it is determined whether or not there is a key-on channel among the vibrato-on channels, and the flag is set as a start flag for delay vibrato addition common to all channels. The vibrato data reading means (910) uses a vibrato address counter (911) whose address update timing is controlled by a timer means (913).
), it has a function of reading vibrato data from the vibrato data memory (909) in which the vibrato data is stored. FIG. 20 is an example of vibrato data stored in the vibrato data memory (909). The horizontal axis shows memory addresses, and the vertical axis shows data values. This vibrato data stores seven delay vibrato waveforms as PCM data, and one waveform consists of 64 samples, and the last 64 samples (maximum amplitude sine wave) are normal vibrato data. Read when in mode. In addition, the key on-start signal sent from the KO3 generation section
Flag KO3 is turned on and VEN. Data D stored in the DVIB storage means (90B)
When VIB is on, vibrato reading means (910
) has a function of sequentially reading delayed vibrato waveforms from the first address of the vibrato data memory. At this time, the address counter (912) from Dv is
It is updated by the overflow of the address counter (911) every 64 counts from Dv, and is used when reading the delay vibrato waveform. The output data of the vibrato data reading means (910) is added to the basic pitch data sent from the basic pitch data generating means (904) in the adding means (914) to form logarithmic pitch data, and the EXP converting means ( 915) and the musical tone generator (916)
) is sent. The basic pitch data generation means (90
4) is based on the note data NTD in the data SCD stored in the SCD storage means (905), and calculates the basic pitch corresponding to any pitch from note C to note B.
It has the function of generating data. On the other hand, the frequency corresponding to the octave data OTD in the SCD is controlled by changing the number of samples in one period, as shown in FIG. Further, the frequency data FQD generated by the index conversion means (914) is sent to the musical tone generator (916) in a format as shown in the Ilo map of FIG. Figures 21 to 23 show the above vibrato addition process
It is a flowchart of a program when realized by software Φ on μC (104). The vibrato addition process is divided into a process of changing the vibrato data read address at fixed time intervals using a timer, and a process of starting a delay vibrato and reading the vibrato data asynchronously. FIG. 21 is a flow chart of a program for starting delay vibrato and reading vibrato data. First, in a process (920), vibrato frequency data VtD in the effect control data ECD shown in FIG. 5 is checked, and timer data CYOLE corresponding thereto is set. This timer data CYOLE is data that defines the processing interval of a routine whose processing timing is managed by a timer, and the speed of the vibrato is determined by this data. In the process (921), check the delay vibrato on/off data DVIB in the data ECD, and if it is off,
In the process (935), the delay vibrato address fist counter DCOUNT is set to 6. The vibrato data read address VADR is the delay vibrato address counter DCO mentioned above.
UNT and Big 2 Address Fist Counter VCOU
NT is calculated as follows: 0 VADR=DCOUNT -64+VCOUNT・-
... = ... (1) In the process (921), the data DVI
When B is determined to be on, in a process (922), the logical product of vibrato enable data VEN and on-key data ONK shown in FIG. 4 is calculated. The on-key data ONK has a data format as shown in FIG.
This data is composed of 8 channels of key switch on/off data KD in the data SCD output to 4), and corresponds to channels 0 to 7.
Figure 25 shows the contents of the data KD above.
2 is a flowchart of a program incorporating data ONK generation processing. In processing (713) and (715), the bit of on-key data ONK corresponding to the channel currently being processed is cleared, and in processing (714), the bit of data ONK corresponding to the channel currently being processed is set. . Here, we will return to the explanation of the flow chart of the vibrato addition processing program in FIG. 21. In the process (922), if the result of logical product of data vEN and data ONK is set as key-on start flag KO8, when all channels are key-off among the channels whose vibrato is turned on, flag KO8 is set as follows. OOH when at least one channel is key-on
do not become. In this example, the data K of the channel where vibrato is on is
Only when D changes from all 0 to something other than all 0, processing is executed to enter delay vibrato mode. In the process (923), if it is determined that the flag is KoS or 00H, the delay vibrato start flag DST is cleared in the process (934), and if it is determined that it is on,
In processing (925), counter DCOUNT is cleared, in processing (926), counter VCOUNT is cleared, and in processing (927), flag DST is inverted. FIG. 26 is a timing chart showing the above-mentioned delay vibrato start processing. Key on start flag KO8 is time (1020
) changes from 00H to anything other than 00)
DCOUNT, VCOUNT are set to IJ7, and at the same time the delay vibrato start flag D
ST is set at time (1021). Next, time (1
022) When the odor flag KO3 becomes oo)(, the flag DST is cleared at time (1023). In other words, once one channel is key-on and the delay vibrato starts, subsequent key-on In contrast, delay vibrato does not start, and once all channels are key-off, delay vibrato starts for a new first key-on.
928) The following is a routine for reading vibrato data. When the delay vibrato address counter is 00 in the process (928), the vibrato data is set to 0 in the process (933). In this embodiment, a delay vibrato waveform as shown in Fig. 20 is read out, but since the output data for addresses 0 to 63 is always 0, it is not stored in the memory. Instead of reading 0 data, set the vibrato data to 0 in advance. This not only increases the processing speed, but also allows the portion of addresses 0 to 63 to be used for program memory and the like. The process (929) is a process to calculate the vibrato data address, and the calculation as shown in equation (1) is executed to obtain the read address VADR, and the process (930)
The vibrato data is read out based on the address data VADR. Processing (931) is a part that controls the amplitude of the read vibrato data, and performs conversion according to the vibrato denopus data VDP shown in FIG. 5. This process is achieved by repeatedly using bit shifts and additions, and without multiplication, the amplitude is %, 9A.
, 3A of vibrato data can be easily obtained.0 The resulting vibrato data undergoes processing (9
32), it is added to the basic pitch data. Also, as mentioned above, delay vibrato on/off
When the data DVIB is off, the process (935) is executed and the counter DCOUNT is set to 6, so that the last waveform in FIG. 20 is always read out. Figure 22 shows the vibrato address counter VCOUN
T, delay vibrato address counter DCO
3 is a flow chart showing a process for periodically updating UNT. Here, the sub-e routine yTIMER (1oos) is
It is executed periodically by a timer as shown in the flow chart of FIG. In FIG. 23, SμC
Various initial settings related to (104) are performed. Next, in process (1001), various processes such as data SCD allocation are performed, and in process (1002), the timer flag is referred to to see if the timer has overflowed. When the timer flag is turned on, subroutine T(
MER(℃oa) is executed and in this subroutine,
Initial settings of the timer are performed. By repeating this process, the subroutine TIMER (1o03
) is executed periodically. In FIG. 22, in the process (1004), the timer data CYOLE explained in the process (920) in FIG.
), increment the counter vCoUNT and process (
1006), it is determined whether the counter VCOUNT has reached 64, and if the counter VcCOUNT = s4,
Processing (1007) Clear f counter vCOUNT,
In the process (1009), it is determined whether the counter DCOUNT is 6 or not, and if it is 46, the counter DCOUNT is incremented in the process (1010). In other words, the counter DCOUNT is initialized as counter DCOUNT=OK in the asynchronous routine explained in FIG.
It is incremented until NT=e. In addition, the counter VCOUNT is incremented every time in the subroutine TIMEH, and the counter VCOUNT = e
When it reaches 4, the counter returns to vCOUNT-0. Through the above processing, the function of the vibrato adding device is realized on the SμC (104).

[9] Tremolo control processing FIG. 27 is a functional block diagram when a tremolo control function that can be synchronized with vibrato is realized by software on the S p C (104). The TRM generation means (1030) is a function realized by software on the MgO (101), and generates tremolo on/off data TRM (E
on the CD). The tremolo control means (1032) receives and stores the data TRM sent out from the TRM generation means (1030).
) and data SC sent from the SCD generation means (1031) realized by software on MgO (101).
SCD storage means (1035) for storing D, ○NK generation means (1038) for generating on-key data ONK based on the stored data SCD, and data ONK
KO that generates a key-on start flag KO8
The S generation unit (1034) and the f-ta TRM generate the tremolo flag TMF under the control of the timer means (1037) at tycD, and the timing at which the flag KO8 changes from OOH to arrow 00H. The TMF generation means has a function of initializing the tremolo flag TMF. The tremolo adding means (1040) is a low-pass filter L P F (1
041) and a voltage-controlled amplifier VCA (1042) that controls the amplitude of the analog musical tone output from the musical tone generator (1044) according to the output signal of the LPFC7). The output from
A musical sound reproduction device (1) consisting of an amplifier, speakers, etc.
043) is pronounced. Timer means (1037) of tremolo control means (1032)
) KO8 generation means (1034), ONK generation means (10
3B) Tremolo synchronized with vibrato can be obtained by sharing the SCD storage means (1035) etc. with the above-mentioned vibrato adding device (903) (Fig. 19). (
104) The flow of processing when realized using the above software is shown in the flow chart of FIG. Most of the processing has been explained in the section on vibrato addition processing, so only the differences will be explained. Vibrato address counter V in processing (1ooe)
Subroutine that generates tremolo flag TRF when COUNT reaches 64 f y TRMSET (1oo8)
Execute. When the counter VCOUNT does not reach 64, the tremolo on/off data TRM is referred to in the process (1011), and if the data TRM is on, the process (1012)
It is determined whether the counter VCOUNT=32 or not, and if the counter VCOUNT=32, the subroutine TR
Execute MSET (1013). In other words, when the data TRM is on, the counter VCO
UNT=32 and U callan 1VCOUNT=-64(
7) When subroutine TRMSET (1014)
is expected. ' Subroutine TRMSET (1014) is executed when data TRM is off or counter DCOUNT=O
It has a function of always turning on the flag TMF when the data TRM is on, and inverting the flag TMF when the data TRM is on. In the process (1015), the data TRM is determined,
If it is off, unconditionally turns on the flag TMF,
If it is on, the counter DCO is set in processing (1o16).
Determine whether UNT=o or not, and if it is 0, process (1019)
Execute, and if it is not 0, in the process (1017'),
Check the on/off of the tremolo flag TMF and set the flag T.
If MF is on, flag TMF is turned off in process (1018), and if flag TMF is off, process (1019)
turns on the flag TMF and outputs it. FIG. 28 is a timing chart showing the timing of tremolo control processing. The tremolo flag TMF is always on when the tremolo on/off data TRM is off, and when the data TRM is turned on, the flag TMF is inverted every % period of the vibrato waveform VIB. Key-on start flag KO5 changes from ooH to “xH”
When it becomes ooH, the flag TMF starts from the on state. At the same time, delay vibrato starts. LPFOUT indicates the output signal of the LPF (1041), which is the output obtained by filtering the flag TMF. This LPFOUT controls the VCA (1042) and applies tremolo. Effects of the Invention As is clear from the above description, the musical sound generation system of the present invention includes a sound generation control data generating means for independently generating sound sound control data for multiple channels specifying the scale and sound generation timing of the generated musical sound, and a vibrato sound generating system. A vibrato enable data generation means that generates vibrato enable data that specifies on/off independently of each channel, adds vibrato only to channels for which vibrato enable data is on, and adds vibrato to channels for which vibrato enable data is on. a vibrato adding device that has a function of starting delay vibrato when at least one of the channels starts producing sound, and sends frequency data based on the sound production control data and vibrato enable data to the musical tone generator; It consists of a musical tone generator that generates a musical tone with a pitch corresponding to the frequency data sent out from the vibrato adding device, so it is possible to add effects such as vibrato only to a specific channel, and the effect is not added. It is possible to control such things as delay vibrato that starts when at least one key-on is detected by detecting key-on only on the channel that is currently playing.For example, all sounding channels can be divided into two corresponding to the key range. Then, turn on vibrato in one key range, turn off vibrato in the other key range, and start delay vibrato in response to key-on in the key range where vibrato is on. This allows for a wide variety of performances, such as playing a melody line in a key range with delay vibrato added, and chord backing in a key range with vibrato off. Furthermore, unsampled performance is possible by changing the tone color using the two divided channels. Furthermore, by using this function in automatic performance mode and freely changing the channels that apply effects such as vibrato, the expression can be expanded. Also, the effects added here are not limited to delay vibrato, but also key glide, touch,
Anything related to key-on, such as a response, can be used.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a musical tone generation system according to an embodiment of the present invention, and FIG. 2 is an I/O diagram between a main microcomputer MμC and a sub-Φ microcomputer SμC.
lo map, Figures 3 to 5 are format diagrams of data transferred between MμC and SμC, Figure 6 is a block diagram of the data transfer device, Figure 7 is a functional block diagram of the data transfer device, and Figure 8 is a diagram of the data transfer device. 9 is a flow chart showing the processing of the data receiving device, FIG. 10 is the memory map of the memory in the SμC, and FIG. 11 is the timing diagram of the data transfer device. Chart, Figure 12 is the I10 map between SμC and DSG, 1st
Figure 3 shows SμC,! : A format diagram of data transferred between DSGs, FIGS. 14 and 15 are functional block diagrams of the sound generation control device, and FIG. 16. FIG. 17 is a flow chart showing the processing of the sound generation control device, and FIG. 18 is a flow chart showing the processing of the digital sound generator D.
Timing chart showing SG input/output, Figure 19 is a functional block diagram of the vibrato adding device, Figure 20 is a graph showing the contents of the vibrato data memo diagram, and Figures 21 to 23 are the vibrato adding device and tremolo. A flow chart showing the processing of the control means, FIG. 24 is a format diagram of on-key data,
FIG. 25 is a flowchart showing the on-key data generation process, FIG. 26 is a timing chart of the vibrato adding device, FIG. 27 is a functional block diagram of the tremolo control means, and FIG. 28 is a timing chart showing the tremolo control process. It is a chart. 101... Main microcomputer, 1
04...Sub-e microcomputer, 1o5
...Digital sound generator, 1
07... Amplitude modulation unit, 600... Sound generation control device, 601... SCD generator, 602
... SCD allocation means, 603 ... First damper request means, 604 ... Musical tone generator, 605 ... KD judgment means, 6o6 ...
... SCD storage means, 607 ... Assignment flag generation means, 6o8 ... C3CD storage means, 609 ... SCD output means, 610 ...
. . . CH8T determination means, 611 . . . Forced silencing flag generation device, 612 . . . Forced silencing control means, 900 . . . SCD generation means, 901 .
...VEN, DVIB generation means, 903...
... Vibrato adding device, 9o4... Basic pitch data generating means, 906... ONK generating means, 907... KO3 generating means, 909...
...Vibrato data memory, 91o...
・Vibrato data reading means, 911...
Vibrato address counter, 912...
Delay vibrato address counter, 913.
...Timer means, 914... Addition means, 91
5...Exponent conversion means, 916...Music tone generator, 1031...SCD generation means, 1o32
・・・・・・Tremolo control means, 1o34・Kawa・KO
8 generation means, 1o36・old...TMF generation means, 1o3
7... Timer means, 1o4o... Tremolo addition means, 1o41... Low pass filter, 1o42... Voltage controlled amplifier, 1o44
...Music sound generator. Name of agent: Patent attorney Toshio Nakao, 1st person, 2nd person
Figure't5 ω
+Figure 6, Figure 7, Figure 8, U2. b. Fig. 9 Fig. 1θ Fig. 16 Fig. 17 Fig. 18 Rnc: λ notation of DδG Fig. 21 Fig. 22 (α) (b) ■ Fig. 23 Fig. 24 (ω) (b) Fig. 25 Figure 26

Claims (1)

[Claims] A sound generation control data generation means that independently generates sound generation control data for specifying the scale and sound timing of the generated musical tone for multiple channels, and a vibrato data generation means that generates vibrato enable data that independently specifies the on/off of vibrato for each channel. Vibrato is added only to the enable data generation means and the channels for which the vibrato enable data is on, and the vibrato enable data is turned on.
It has a function to start delay vibrato when at least one channel among the channels whose data is on starts producing sound, and sends frequency data based on the above sound production control data and vibrato enable data to the musical tone generator. A musical sound generation system comprising: a vibrato adding device that sends out a vibrato; and a musical tone generating device that generates a musical tone with a pitch corresponding to the frequency data sent out from the vibrato adding device.