JPS6166493A - Display device of overlapped video signal and character/ figure signal - Google Patents

Abstract

PURPOSE:To display a video signal and character/figure signal on the same screen in the overlapped state by converting the horizontal scan system of a television signal from an interlace system to non-interlace one so as to output said signals. CONSTITUTION:After signals R, G, B and (i) outputted from a personal computer 3 are converted into signals Y, I and Q by an RGBi YIQ converter 15, they are inputted to a superimpose circuit 14, where they are overlapped with signals Y, I and Q obtained from an NTSC-type composite video signal V, and outputted. Her;e, the signals U, I and Q outputted from an Y/C separator circuit 6 are converted into interlaced signals, which are overlapped with a character/ figure signal from the personal computer. The superimposed signal is converted into the signals R, G and B through a speed doubling circuit 7, D/A converter 8 and matrix circuit 9, and displayed as a high quality picture.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a superimposition display device that superimposes and displays a video signal and a character/figure signal on the same screen.

[Background of the invention]

With the development of the information society in recent years, a function (hereinafter referred to as "PC") that superimposes and displays character and graphic signals output from a personal computer (hereinafter referred to as "PC") etc. on a screen composed of ordinary video signals has been developed. , sometimes referred to as superimposition).

In the end, it is possible that such devices could be used for educational purposes. While showing videos produced for educational purposes, such as images taken with a video camera or images read out from a video disc player, the program can be controlled using a computer to display text and add explanatory text. If we do this, we will be able to provide effective education.

FIG. 2 is a block diagram illustrating a conventional superimposed display device.

In Figure 2, 1 is an NTSC-+RGB converter, 2 is a mixer, 3 is a personal computer, and 4 is an encoder.

Generally, the character and graphic signals output from the personal computer 3 are three primary color signals (red), G (green), and B (blue) (hereinafter referred to as 几, G,
It is also called the B signal. ), so in order to superimpose the normal video signal, R, G, B
need to be converted into a signal. Further, as will be described later, R, G, B, and i signals may be used as character/graphic signals from a personal computer, with an i (brightness) signal added to the rough.

In this case, if the i signal is not output, all RGB signals are 1.
The brightness K is set to be /2.

As shown in Figure 2, the NTSC video signal ■l is N
R, G by TSC-40B converter 1.

It is converted into a B signal and input to the mixer 2. On the other hand, R, G, and B signals output from the personal computer 3 are also input to the mixer 2. The output of mixer 2 is input to encoder 4,
The signals are combined and output as a video signal v2, which is supplied to a display device (not shown in FIG. 2) and displayed. If the display device has RGB input, the R, , G, and B signals output from the mixer 2 are supplied as they are and displayed.

however,#! In the device shown in Figure 2, the video that appears on the screen of the display device (hereinafter referred to as an image) is scanned by 525 interlaced scans (the first 262-5 scanning lines are scanned in field scanning, and 262.5 scanning lines are scanned to fill in the gaps in the second field scanning, for a total of 525 scanning lines.)
Therefore, depending on the video content, a flicker called 7 flicker may occur, causing eye fatigue to the viewer. Particularly, when such a device is used for educational purposes as described above, the user will have to stare at the screen for a long time, resulting in even more eye fatigue.

Therefore, in order to reduce the number of pixels that cause eye fatigue, a technology has recently been developed to convert 525-line interlaced scanning into 525-line non-interlaced scanning. This technique is one of the techniques called high-definition image improvement, and the image high-definition technique will be explained below.

Images from TV receivers from general TV broadcasts, etc.
As mentioned above, in addition to flickering due to 525 line interlaced scanning, the separation of the luminance signal Y and color signal C is incomplete, resulting in image quality problems called cross color or dot interference due to mutual interference between luminance and color. Deterioration occurs. In order to reduce such flicker, cross color, and driver interference, in addition to converting 525-line interlaced scanning to 525-line non-interlaced scanning, the luminance signal Y (hereinafter sometimes simply referred to as the Y signal) is It is necessary to completely separate the color signal C and the color signal C.A device that performs such a thing will be referred to as a high-definition signal conversion device here.

FIG. 3 is a block diagram showing a general high-definition signal conversion device.

Before explaining FIG. 3, a little explanation will be added about the color signal C.

The color signal C has two forms as follows.

a, Two color difference signals 几-Y, B-Y (each band @ 0
．． 5M11z), balanced modulation of color subcarriers with the same frequency and 9♂ phase difference, I signal @ (signal corresponding to strong orange and cyan colors in color vision: bandwidth L5MIIIz) and Q signal (
Signals corresponding to the green and magenta colors of color vision:・
jd bandwidth 0.5M11z), balanced modulation of color subcarriers which are 33@ ahead of the color subcarriers when the frequency is the same and the phase is a. Furthermore, the color difference signals R-Y, B-Y and I, There is the following relationship with the Q signal.

Human vision has excellent color resolution for orange and cyan hues, but poor resolution for green and magenta hues. Therefore, it is better to have a wide transmission band for orange and cyan colors as shown in b, and to use a narrow bandwidth for red and magenta colors, which has the advantage of being able to transmit more beautiful and finer colors. .

Therefore, in FIG. 3, the discussion will proceed assuming that the color signal C is in the form b.

In FIG. 3, 5 is an A/D converter, 6 is a Y-C separation circuit, 7 is a double concatenation circuit, 8 is a D/A converter, and 9 is a matrix circuit.

As shown in FIG. 3, the NTSC composite image signal V is
After being converted into a digital signal by the /D converter 5, the Y-C
The separation circuit 6 separates the signal into a luminance signal Y and a color signal C.
From the chrominance signal C, the optical and Q signals are demodulated. Y output from the Y-C separation circuit 6.

1. Each of the Q signals has a horizontal frequency of about 31.5 ktlz, which is twice the horizontal frequency of the NTSC system, by a doubling circuit 7.
At the same time, the interlaced scanning method is converted to the non-interlaced scanning method. The output of the double concatenation circuit 7 is
The D/A converter 8 converts the signal into an analog signal, and the matrix circuit 9 further converts the signal into 几, G, and B signals, which are supplied to a display device (not shown).

Here, the operations of the Y-C separation circuit 6 and the double concatenation circuit 7 will be explained in more detail.

Y-C separation is carried out as follows. Taking a still image as an example, the luminance signal Y and the color signal C have a relationship as shown in equation (3) for the first frame and as shown in equation (3) for the @2 frame.

1st frame y+c (2)
Second frame Y-C(3) This indicates that the polarity of the color signal C is reversed every frame.

Therefore, from (2〇) and (3), ((Y+C)+(Y-C))xΣ-Y(4)((Y+
C) −(Y−C) )x −! --C i.e. the first
Adding and halving the information of frame and Yuki2 frame gives the luminance signal Y, and subtracting and halving gives the color signal Ct.
Ii obtained. The color signal C is further demodulated by a demodulation circuit within the circuit.

This becomes a Q signal. According to the above, for Y-C separation, 2
Requires frame memory.

Next, the operation of the double concatenation circuit 7 will be explained using FIGS. 4(A) and 4(B).

FIG. 4(A) is a schematic diagram showing the configuration of a screen based on normal 525-line interlaced scanning.

Y input from the Y-C separation circuit 6 to the double concatenation circuit 7,
The information contents of the I and Q signals are, in the first field, scanning line information corresponding to the scanning line indicated by the solid line in FIG. 4(A);
■, ■, ... river is input, and in the second field, scanning line information corresponding to the scanning line shown by the dotted line ■, ■, ■, ...
... is input.

FIG. 4(B) is a circuit diagram showing the circuit configuration of the double concatenation circuit of FIG. 3. The signals inputted to the double concatenation circuit 7 are three signals, Y, Z, and Q signals, but since the circuit configuration is the same, only the Y signal is shown in this figure.

In FIG. 4(H), 10.11 are field memories, 12a, 12b, 13a, 13b are line memories, swl, sw2. sw3゜Sl
+ B2 t s3s S4# s are switches, respectively.

As shown in FIG. 4(B), the luminance signal Y output from the Y-C separation circuit 6 is input to the switch SWl. When the luminance signal Y belongs to the first field, the switch SW is connected to the Al side, SW2 is connected to the B2 side, and sw3 is connected to the A3 side.
1 is connected to the Sl side, and S W2 A2 'R15W3 is connected to the B3 side. Therefore, in the first field,
The luminance signal YIF present in the first field (i.e.
Scan g! The information (■, ■, ■, . . . ) is written to the field memory 10 and is also output from the switch SW2. Then, in the next second field, the luminance signal YIF belonging to the first field written in the field memory 10 is successively outputted from the switch SW2. In this way, the brightness signal VIP belonging to the first field is always output from the switch SW2, regardless of whether it is the first field or the second field. In addition, as can be easily estimated by referring to the above operation, the switch SW3 outputs the luminance signal Y2F belonging to the second field (i.e., scanning line information ■, ■, ■, . . .
) is always output.

Although the first half of the doubling speed operation has been explained in an easy-to-understand manner, an actual device does not necessarily need to be configured with a field memory as shown in FIG. 4(B).

That is, for example, using four field memories,
As shown in equations (4) and (5), by adding the first field of the first frame and the first field of the second frame and dividing the result by 1/2, the scanning line information regarding Y is obtained.
■, ...... is obtained, and the second field of the first frame and the second field of the second frame are added to 1/2.
By doing so, the scanning line information regarding Y ■, ■, ■, ・
... is obtained. The same applies to C (the addition described above becomes subtraction).

Therefore, first connect the switch S1 to the a1 side and the switch S2 to the a2 side, and store the scanning line information in the line memory 12a.
and scan line information ■ to the line memory 13a.
is horizontal scanning time in 525 lines interlaced scanning: 6
3.5 μs) at the same time. Next, the switch S1 is switched to the bl side and the switch S2 is switched to the b2 side to simultaneously write the scanning line information (2) to the line memory 12b and the scanning line information (2) to the line memory 13b at the time of the next IH. At this time, switch S3 is set to a3 side,
4 to the A4 side, and the first 1/2H (.

(approximately 31.7 μs), connect the switch S5 to the as side and read the contents of the line memory 12a (in this case, scanning line information ■)
In the next 1/2H, the switch S5 is connected to the b5 side and the contents of the line memory 13a (in this case, the scanning line information ■) are read out. Two scanning line information are read in the IH time by 0 or more operations. It can be output.

By switching each switch at a predetermined timing in this way, the scanning line information t-■,■
, ■, ■, . . . can be sequentially output from the switch S5, making it possible to perform 525 non-interlaced scans on the screen.

In addition, the clock pulse of the A/D converter 5 shown in Figure 3 is usually subcarrier frequency fsc (3,58 Mtlz
) 4 times the frequency 4fSC (approximately 14.3 Mllz)
is used. On the other hand, the frequency of the clock pulse for reading information from each line memory in order for the doubling speed circuit 7 to double the speed is theoretically 8fSC (approximately 28MHz).
is necessary. Further, the clock pulse of the D/A converter 8 also requires 8 fSC (approximately 28 ME[z).

As described above, by using the high-definition signal conversion device, it is possible to provide the user with a high-quality image that is free from flicker, cross color, and dot interference in the *I range.

Therefore, the problems of the conventional superimposed display device as described above are as follows.
This problem can be solved by creating a superimposition display device that has a superimpose function added to a high-definition signal conversion device.

[Purpose of the invention]

SUMMARY OF THE INVENTION An object of the present invention is to solve the problems of the prior art and to provide a superimposition display device that can superimpose and display a video signal and a character/figure signal on the same screen with high quality images.

[Summary of the invention]

In order to add a superimpose function to a high-definition signal converter as shown in FIG.
A method of superimposing using an analog switch after the converter 8 is conceivable. Although it is more advantageous in terms of cost to use an analog switch, the clock frequency is approximately 28 Mflz (period: approximately 35 ns) as described above, and there is no analog switch element that operates at such high speed. Therefore, the present invention has decided to adopt the former method.

That is, the present invention includes a means for A/D converting an incoming video signal and then separating it into a luminance signal and a color signal, and a means for separating an incoming video signal into a luminance signal and a color signal, and a means for converting an incoming video signal into a luminance signal and a color signal, and a means for converting an incoming video signal into a luminance signal and a color signal, and converting the incoming video signal into three primary color signals and a character/figure input as brightness designation information from a character/figure signal generation source. A means for converting a signal into a luminance signal and a chrominance signal, a means for mutually superimposing the two luminance signals and two chrominance signals, and a horizontal scanning method for a television signal consisting of the superimposed output from an interlace scanning method. It has means for converting into a non-interlaced scanning format and outputting it, and means for converting the output signal after converting the scanning format into D/person, and superimposes a video signal and a character/figure signal on the same screen to output a non-interlaced scanning signal. It was designed to be displayed using an interlaced scanning method.

[Implementation sequence of the invention]

FIG. 1 is a block diagram showing one embodiment of the present invention.

In Figure 1, 3 is a personal computer, 5 is an A/D converter, and 6
is a Y-C separation circuit, 7 is a double-speed circuit, 8 is a D/A converter, 9 is a masking circuit, 14 is a superimpose circuit, 15 is an RGBi-+YIQ conversion device, and V is an NT
SC system decoding system guaranteed video signal.

The operation of this implementation is based on the superimpose circuit 14 and the gate G.
Except for the Bi→YIQ conversion device 15, the operation is the same as that of the device shown in FIG.

Therefore, the following describes the superimpose circuit 14 and the circuit G.
The operation of the B i 4Y IQ conversion device 15 will be mainly explained.

As shown in Fig. 1, R, G,
The B and i signals are converted to GB i −+Y I Q converter 1
After being converted into Y, I, and Q signals by 5, the signals are input to a superimposing circuit 14, where they are superimposed with the Y, I, and Q signals of the NTSC multi-system composite video signal and output.

#I1 The input signals of the fLGBi-YIQ conversion device 15, ie, G, B, and i signals, each have 1 bit (i.e., 21 ft signal), and have a total of 4 bits. Also,
The output signals Y, I, and Q signals each have ny bits,
``If there are 1 bit and nQ bits, the output is (n
y1nI + nq) bits.

In the following explanation, it is assumed that s ``Ya ''I t flQ each has 8 bits. Therefore, 几GBi- shown in FIG.
The YIQ transducer 15 provides 24 outputs of Y, I, and Q signals for the four-man-powered machines, G, B, and im.

Next, in the GBi-4YIQ conversion device 15, R,
The formula for converting G, B, i signals into Y, I, Q signals is shown below.

Although the i signal is not shown in Equation (6), if the i signal is not input, the Y, I, and Q signals will all be 1/2 as described above, so the Y, I, and Q signals will also all be 1/2. /2.

In addition, Table 1 shows the numerical values of l(, GBi→YIQ conversion derived from equation (6). However, for ease of understanding, they are shown as decimal numbers in Table 1, but approximately GBi−+YIQ
When converting, it is converted into a binary number.

Table 1 几GB i −+Y I Q conversion Figure 5 is 1
FIG. 2 is a circuit diagram showing a specific example of the RGBi→YIQ conversion device shown in the figure.

In Figure 5, 21, 22, and 23 are FROM
(programmable random access memory). Also, s AO”””A4 is the address, A4 +
R, G, B, and i signals are input to A3 r A2 + AI, respectively, and AO is set to 0.

The numerical values shown in Table 1 are written in advance in binary numbers in each FROM 21, 22, and 23.

So, for example, if (RGBi)=(1100) is input, from Table 1, Y-0,445°I-o,
1s, Q--o, and 1ss, the Y signal is output from the PROM 21, the engineering signal is output from the 280M22, and the Q signal is output from the PROM 23 as corresponding 8-bit binary numbers. Note that G is a clock input.

Next, Figure 6 is a circuit diagram showing a specific example of the superimpose circuit shown in Figure 1.

In FIG. 6, 24 to 29 are AND circuits, 3
0 to 33 are 0-way circuits, and 34 is an inverter. Also, YT * IT e QT are each NTS
Y, I, Q signals 1r, Y by C system composite video signal V
- the output signal from the C separation circuit 6), YP, IP, and QP are each Y based on a character/figure signal.

The I and Q signals (i.e., the output signals from the RGBi→YIQ conversion device 15) and the signals outputted from the personal computer 3 are shown in FIG. The operation will be explained below. (几GBi)
-(0000), the output of the OR circuit 33 is O, so the output of the inverter 34 is 1, and YT * IT
* Since QT passes through AND circuits 24 and 26.28, the output of OR circuits 30, 31, and 32 is Y.
T s 'T * QT is obtained. Also, 几#G
If at least one of the t B l i signals is 1,
Since the output of the zero circuit 33 becomes 1, the output of the inverter 34 becomes 0, and YP e IP t Qp passes through the AND circuit 25.27.29, so the OR circuit 30.31
．． YP m IP s Qp is obtained as the output of 32.

In Table 1, (几GB)-(000) means that the color of the output signal from the personal computer 3 is black. However, in this case, ixl, i=0
There are two cases; in Figure 6, i - w
In the case of Q, the output of the OR circuit 33 is 0, so as described above, the OR circuits 30 to 32 output Y based on the NTSC composite video signal.

The I and Q signals will be output, and the black PC signal will be output only in the case of i-1.

In addition, in FIG. 6, YT # IT r QT # yp
Although the description has been made assuming that each tIP#Qp is one bit, the principle is the same even if it is a plurality of bits, for example eight pits.

In addition, in Fig. 6, the °C configuration is made using an AND circuit, a zero circuit, and an inverter, but (RGBi) - (oooo
It goes without saying that it is possible to configure a logic circuit using Ike's circuit so that YT, I〒w QT are selected when ), and YP, IP, and QP are selected in cases other than the above. .

As explained above, R9Q and B output from the computer
, i signal into Y, I, Q signals, superimposition becomes possible.

Next, another practical riJA example of the present invention will be described.

As mentioned above, there are two forms of the color signal C. In the previous embodiment, the color signal C was demodulated into I and Q signals, but in this embodiment, the color difference signal R-Y ,B-Y
(Hereinafter, this signal may also be referred to as a B-Y or B-Y signal.)

However, the circuit configuration of this embodiment is exactly the same as that of the previous embodiment, that is, FIG. 1, FIG. 5, @6 [
All you have to do is replace it with the iUK oil I, Q signal fwoR-Y, and B-Y signals.

Furthermore, since the circuit configuration is the same, the circuit operation is also almost the same, and therefore, only the differences in circuit operation from the previous embodiment will be described below.

In FIG. 1, the name of the RGBi-+YIQ conversion device 15 is naturally changed from 几GBi→Y(R
-Y) (B-Y) conversion device. Therefore, 几GBi
-+Y (R-Y) (B-Y) A formula for converting R, G, B, i signals into Y, -Y, BY signals in the conversion device is shown below.

Equation (7) Ki is not shown, but as in the previous example, i
If not input, Y, RY, B-Y signals are all 1/2
become.

In addition, 几QB i−+Y (几−
Table 2 shows each numerical value of Y)(B-Y) conversion. However, for ease of understanding, Table 2 is expressed as a decimal number in the same way as Table 1, but in reality it is RGBi-+Y(fL-Y)
(B-Y) The conversion is based on binary numbers, so in this example, 几GB i-+Y (R-Y) (B-Y)
The numerical values shown in Table 2 are written in advance in binary numbers in each FROM in the conversion device.

In the above, only the points different from the previous embodiment regarding the operation of this embodiment have been explained.

Therefore, finally, the difference in effect between the previous implementation row and this embodiment will be explained.

When I and Q signals are used as in the previous embodiment, the bandwidth of the engineering signals is wide as described above, so it is possible to transmit even clearer and finer colors, resulting in the ability to obtain high-quality images. . Also, with TV cameras, etc., I, Q
Since the image is captured and output as a signal, it is convenient when using such a television camera or the like.

On the other hand, in the case of using the B-Y and B-Y signals as in this embodiment, all operations of currently popular television receivers are performed using the B-Y and B-Y signals. , which has similarities with television receivers.

〔Effect of the invention〕

According to the present invention, the character/graphic signal 几IG tB,
The i signal can be easily converted into a luminance signal and a color signal, and superimposition in a high-definition signal conversion device is possible. There is a new technology that allows video signals and text/graphic signals to be displayed on the same screen at Vcmi.

[Brief explanation of the drawing]

tB1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing a conventional superimposed display device, and FIG. 3 is a block diagram showing a general high-definition signal conversion device.
! 1li (A) is a schematic diagram showing the screen configuration by normal 525-line interlaced scanning, and Figure 4 (B) is
A circuit diagram showing the circuit configuration of the speed doubling circuit, FIG. 5 is a circuit diagram showing a specific array of the RGBi-+YIQ converter shown in FIG. 1, and FIG. 6 is a circuit showing a specific example of the superimposing circuit shown in FIG. 1. Figure. Description of symbols 5... A/D converter, 6... Y-C separation circuit, 7... Double speed increase circuit, 8...
・D7 person converter, 9...Matrix circuit, 14
-...Superimpose circuit, 15...
・Patent attorney Namiki, agent for 几GBi→YIQ conversion device
Akio Figure 1 Figure 3 Prisoner i [Figure 4 f Al Figure 4 (θ) M 5 Figure 6

Claims (1)

[Scope of Claims] 1) In a display device that displays a video signal and a character/figure signal in a superimposed manner, means for A/D converting the input video signal and then separating it into a luminance signal and a color signal; means for converting character and graphic signals received as three primary color signals and brightness designation information from a graphic signal generation source into a luminance signal and a color signal;
means for mutually superimposing the two luminance signals and the two color signals, and means for converting the horizontal scanning method of the television signal consisting of the superimposed output from an interlace scanning method to a non-interlace scanning method and outputting the same. , a means for D/A converting the output signal whose scanning method has been converted, and a video signal and a character/figure signal are superimposed on the same screen and displayed in a non-interlaced scanning method. A superimposed display device for a video signal and a character/figure signal, characterized by: 2) The superimposed display device according to claim 1, wherein the color signal comprises a color difference signal. 3) The superimposed display device according to claim 1, wherein the color signal consists of I and Q signals.