JPS6165756U - - Google Patents
Info
- Publication number
 - JPS6165756U JPS6165756U JP14987484U JP14987484U JPS6165756U JP S6165756 U JPS6165756 U JP S6165756U JP 14987484 U JP14987484 U JP 14987484U JP 14987484 U JP14987484 U JP 14987484U JP S6165756 U JPS6165756 U JP S6165756U
 - Authority
 - JP
 - Japan
 - Prior art keywords
 - notch
 - lead terminal
 - bent
 - package
 - lead
 - Prior art date
 - Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
 - Pending
 
Links
- 239000004065 semiconductor Substances 0.000 claims 1
 - 238000010586 diagram Methods 0.000 description 4
 - 239000000523 sample Substances 0.000 description 1
 
Landscapes
- Lead Frames For Integrated Circuits (AREA)
 - Testing Of Individual Semiconductor Devices (AREA)
 - Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
 
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| JP14987484U JPS6165756U (en:Method) | 1984-10-03 | 1984-10-03 | 
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title | 
|---|---|---|---|
| JP14987484U JPS6165756U (en:Method) | 1984-10-03 | 1984-10-03 | 
Publications (1)
| Publication Number | Publication Date | 
|---|---|
| JPS6165756U true JPS6165756U (en:Method) | 1986-05-06 | 
Family
ID=30708041
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date | 
|---|---|---|---|
| JP14987484U Pending JPS6165756U (en:Method) | 1984-10-03 | 1984-10-03 | 
Country Status (1)
| Country | Link | 
|---|---|
| JP (1) | JPS6165756U (en:Method) | 
- 
        1984
        
- 1984-10-03 JP JP14987484U patent/JPS6165756U/ja active Pending
 
 
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