JPS6163034A - Controlling system for uniform thickness of oxide film in semiconductor manufacturing furnace - Google Patents

Abstract

PURPOSE:To reduce the number of defective wafers by a method wherein the furnace wall of a heating furnace is divided into zones in the direction of furnace axis, and temperature is controlled in such a manner that the function of evaluation, having the difference of the temperature in the direction of furnace axis of a wafer and the presumptive value of the oxide film thickness obtained from the wafer temperature and the target value is considered as an evaluated value, becomes the minimum. CONSTITUTION:A heating furnace 101 is cylindrical tube. A wafer 102 is placed on a boat 1020 located in the center part, conveyed into the furnace 101, a heat treatment is performed thereon, and the wafer 102 is discharged outside the furnace 101. The designed oxide film thickness tOX is inputted to an optimum calculating device 106, the target wafer temperature is calculated by the calculating device 106, and the temperature of the furnace wall of a zone 3, with which the wafer is uniformly heated by heaters 103, 104 and 105, is determined. The temperature of the furnace wall is determined using a non-linear distribution system model equation with which the temperature in the direction of furnace axis of the wafer is estimated from the temperature of the furnace wall, in such a manner that the function of evaluation, wherein the difference of non-linear model with which the thickness of an oxide film is estimated from the wafer temperature, the presumptive value and the target value are considered as the evaluation value, will become the minimum. Through the above- mentioned procedures, the number of defective wafers is reduced, and the uniformity of the thickness of the oxide film can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a method for controlling the temperature inside a furnace used in oxidation, diffusion steps, etc. of semiconductor manufacturing processes.

In particular, the present invention relates to a method for controlling uniformity of oxide film thickness distribution in the axial direction of a large number of wafers placed in a furnace.

[Background of the invention]

In order to make the oxide film thickness of a large number of wafers in the furnace uniform to a value determined by design, it is necessary to make the temperature of the wafers uniform. Conventional furnaces are controlled so that the entire furnace wall surface has a constant temperature, but actual measurements have shown that the temperature of the wafer itself has a distribution in the axial direction of the furnace. If a temperature sensor is installed inside the furnace, the oxide film thickness will vary, so it is necessary to develop a model that can estimate the wafer temperature inside the furnace from the furnace wall temperature. The conventional method of heating the furnace wall at a constant temperature has the disadvantage that the temperature varies depending on the position of the wafer, resulting in variations in the characteristics of the final semiconductor and a reduction in yield.

[Purpose of the invention]

The purpose of the present invention is to realize a control method for uniformizing the oxide film thickness distribution in a semiconductor manufacturing furnace so that the wafer temperature distribution in the axial direction in the furnace can be operated close to the target temperature distribution (constant temperature). It's about doing.

[Summary of the invention]

Since the inside of the furnace is at a high temperature of 1000° C. or more, ordinary sensors (for example, thermocouples) cannot be used for on-line measurement of the temperature inside the furnace due to durability and other issues. Therefore, in the present invention, a nonlinear distribution model is constructed that can estimate the wafer temperature inside the furnace from the furnace wall temperature, and a control method is provided for determining the zoned furnace wall temperature distribution based on this model.

[Embodiments of the invention]

The present invention will be explained below using examples.

Figure 1 shows the configuration of a semiconductor oxidation diffusion device according to the present invention.Based on a model for estimating the internal state of the 6-furnace, wafers can be uniformly heated by adjusting the furnace wall temperature, for example, with a heater installed on the furnace wall. The control procedure for heating by temperature will be explained. In Figure @1, the target furnace 101 is a cylindrical tube, and the wafer 102 is in the boat 10 in the center.
20 and transported into the furnace 101, subjected to heat treatment, and then exited from the furnace 101 again. The problem is the furnace axis (Z
This is an estimation of the temperature distribution inside the furnace in the axial direction. The wafers in the center of the boat are heated by radiation from the wafers on both sides and by radiation from the furnace walls, so the wafers in the center become hotter than the wafers at both ends.

Therefore, temperature control of the furnace for heating the wafer at a uniform temperature is performed as follows. For example, design oxide film thickness. X' is input to the optimum calculation device 106, and the target wafer temperature T1 of the wafer is calculated internally, and the furnace wall temperature in three zones is determined so that the wafer is uniformly heated by the heaters 103, 104, and 105 using the calculation method described later. Determine. In this example, there are three zones, but generally any number of zones is possible. When the furnace wall temperature is determined, the subtracter 100 calculates the difference between the furnace wall temperature measurement result by the sensor 108 and the furnace wall temperature determined by the a-optimal calculation device 106, and based on this difference, the PID controller 107 By adjusting the power supply 109, the heaters 103, 104, and 105 are heated to a predetermined temperature.

Next, the procedure for setting the furnace wall temperature will be outlined.

First, input t. You must prepare a function to convert from - to T''.

T' = F1 (tOX')
(1) Once the target wafer temperature T'' is determined, the wafer temperature T, (i is the wafer number and takes a value from 1 to N)
A functional relationship between and the furnace wall temperature distribution T, (k) (k=1.2.3) is required.

T,=F21 ('r, (k)) (2
) Therefore, since it is only necessary to consider an evaluation in which T approaches T'', the following evaluation function is adopted.

J=Σ("rt-"r")"
(3) The above algorithm can be summarized as shown in Figure 2. First, in step 201, the target oxide film thickness is converted into a target wafer temperature according to equation (1), and in step 202, an appropriate initial furnace wall temperature is set. using this value.

The wafer temperature T1 is determined according to equation (2). T, and T8
is substituted into the evaluation formula (3), and when J is larger than a certain appropriate small value E, the furnace wall temperature distribution is reset so that J becomes smaller, and the wafer temperature T is calculated again at 203.

If J is less than ε, loop 205 is exited. The furnace wall temperature distribution at this time becomes the optimal furnace wall temperature distribution, and a uniform wafer temperature distribution can be obtained.

Below, specific representations of equations (1) to (3) will be given.

As formula (1), the famous formula is Deal-Grove.tax"+A(T)tox=sD)t
(4) Here, t represents the oxidation time, and A and B have the following Arrhenius temperature dependence.

A(T)=alleXp(,at/T)B
(T)=bl, eXp (-b, /T) (5)
The coefficients appearing on the right side are all constants and are of the zeroth order, which should be determined experimentally.The following heat conduction equation is used as equation (2).

+, X *1 Ja i Wa TJ', %. G,,J
dS.

-1 no 1L +, /’a　i　　,T,’ΣF,dS.

+d iv (Kw-gradT,) -...
(6) Here, TI is i-th wafer temperature, CW is wafer specific heat, σ is wafer density, Q is wafer thickness, t is time, σ is Boltzmann-Stefan constant, a is wafer heat absorption rate, ε, is the wafer emissivity, G is the inter-wafer coefficient, and the subscript n represents the number of reflections.

T is the furnace wall temperature, ε is the furnace wall emissivity, F is the wafer wall-to-wall view factor, and K is the wafer thermal conductivity.

dS and dS represent minute area pieces of the furnace wall surface and wafer surface, respectively. Regarding the right side of equation (6), the first term represents self-radiation loss, the second term represents radiation from adjacent wafers, the third term represents radiation from the furnace wall, and the fourth term represents thermal diffusion.

As a specific algorithm for formula (3), for example, the following simple method can be considered. Now, if the initial furnace wall temperature TWa(k) is set at 202 in Fig. 2, loop 20
5, the next furnace wall temperature to be set is 'r
y'(k)+ΔT,'(k).

=Here, ATt. (k)=-kaJ/θT, (k)t'
be. Let be an appropriate positive constant. If Tt'(k) is set to a value sufficiently close to the optimum value T, ``(k), a sufficiently accurate optimum value can be obtained even with such a simple algorithm.

FIG. 3 shows the wafer temperature distribution T when the furnace wall temperature is kept constant (a) and when it is determined from the furnace wall temperature distribution determined according to the calculation procedure described above (b). When the furnace wall temperature is kept constant, the temperature of several wafers at both ends of the wafer row is low, but the temperature distribution of the furnace wall divided into three zones is TF < 1) and T, (2). When the temperature is increased, the distribution of wafers in the furnace axis direction becomes uniform.

〔Effect of the invention〕

According to the present invention, it is possible to reduce the number of defective wafers at both ends of the wafer row where the wafer temperature is low, that is, the oxide film thickness is thin, and the uniformity can be improved, thereby improving the productivity of large-scale integrated circuits. ;5 It has the effect of improving quality.

[Brief explanation of drawings]

Fig. 1 is a block diagram of an oxidation/diffusion device that is an embodiment of the present invention, Fig. 2 is a diagram showing the algorithm of the oxide film thickness uniformity control method, and Fig. 3 is a temperature distribution diagram showing the wafer @ temperature distribution. It is. 101... Oxidation/diffusion furnace, 102... Wafer, 10
3゜104.105...Heater, 107...Controller. word 1 diagram

Claims (1)

[Claims] In a target value follow-up control system for a large number of wafers in a furnace used in the oxidation or diffusion process of a semiconductor manufacturing process, the furnace wall of the heating furnace is divided into zones in the furnace axis direction, and the temperature of the furnace wall is adjusted to control the number of wafers in the furnace. This evaluation function is based on a nonlinear distribution model equation that estimates the axial temperature distribution, a nonlinear model that estimates the oxide film thickness from the wafer temperature, and an evaluation function that uses the difference between the estimated value and the target value as the evaluation value. A control method for uniformizing oxide film thickness distribution in a semiconductor manufacturing furnace, characterized by determining the furnace wall temperature so that the temperature is minimized.