JPS6161740B2 - - Google Patents

Info

Publication number
JPS6161740B2
JPS6161740B2 JP56154600A JP15460081A JPS6161740B2 JP S6161740 B2 JPS6161740 B2 JP S6161740B2 JP 56154600 A JP56154600 A JP 56154600A JP 15460081 A JP15460081 A JP 15460081A JP S6161740 B2 JPS6161740 B2 JP S6161740B2
Authority
JP
Japan
Prior art keywords
code
memory
circuit
communication device
secret
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56154600A
Other languages
Japanese (ja)
Other versions
JPS5856546A (en
Inventor
Yoshifumi Toda
Hisahiro Koga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56154600A priority Critical patent/JPS5856546A/en
Publication of JPS5856546A publication Critical patent/JPS5856546A/en
Publication of JPS6161740B2 publication Critical patent/JPS6161740B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0894Escrow, recovery or storing of secret information, e.g. secret key escrow or cryptographic key storage
    • H04L9/0897Escrow, recovery or storing of secret information, e.g. secret key escrow or cryptographic key storage involving additional devices, e.g. trusted platform module [TPM], smartcard or USB

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Storage Device Security (AREA)

Description

【発明の詳細な説明】 本発明は暗号コードを第3者に知られないよう
にした秘密通信装置に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a secret communication device that prevents a third party from knowing an encryption code.

従来から通話を秘密裡に行う秘密通信装置とし
て、第1図に示すような秘話通信装置が用いられ
ている。まず、音声符号化装置等(図示せず)に
より符号化されたデイジタル音声信号が、入力線
2を介してアドレス指定回路1(例えば、シフト
レジスタから成る)へ入力される。一方、通常電
源から線4を経て、又はRAM用バツクアツプ電
源5から給電されるランダムアクセスメモリ
(RAM)3へは、予め線6を経て上述符号化され
て入力されて来るデイジタル音声信号対応の秘話
コード(暗号コード)が入力され、そのデイジタ
ル音声信号に対応するアドレス(格納位置)に記
憶されている。それぞれの秘話コードがアドレス
指定回路1からの各秘話コード対応アドレスによ
つて読出される。つまり、デイジタル音声信号
は、メモリ3に格納されている秘話コードに暗号
化される。そのメモリ3から読出された秘話コー
ドは、入力線2からのデイジタル音声信号の入力
タイミングに合わせて秘話回路7を介して出力さ
れる。受信側においては送信側とは逆の操作を受
信信号に対し施して送信されたデイジタル音声信
号を得て送受間の必要な通信を第3者に知られる
ことなく行うものである。
2. Description of the Related Art Conventionally, a secret communication device as shown in FIG. 1 has been used as a secret communication device for carrying out phone calls secretly. First, a digital audio signal encoded by an audio encoding device or the like (not shown) is inputted via an input line 2 to an addressing circuit 1 (for example, consisting of a shift register). On the other hand, the random access memory (RAM) 3, which is supplied with power from a normal power source via a line 4 or from a backup power source 5 for RAM, is supplied with a digital audio signal that is previously encoded and input via a line 6. A code (cipher code) is input and stored at an address (storage location) corresponding to the digital audio signal. Each secret code is read out by the address corresponding to each secret code from the addressing circuit 1. That is, the digital audio signal is encrypted into a secret code stored in the memory 3. The secret code read from the memory 3 is outputted via the secret code circuit 7 in synchronization with the input timing of the digital audio signal from the input line 2. On the receiving side, the received signal is subjected to operations opposite to those on the transmitting side to obtain the transmitted digital audio signal, and necessary communication between the transmitter and the receiver is performed without the knowledge of a third party.

しかしながらメモリ3に記憶されている秘話コ
ードはそのメモリ3へのアクセスをなしうる状態
に置かれると第3者にも比較的容易に知られ得る
ものである。従つて、そのようにして秘話コード
を入手した第3者は上述した秘話通信装置の中で
送受されている通話内容を傍受し得ることとな
る。このような状態に至つた秘話通信装置は事実
上、有名無実な無用の長物と化してしまい、その
秘話の目的を達成し得ない。
However, the confidential code stored in the memory 3 can be relatively easily known to a third party if the code is placed in a state where the memory 3 can be accessed. Therefore, a third party who has obtained the secret code in this way can intercept the contents of the conversation being sent and received within the above-mentioned secret communication device. A secret communication device that has reached such a state effectively turns into a useless piece of equipment with no reputation, and the purpose of the secret communication cannot be achieved.

本発明は上述したような状態の発生から生ずる
不都合を解決すべく創案されたもので、その目的
は秘密通信のための暗号コードを記憶するメモリ
へ第3者によるアクセスがなされんとするときそ
のメモリの暗号コードを自動的に消去するように
して該暗号コードが第3者に知られないようにし
た秘密通信装置を提供することにある。
The present invention was devised to solve the inconvenience caused by the occurrence of the above-mentioned situation, and its purpose is to prevent a third party from accessing the memory that stores the encryption code for secret communication. To provide a secret communication device which automatically erases an encryption code in a memory so that the encryption code is not known to a third party.

以下、添付図面を参照しながら本発明の一実施
例を説明する。
Hereinafter, one embodiment of the present invention will be described with reference to the accompanying drawings.

第2図は本発明の一実施例を示す。第2図にお
いて、10は線11を経て送られて来る入力デー
タ(例えば、デイジタル音声信号)に応じて決ま
るRAM12の読出しアドレスを出力する従来同
様のアドレス指定回路で、この回路から出力され
るアドレスによつて消去可能なメモリ例えばラン
ダムアクセスメモリ(RAM)12がアクセスさ
れる。メモリ12はRAM用バツクアツプ電流1
3からも給電されてその主電源から線14を経て
の給電が中断されてもメモリ12の内容を保持す
る。つまり、このRAM用バツクアツプ電池13
は、秘密通信装置の筐体内に収納されており、こ
の装置が所定の設置場所から取り外されて線14
を介しての給電が停止してもメモリ12の記憶内
容は保持される。
FIG. 2 shows an embodiment of the invention. In FIG. 2, reference numeral 10 denotes a conventional addressing circuit that outputs a read address of the RAM 12 determined according to input data (for example, a digital audio signal) sent via a line 11, and the address output from this circuit. Erasable memory, such as random access memory (RAM) 12, is accessed by. Memory 12 has RAM backup current 1
3, and the contents of the memory 12 are retained even if the power supply from the main power supply via the line 14 is interrupted. In other words, this RAM backup battery 13
is housed within the casing of the covert communication device, and when the device is removed from its designated installation location, the line 14
Even if the power supply via the power supply is stopped, the contents of the memory 12 are retained.

メモリ12には、従来秘話通信装置と同様にし
て、秘話コードが線15を経て予め記憶されてお
り、そこから読出される記憶内容はアドレス指定
回路10からの読出しアドレスによつて決まる。
つまり、第1図の回路と同様に、線11を経て入
力されるデイジタル音声信号はそれに応じた記憶
内容、即ち秘話コードがメモリ12から読出さ
れ、秘話回路16を介して出力される、即ち暗号
コード化される。
A secret code is previously stored in the memory 12 via a line 15 in the same way as in the conventional secret communication device, and the stored contents read from there are determined by the read address from the address designating circuit 10.
In other words, similarly to the circuit shown in FIG. 1, the digital audio signal input via the line 11 is read out from the memory 12 with its corresponding stored content, i.e., the secret code, and output via the secret code circuit 16, i.e., the encrypted code. coded.

このような秘話通信装置のメモリ12の記憶内
容を消去するために、消去回路17及び該消去回
路17を動作させるための検出回路18が設けら
れている。
In order to erase the stored contents of the memory 12 of such a confidential communication device, an erasing circuit 17 and a detection circuit 18 for operating the erasing circuit 17 are provided.

消去回路17はRAM12とRAM用バツクアツ
プ電池13との間に設けられたマイクロスイツチ
19を含む給電回路である。
The erase circuit 17 is a power supply circuit including a micro switch 19 provided between the RAM 12 and the RAM backup battery 13.

また、検出回路18はマイクロスイツチ19
(第3図参照)で、このスイツチ19は上述した
各構成要素を収納する筐体(例えば、車載無線
機)20の筐体壁に明けられた窓21を経て出没
する作動子22を有し、この作動子は筐体20を
取付け金具23内に挿入されるとき動作する。
The detection circuit 18 also includes a micro switch 19.
(See Fig. 3), this switch 19 has an actuator 22 that appears and retracts through a window 21 formed in the housing wall of a housing (for example, an in-vehicle radio) 20 that houses each of the above-mentioned components. , this actuator operates when the housing 20 is inserted into the fitting 23.

次に、上記構成の本発明装置の動作を説明す
る。
Next, the operation of the apparatus of the present invention having the above configuration will be explained.

本発明の秘話通信装置がこれを扱う当事者の管
理下に置かれている場合には、その秘話コードは
その秘密性を保たれているから、たとえ秘話回路
16の出力信号を傍受したとしてもその信号の中
にいかなる内容の音声信号が入つているかという
ことはその傍受者には判らず、秘密通信本来の目
的は達成される。
When the confidential communication device of the present invention is under the control of the party handling it, the confidential code is maintained, so even if the output signal of the confidential communication circuit 16 is intercepted, the confidential code will remain confidential. An eavesdropper cannot tell what kind of audio signal is contained in the signal, and the original purpose of secret communication is achieved.

また、上述した筐体20内に収納されたRAM
12へ第3者がアクセスしうる状態に置かれる、
即ち上記筐体20が盗難に遭い、そのRAM12
の内容を読み出さんとして筐体20を取付け金具
23から引き出していくと、スイツチ19の作動
子22が窓21を経て突出してマイクロスイツチ
19の開成が生ぜしめられるから、RAM12の
内容を保持するための電池13からRAM12へ
の給電が遮断される(それに先立つて主電源から
の給電は断たれている)。従つて、RAM12の内
容は部分的に、又は全部消去されることとなり、
取出された筐体20の蓋を開放してRAM12の
内容を読出してもその読出された内容は秘話コー
ドではない。従つて、秘話コードは第3者に知ら
れることはなく、秘話通信装置の機能は保全され
る。
In addition, the RAM housed in the housing 20 described above
12 is placed in a state where a third party can access it,
That is, if the housing 20 is stolen, its RAM 12
When the housing 20 is pulled out from the mounting bracket 23 in order to read out the contents of the RAM 12, the actuator 22 of the switch 19 protrudes through the window 21, causing the micro switch 19 to open, thereby retaining the contents of the RAM 12. The power supply from the battery 13 to the RAM 12 is cut off (prior to this, the power supply from the main power source is cut off). Therefore, the contents of RAM 12 will be partially or completely erased,
Even if the lid of the removed casing 20 is opened and the contents of the RAM 12 are read, the read contents are not secret codes. Therefore, the secret code is not known to a third party, and the function of the secret communication device is maintained.

上記実施例においては、送信側について説明し
たが、受信側についても同様である。更には、筐
体20の取付け金具23からの引出しの際に消去
回路17を動作させる代りに、取出された筐体2
0の開蓋時に消去回路17を動作させるようにし
てもよい。また、音声信号を例にとつて説明した
が、入力データを画像データとする場合にも、本
発明を適用しうるものであり、メモリ12には画
像データのための暗号コードが記憶される。
In the above embodiment, the transmitting side has been described, but the same applies to the receiving side. Furthermore, instead of operating the erasing circuit 17 when the housing 20 is pulled out from the mounting bracket 23,
The erasing circuit 17 may be operated when the lid of 0 is opened. Furthermore, although the explanation has been given using an audio signal as an example, the present invention can also be applied when the input data is image data, and the memory 12 stores an encryption code for the image data.

以上の説明から明らかなように、本発明によれ
ば、秘密通信装置の操作に従事する当事者又は第
3者が暗号コードを記憶するメモリへアクセスし
ようとしてこれを収納する筐体を所定の設置位置
から取り外すか、又は開蓋しようとすると上記メ
モリの暗号コードは自動的に消去され、該コード
は保全される。従つて秘密通信装置の秘密性は保
たれる。
As is clear from the above description, according to the present invention, when a party or a third party engaged in operating a secret communication device attempts to access a memory storing an encryption code, the casing housing the encryption code is placed at a predetermined installation position. When an attempt is made to remove or open the lid, the encryption code in the memory is automatically erased and the code is preserved. Therefore, the confidentiality of the secret communication device is maintained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来装置を示す図、第2図は本発明装
置を示す図、第3図はマイクロスイツチが取付け
られた筐体及び筐体を取付け金具に挿入した状態
を示す図である。 図中、12は消去可能なメモリ、17は消去回
路、18は検出回路である。
FIG. 1 is a diagram showing a conventional device, FIG. 2 is a diagram showing the device of the present invention, and FIG. 3 is a diagram showing a casing to which a microswitch is attached and a state in which the casing is inserted into a mounting bracket. In the figure, 12 is an erasable memory, 17 is an erasing circuit, and 18 is a detection circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 入力データを暗号データ又は解読データに変
換するコードを出力する消去可能なメモリを、少
なくとも筐体内に収納した秘密通信装置におい
て、上記筐体内の前記メモリコードの窃取を目的
とする動作を該筐体に作用させたことを検出する
検出回路及び上記メモリの消去回路を設け、上記
検出回路の出力に応答して上記消去回路を動作さ
せて上記メモリのコードを消去するように構成し
たことを特徴とする秘密通信装置。
1. In a secret communication device in which an erasable memory that outputs a code that converts input data into encrypted data or decrypted data is housed in at least a housing, an operation for the purpose of stealing the memory code in the housing is prohibited from occurring in the housing. A detection circuit for detecting an effect on the body and an erasing circuit for the memory are provided, and the erasing circuit is operated in response to the output of the detection circuit to erase the code in the memory. A secret communication device.
JP56154600A 1981-09-29 1981-09-29 Privacy communicating device Granted JPS5856546A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56154600A JPS5856546A (en) 1981-09-29 1981-09-29 Privacy communicating device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56154600A JPS5856546A (en) 1981-09-29 1981-09-29 Privacy communicating device

Publications (2)

Publication Number Publication Date
JPS5856546A JPS5856546A (en) 1983-04-04
JPS6161740B2 true JPS6161740B2 (en) 1986-12-26

Family

ID=15587723

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56154600A Granted JPS5856546A (en) 1981-09-29 1981-09-29 Privacy communicating device

Country Status (1)

Country Link
JP (1) JPS5856546A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6233339B1 (en) 1996-10-25 2001-05-15 Fuji Xerox Co., Ltd. Physical property based cryptographics

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5950100U (en) * 1982-09-24 1984-04-03 パイオニア株式会社 ROM cartridge diversion/transfer prevention device
JPS6082329U (en) * 1983-11-14 1985-06-07 横河メディカルシステム株式会社 Auxiliary power supply circuit for storage devices
DE3347483A1 (en) * 1983-12-29 1985-07-11 GAO Gesellschaft für Automation und Organisation mbH, 8000 München DEVICE FOR SECURING SECRET INFORMATION
JPS6161291A (en) * 1984-09-03 1986-03-29 Nec Corp Backup memory circuit
JPS61168438U (en) * 1985-04-02 1986-10-18
JPH01126132A (en) * 1987-09-30 1989-05-18 Nippon Kouatsu Electric Co Current-limiting element
JPH01106537A (en) * 1987-10-19 1989-04-24 Tokyo Tatsuno Co Ltd Interface device
JPH01108826A (en) * 1987-10-20 1989-04-26 Tokyo Tatsuno Co Ltd Interface device
JPH0268641A (en) * 1988-08-17 1990-03-08 Corns & Co Ltd Security protective system of integrated circuit
JPH0354054U (en) * 1989-09-27 1991-05-24
JPH04195383A (en) * 1990-11-27 1992-07-15 Matsushita Electric Ind Co Ltd Ic card device and receiver using the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6233339B1 (en) 1996-10-25 2001-05-15 Fuji Xerox Co., Ltd. Physical property based cryptographics

Also Published As

Publication number Publication date
JPS5856546A (en) 1983-04-04

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