JPS6161516A - Picture signal binary-coding device - Google Patents

Abstract

PURPOSE:To output a binary-coded picture signal having an excellent resolution by applying special processing to a differentiated waveform of a picture signal obtained by an input picture signal and a delayed picture signal while retarding the said signal through an adder/subtractor circuit to obtain the binary-coded picture signal. CONSTITUTION:A picture signal PIX from a terminal 5 is divided into two; one is inputted to an adder/subtractor circuit comprising an operational unit 12 and the other is inputted to a smaple-and-hold circuit 11 using a CK1 as a clock. A picture signal differentiation output 7 is outputted from the circuit 12, the output 7 is compared by comparators 13, 14 to obtains a picture signal rising clock 8 and a balling clock 9. In inputting the clocks 8, 9 to a D FF1, an output Q of the FF1 goes to H at the rising of the clock and its state is kept until the rising of the clock (trailing of picture signal). Thus, a black-and- white binary picture signal corresponding to the picture signal is outputted at the output Q of the FF1.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a device for photoelectrically converting image information of a document using a solid-state image sensor such as a CCD, and particularly for converting a photoelectrically converted image signal into a binary image signal using a relatively simple method. The present invention relates to an image signal binarization device that can obtain a binarized image signal with good resolution using a circuit.

(Prior art) In general, when the black image information density, document surface, light amount, etc. are uneven in the photoelectric conversion signal scanned by a solid-state image pickup device such as t-C0D, etc., as shown in the solid line in Fig. 2 (a), A photoelectric conversion image signal on which low frequency distortion is superimposed is obtained. At this time, if this photoelectric conversion image signal t-binarization is performed using a fixed threshold value,
It is obvious that a considerable amount of black image information is lost.

Conventionally, in order to prevent this type of black image information from being omitted, a method as shown in FIG. 1, for example, has been used.

In the figure, FIX, which is manually input from the input terminal Che, is a photoelectric conversion signal (hereinafter abbreviated as image signal). Six-image signal PIX is a diode DI, a capacitor C1, a resistor Rt, and an arithmetic unit 1.
The F-envelope is approximated by a type of detection circuit made up of zeros. This envelope is voltage-divided by the resistors R2 and 3, and is input as a threshold value to the comparator 20, as shown by the dotted line waveform in FIG. 2(a).

The image signal PIX as shown in the solid line waveform in Fig. 2 (a) is binarized using a threshold value based on the envelope of the image signal FIX as shown in the waveform in Fig. 2 (bl). However, since the threshold value cannot be set high due to the problem of envelope approximation, it has the drawback that it is not effective for small black information of the photoelectric conversion output shown on the right side of the fat in Figure 2. be.

(Object of the Invention) The present invention specifically processes a differential waveform of an image signal obtained by passing an image signal and a delayed image signal obtained by delaying the image signal through an adding/subtracting circuit to obtain a binarized image signal -jt-. Particularly, it is an object of the present invention to provide an image signal 211i conversion device which eliminates the above-mentioned drawbacks and outputs a binarized image signal with good resolution and complete blindness.

(Structure of the Invention) 1 The present invention uses two comparators having pulse-like analog signal values synchronized with the rise and fall of the image signal obtained by passing the image signal and the image signal delayed for a certain period of time through a full addition/subtraction circuit. These binary signals are input to a memory circuit such as a 70-tub, and the output obtained is a binary image signal.

(Example) Next, embodiments of the present invention will be described with reference to all the drawings.

FIG. 3 is a circuit diagram showing an embodiment of the present invention.

The image signal FIX inputted from the input terminal 5 (fa) shown by the solid line in FIG. H) Enter 11. The sample hold circuit il is similar to the image signal and is delayed for a certain period of time.
The delayed image signal shown by the dotted line waveform in Figure (a) is output to the addition/subtraction circuit. Select resistance r1”1M=r3=r4 PIXI
PIX(t), the delay time due to the sample and hold circuit 11 is δt (set as at<1 pixel transfer time),
The output of the addition/subtraction circuit is as follows, and a waveform as shown in FIG. 4(b) is obtained.

The output cuff t is the threshold value VTR construction shown in FIG. 4(b).

V, , 2 (VTR2>V,>VTHl) 'k When compared with 6 comparators 13.14, the comparator outputs 8 and 9 have the clocks in Figure 4 (C) and (d), respectively. , a signal can be obtained. Outputs 8 and 9 are synchronized with the rise and fall of the image signal, respectively. Output 8.9t-D type flip-flop, when inputting to FFI as shown in Figure 3, Figure 4 (C
) at the rising edge of the clock (that is, the rising edge of the image signal)
The output Q of FI becomes H', and its state is then shown in Fig. 4 [d
The rising edge of the clock at ) is held until the falling edge of the image signal (that is, the falling edge of the image signal).

Therefore, a black and white binary image signal corresponding to the image signal is outputted to the output Q of the FFI. As can be inferred from Equation (1), the waveform appearing at the output of the adder/subtractor is a differentially processed image signal, and therefore low frequencies superimposed on the image signal due to wrinkles, folds, shading, etc. of the original are generated. is not easily affected by distortion.

(Effects of the Invention) As explained above, the present invention obtains a binarized image signal from a signal obtained by differentially processing a photoelectric conversion signal, so that low frequency distortion is superimposed on the photoelectric conversion signal and black information with low density is obtained from the photoelectric conversion signal. It is also possible to extract a binarized image signal with good resolution.

[Brief explanation of the drawing]

Fig. 1 is a circuit diagram showing a conventional example, Fig. 2 is a waveform diagram explaining the conventional example, Fig. 3 is a circuit diagram showing an embodiment of the present invention, and Fig. 10 is a waveform diagram explaining the present invention in detail. It is a diagram. In the figure, 1... photoelectric conversion image signal, 2... threshold signal, 3... binary image signal, 4...
Sample bold black, 5... Photoelectric conversion image signal, 6... Sample hold output (delayed photoelectric conversion signal), 7... Image signal differentiation No. 4, 8・
...Picture separation is cyclical, 9...Picture signal fall is cyclical, 11
2... Arithmetic unit, 13, 14.20...
Comparator, rlzr4... Resistor. R1-R6...
・、、! resistance, v v v...--voltage g
, F'/F13, THI, TH2゜...D type flip-flop, VDD...
・Appreciate logic. Agent Patent Attorney Susumu Uchihara -5 ÷ 1 Naw 1~ (-・ ・ Collection / Illustration 2WI Tea 3 Illustration

Claims (1)

[Claims] The photoelectric conversion signal obtained from a solid-state image sensor such as a CCD is
An image signal binarization device for converting into values, a delay circuit that delays the photoelectric conversion signal for a certain period of time, an addition/subtraction circuit that receives as input the delayed photoelectric conversion signal obtained from the delay circuit and the photoelectric conversion signal, and the addition/subtraction circuit. The first step is to binarize the output.
and a second comparator, and a storage circuit that receives the outputs of the first and second comparators and outputs them as a binary image signal.