JPS6159864A - Electronic circuit package - Google Patents

Abstract

PURPOSE:To prevent an IC from breaking down by providing power supply lines of independent separate systems at the first and second IC groups, respectively. CONSTITUTION:Power system lines 104, 105 for supplying to the first IC group 101 which is hardly affected by the adverse influence of in-circuit test time breakdown, and power system lines 106, 107 for supplying to the second IC group 102, 103 which are feasibly affected by the adverse influence of the in- circuit test time breakdown are independently provided. For example, a switch in an ICT tester 200 is closed, power ON state is obtained in the IC 101 through 301, 302, and power OFF state is obtained in the ICs 102, 103. When the ICT test is executed in this state, the voltage is not applied to the ICs 102, 103, and even if a pulse is applied due to creepage through the circuit except the power system, adverse influence is not affected for the ICs 102, 103. Accordingly, even if the ICs 102, 103 are the ICs in a CMOS system, no breakdown occurs.

Description

[Detailed Description of the Invention] Industrial Field of Application The present invention relates to an electronic circuit package used in electronic equipment such as a data processing device, and particularly relates to the purchase of an electronic component package that facilitates in-circuit testing. be.

BACKGROUND OF THE INVENTION Conventionally, this type of electronic circuit package has been equipped with a common power supply line for mounting ICs and other electronic components.

Therefore, in an electronic circuit package in which a group of 0MO8 ICs and a group of ordinary ICs are mounted at the same time, if you want to perform an in-circuit test (hereinafter referred to as ICT test) in which the ICs mounted in the package are performed as they are without removing them from the package. Since there is a group of 0MO8 type ICs that are easily affected by engineering CT tests, this test cannot be performed even for ordinary ICs that are not easily affected by ICT tests.

Problems to be Solved by the Invention: The purpose of the present invention is to solve the above-mentioned drawbacks, i.e., ICT testing.
It is an object of the present invention to provide a complex circuit package that solves the problem that a complete ICT test cannot be performed when an IC group that is more easily destroyed than an IC group and an IC group that is more difficult to destroy are mounted at the same time.

Means for Solving the Problems In order to solve the above-mentioned problems, the present invention provides a first IC group which is susceptible to adverse effects such as destruction during in-circuit testing, and which is susceptible to adverse effects such as destruction during in-circuit testing. second one or more I
C group is installed, the first IC group and the second IC group are installed.
An electronic circuit package structure is adopted in which an independent and separate '4 source supply line is provided for each IC#.

Operation Since the present invention was purchased as described above, when performing a mechanical CT test, the power supply lines of IC groups that are weak to the test are turned off and connected to ground, and voltage is applied only to the power supply lines of IC groups that are difficult to destroy. Since the test is performed by applying voltage, even if a pulse or the like passes through some circuits to other terminals of the IC that are vulnerable to testing, there will be no damage to these ICs.

Example.

Next, embodiments of the present invention will be described with reference to the drawings.

In FIG. 1 showing an embodiment of the present invention in a power supply system diagram,
The electronic circuit package 100 of the present invention includes a first IC group 1
01, the second IC group 102 and 103, and the first I
The power supply lines 104 and 105 of the C group 101 and the power supply lines 51os and 1 of the second IC group 102 and 103
07, and each power supply system line is configured so that power can be supplied separately from the outside.

Figure 2 shows the control circuit 2 for two power supply lines for ICT testing.
00, the first power supply @ line supplies voltage from positive and ground through the switch to 201 and 202, and the second power supply 4$c supply line supplies ground potential from ground through the switch to 203 and 204. supply.

FIG. 3 shows an S array in a state where the electronic component package of FIG. 1 is tested. Here, 100 is the package shown in Figure 1,
200 is the ICT tester in Figure 2, 301 and 302 are 2
Connecting wires that supply power to two power systems independently. In the test mode, the switch in the ICT tester is closed, and some of the components in the package are detected through 301 and 302.
The power supply terminal 101 is in a power-on state, and the other ICs 102 and 103 are connected to the power terminal ground, that is, the power supply is in a power-off state. If an ICT test is performed in this state,
No voltage is applied to ICs 102 and 103, and even if a pulse is applied through circuits other than the power supply line, these ICs 102 and 103 will not be adversely affected. Therefore, IC102 and 103 are CMO8
This means that even the system IC will not be damaged.

Effects of the Invention As explained above, according to the present invention, even in an electronic circuit package equipped with ICs that are easily destroyed by voltage application and its effects, these easily destroyed ICs are not affected in any way. This has the effect that ICT tests can be performed only on other ICs.

1. OH4 explanation of the drawings Fig. 1 is a schematic diagram of the power supply and control system of an electronic circuit package according to an embodiment of the present invention, and Fig. 2 is a diagram showing the power supply and control system of an electronic circuit package according to an embodiment of the present invention. Figure 3 is a system diagram of the power control system of an ICT tester that can open and close two power systems independently.
FIG. 3 is a diagram showing a state in which the electronic circuit package is tested in a mode in which the first power system is on and the second power system is off under the control of the T tester.

100...Electronic circuit package, 101...
...■IC that does not receive bad image l# during CT death, 102
, 103...ICTC test susceptible IC, 104...Positive side of power supply system m1, 1
05... Negative side of power system line 1, 106.
...Power system #i! 2 plus (+ river, 107・
... Negative side of power system line 2, 200...
・・ICT tester power supply control section, 201, 202・・・
...Power supply line to power system line 1, 203.204...
...Earth potential supply line to power supply system 51!2, 30
1゜302・・・Connection line.

Claims (1)

[Claims] In an electronic circuit package equipped with a first group of one or more ICs that are not susceptible to adverse effects such as destruction during in-circuit testing and a second group of one or more ICs that are susceptible to adverse effects such as destruction during in-circuit testing. . An electronic circuit package, characterized in that a power supply system line for supplying the first IC group and a power supply system line for supplying the second IC group are independently provided.