JPS6159664A - Waveform equalizing circuit - Google Patents
Waveform equalizing circuitInfo
- Publication number
- JPS6159664A JPS6159664A JP18140284A JP18140284A JPS6159664A JP S6159664 A JPS6159664 A JP S6159664A JP 18140284 A JP18140284 A JP 18140284A JP 18140284 A JP18140284 A JP 18140284A JP S6159664 A JPS6159664 A JP S6159664A
- Authority
- JP
- Japan
- Prior art keywords
- waveform
- delay
- positive
- peak point
- negative peak
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/10009—Improvement or modification of read or write signals
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B5/00—Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
- G11B5/02—Recording, reproducing, or erasing methods; Read, write or erase circuits therefor
- G11B5/027—Analogue recording
- G11B5/035—Equalising
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Digital Magnetic Recording (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、磁気ディスク装置の薄膜ヘッドによる再生信
号等の歪を補正する波形等化回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a waveform equalization circuit that corrects distortion of a reproduced signal or the like caused by a thin film head of a magnetic disk device.
近年、磁気ディスク装置の技術進歩は目覚ましく、特に
薄膜ヘッドの開発により高密度化指向が著しく向上して
いる。しかしながら、薄膜ヘッドは孤立波形の再生時に
は特有の負のピーク波形の発生を伴う特徴があり、これ
が信号再生系の信diU性を低下させるため対策が望ま
れている。In recent years, technological advances in magnetic disk drives have been remarkable, and in particular, the development of thin film heads has significantly improved the trend toward higher density. However, the thin film head is characterized by the generation of a unique negative peak waveform when reproducing an isolated waveform, and since this degrades the reliability of the signal reproducing system, countermeasures are desired.
従来の波形等化回路としては、第5図にその構成を示す
ようなコサイン型波形等化回路がある。As a conventional waveform equalization circuit, there is a cosine type waveform equalization circuit whose configuration is shown in FIG.
図において、再生信号は、入力を終端抵抗ROで終端し
である遅延量τの遅延素子1により時間τだけ遅れた後
、終端抵抗ROに比較して十分大きい入力インピーダン
スを有する加算器2に入力される。In the figure, the reproduced signal is input to a termination resistor RO, and after being delayed by a time τ by a delay element 1 having a delay amount τ, it is input to an adder 2 having a sufficiently large input impedance compared to the termination resistor RO. be done.
このとき、インピーダンスの不整合により信号は反射し
て、再び遅延素子1により時間τだけ遅れ、人力信号と
共に減衰器3により所要量減衰し、遅延素子lの反射端
とは逆極性で加算器に入力される。At this time, the signal is reflected due to the impedance mismatch, is delayed by the delay element 1 again by the time τ, is attenuated by the required amount by the attenuator 3 together with the human input signal, and is sent to the adder with the opposite polarity to the reflective end of the delay element 1. is input.
第6図は第51各部の波形図を示す。図において、半値
幅Wiを有する孤立波形Aを入力端子に印加した場合に
、遅延素子1の出力側には孤立波膨大から時間でだけ遅
れた波形Bが、インピーダンスの不整合による反射作用
で大きくなって現れる。FIG. 6 shows a waveform diagram of each part of the 51st part. In the figure, when an isolated waveform A having a half-width Wi is applied to the input terminal, a waveform B delayed by a certain amount of time from the solitary wave enlargement appears on the output side of the delay element 1, and becomes large due to the reflection effect due to impedance mismatch. It appears.
また、その反射作用で遅延素子1を逆方向に通過した波
形は、波形Bから更に時間τだけ遅延して、孤立波形A
と共に合成波形Cを形成し、減衰器3にて所要量の減衰
をうけ、波形りとなって加算器2の負側入力端子に入力
される。従って、加算器2の出力は波形Aから波形りを
減算して半値幅向に狭められた波形Eとなる。Also, due to the reflection effect, the waveform that passes through the delay element 1 in the opposite direction is further delayed by a time τ from the waveform B, and becomes an isolated waveform A.
Together, a composite waveform C is formed, which is attenuated by the required amount in an attenuator 3, and is input into the negative side input terminal of the adder 2 as a waveform. Therefore, the output of the adder 2 becomes a waveform E which is narrowed in the half width direction by subtracting the waveform difference from the waveform A.
このようなコサイン型波形等化回路は、従来のフェライ
トヘッドによる孤立波再生波形の補正に用いられるもの
であるが、第4図の波形(alに示す薄膜ヘッドの再生
波形に対し、同様の波形等化を行なった場合には同図(
blに示すように孤立波再生波形における独特の負のピ
ークが除去されないために、ビット間隔の広い部分で記
録データに対応しないピーク波形が発生する。このため
、エラーレート特性において、特に振幅マージンが減少
し、信号再生系の信頼性を著しく低下させる欠点があっ
た。Such a cosine waveform equalization circuit is used to correct the solitary wave reproduced waveform by a conventional ferrite head. The same figure (
As shown in bl, since the unique negative peak in the solitary wave reproduced waveform is not removed, a peak waveform that does not correspond to the recorded data occurs in a part with a wide bit interval. Therefore, in terms of error rate characteristics, in particular, the amplitude margin is reduced, which has the disadvantage of significantly lowering the reliability of the signal reproduction system.
本発明は上、記従来の欠点に鑑み、孤立波再生波形にお
ける半値幅を狭める従来の波形等化手段に加え、薄膜ヘ
ッド特有の負のピークを除去する機能を持たせることに
より、薄膜ヘッドの再生信号に適した波形等化回路の提
供を目的とする。In view of the above-mentioned conventional drawbacks, the present invention provides a thin-film head with a function of removing the negative peak peculiar to the thin-film head in addition to the conventional waveform equalization means that narrows the half-width of the solitary wave reproduced waveform. The purpose of this invention is to provide a waveform equalization circuit suitable for reproduced signals.
そしてこの目的は本発明によれば、出力端を終端した遅
延素子と減衰器と加算器とから構成されてなる波形等化
回路において、前記遅延素子を遅延量がそれぞれτ1.
τ2.τ3.τ4である4つの直列遅延素子にて構成し
、該直列遅延素子の人力信号となる1つの正のピーク点
と、2つの負のピーク点とを有する孤立波形に対して、
前記正のピーク点と、2つの負の各ピーク点との時間間
隔をそれぞれTI、 T、とじ、前記孤立波形の正の波
形の半値幅を前記正のピーク時点を境にTZ+T3とし
て、補正値α8.α2をそれぞれ(T2/2) >α1
> (−rz/2) 、 (T3/2) >αz >(
−T3/2) とした場合に、前記各遅延量を次式
%式%
にて求めることを特徴とする本発明の波形等化回路を提
供することにより達成される。According to the present invention, this purpose is to provide a waveform equalization circuit comprising a delay element whose output terminal is terminated, an attenuator, and an adder, in which each of the delay elements has a delay amount of τ1.
τ2. τ3. For an isolated waveform composed of four series delay elements with τ4 and having one positive peak point and two negative peak points, which are the human input signals of the series delay elements,
The time intervals between the positive peak point and each of the two negative peak points are set as TI and T, respectively, and the half-width of the positive waveform of the isolated waveform is set as TZ + T3 with the positive peak point as the border, and a correction value is calculated. α8. α2 respectively (T2/2) > α1
> (-rz/2), (T3/2) >αz >(
This is achieved by providing the waveform equalization circuit of the present invention, which is characterized in that the respective delay amounts are calculated using the following formula (%).
すなわち、本発明は遅延素子により遅れた再生信号波形
を利用し、遅延素子の遅延量を適当に選択することによ
り、薄膜ヘッド特有の孤立波再生波形における負のピー
クを打ち消し、かつ半値幅を狭めることにより、薄膜ヘ
ッドの再生信号の品質を改善するようにしたものである
。That is, the present invention uses a reproduced signal waveform delayed by a delay element, and by appropriately selecting the delay amount of the delay element, cancels out the negative peak in the solitary wave reproduced waveform peculiar to thin-film heads and narrows the half-width. By doing so, the quality of the reproduction signal of the thin film head is improved.
以下本発明の実施例を図面によって詳述する。 Embodiments of the present invention will be described in detail below with reference to the drawings.
第1図は本発明による波形等化回路のブロック図を示す
。なお、構成、動作の説明を理解し易くするために前回
と同一部分には同一符号を付して示した。FIG. 1 shows a block diagram of a waveform equalization circuit according to the present invention. In order to make the explanation of the configuration and operation easier to understand, the same parts as in the previous time are given the same reference numerals.
第1図において5〜8はそれぞれ遅延量がτ1゜τ2.
τ3.τ4である遅延素子、ROは終端抵抗、9〜12
はそれぞれ減衰量かに+ 、 KZ、に3.に4である
減衰器、13は加算器、14は入力端子、15は出力端
子を示す。またF−には第2図に示すような第1回答部
の出力波形図である。以下、第2図を参照しながら第1
図の作用について説明する。In FIG. 1, numbers 5 to 8 each have a delay amount of τ1°τ2.
τ3. τ4 is the delay element, RO is the terminating resistor, 9 to 12
are the attenuation amounts K+, KZ, and 3, respectively. 4 is an attenuator, 13 is an adder, 14 is an input terminal, and 15 is an output terminal. Further, F- is an output waveform diagram of the first answering section as shown in FIG. Below, with reference to Figure 2, the first
The effect of the diagram will be explained.
両図において、入力端子14に印加される入力信号(薄
膜ヘッドの出力する孤立波再生波形A)は、遅延素子5
〜8を直列に通り終端抵抗Roにより終端される。一方
、この4種類の遅延素子5〜8により時間差を持った5
種類の信号が得られる。5種類の信号の内、遅延素子6
の出力信号Hを除いて4種類の信号F、 G、 Iお
よびJは、それぞれ減衰量に+、Kz、に3.に4であ
る減衰器9〜12により減衰さる。これらの信号は共に
加算513に導かれる。In both figures, the input signal (solitary wave reproduction waveform A output from the thin film head) applied to the input terminal 14 is transmitted to the delay element 5.
.about.8 in series and is terminated by a terminating resistor Ro. On the other hand, these four types of delay elements 5 to 8 produce 5 with a time difference.
types of signals can be obtained. Among the five types of signals, delay element 6
The four types of signals F, G, I, and J, except for the output signal H, have attenuation amounts of +, Kz, and 3. It is attenuated by attenuators 9 to 12, which are 4 attenuators. These signals are routed together to summation 513.
加算器13では、前記減衰を受けない信号Hの極性を基
準として、減衰器9と12の出力信号を正、減衰器10
と11の出力信号を負としてそれぞれ加算処理を行う。The adder 13 sets the output signals of the attenuators 9 and 12 to be positive, based on the polarity of the unattenuated signal H, and the attenuator 10
Addition processing is performed by setting the output signals of and 11 as negative.
第3図は前にも述べたように薄膜ヘッドの出力する孤立
波再生波形で、第2図の信号Aに対応している。この波
形Aは1つの正のピーク点Pと、2つの負のピーク点Q
とRとを有し、P点とQ点との時間差をT、、 P点と
R点との時間差をT4とする。また、P点のレベルの5
0%レベルの時間幅(半値幅)を、P点の縦軸を境にT
2+T3とする。As mentioned above, FIG. 3 shows the solitary wave reproduction waveform output from the thin film head, and corresponds to signal A in FIG. 2. This waveform A has one positive peak point P and two negative peak points Q.
and R, and let the time difference between point P and point Q be T, and the time difference between point P and point R be T4. Also, level 5 of P point
The time width (half width) of the 0% level is T, with the vertical axis of point P as the border.
2+T3.
次ぎに各遅延素子の遅延量を補正するための補正値をα
1.α2として、
(T2/2) >α+ > (−Tz/2)(T3/2
) >α、 > (−T3/2)とした場合に、前記各
遅延量は次式
1式%
にて求めることにより、薄膜ヘッド特有の孤立波におけ
る負のピークを打ち消し、かつ半値幅を狭めることがで
きる。Next, the correction value for correcting the delay amount of each delay element is α
1. As α2, (T2/2) > α+ > (-Tz/2) (T3/2
) > α, > (-T3/2), each delay amount is calculated using the following formula 1% to cancel out the negative peak in the solitary wave peculiar to the thin-film head and narrow the half-width. be able to.
第2図における波形Hに波形Fと波形Jとを加算するこ
とは、入力信号の波形Aとレベル値が同じで遅延量τ1
+τ2だけ遅れた波形Hの負のピーク値QOとRoと
を打ち消す作用をなす。従って、波形Fの正のピーク値
Qlと波形Jの正のピーク値R1とはそれぞれQo=Q
、 Ro=R+となるように減衰量KIとに4とを設定
すればよい。Adding waveform F and waveform J to waveform H in FIG. 2 means that the level value is the same as waveform A of the input signal, and the delay amount τ1
It has the effect of canceling out the negative peak values QO and Ro of the waveform H delayed by +τ2. Therefore, the positive peak value Ql of waveform F and the positive peak value R1 of waveform J are respectively Qo=Q
, The attenuation amount KI and 4 may be set so that Ro=R+.
また、波形Hから波形Gと波形■とを減算することは、
波形Hの半値幅旧を狭める作用をなす。Also, subtracting waveform G and waveform ■ from waveform H is as follows:
It acts to narrow the half width of waveform H.
従って、減衰器10と11の減衰量に2及びに3は再生
信号中の隣接ビット間の波形干渉が十分小さくなる値に
設定すればよい。補正値α1及びα2は薄膜ヘッドの固
有の再生特性により補正を行う設定値の範囲を定めたも
のである。Therefore, the attenuation amounts 2 and 3 of the attenuators 10 and 11 may be set to values that sufficiently reduce waveform interference between adjacent bits in the reproduced signal. The correction values α1 and α2 define a range of set values for correction based on the unique reproduction characteristics of the thin film head.
本発明による波形等化の結果の一例を第4図の波形(Q
)に示した。An example of the results of waveform equalization according to the present invention is shown in the waveform (Q
)It was shown to.
以上詳細に説明したように本発明の波形等化回路によれ
ば、薄膜ヘッド特有の孤立波再生波形における負のピー
クを除去することができ、かつ半値幅も狭められるので
、エラーレート特性の改善ならびに薄膜ヘッド信号再生
系の信頼性向上に大きな効果がある。As explained in detail above, according to the waveform equalization circuit of the present invention, it is possible to remove the negative peak in the solitary wave reproduction waveform peculiar to thin-film heads, and the half-value width is also narrowed, thereby improving error rate characteristics. It also has a great effect on improving the reliability of the thin film head signal reproducing system.
第1図は本発明による波形等化回路のブロック図、
第2図は第1回答部の出力波形図、
第3図は薄膜ヘッドの出力する孤立波再生波形図、
第4図は孤立波再生波形(alに対する従来例の等価波
形(b)と本発明による等化波形(C)の比較例を示す
図、
第5図は従来のコサイン型波形等化回路のブロック図、
第6図は第5回答部の出力波形図を示す。
図において、5〜8はそれぞれ遅延量がτ、。
τ2.τ3.τ4である遅延素子、9〜12は減衰器、
13は加算器、Pは正のピーク点、QとRは負のピーク
点をそれぞれ示す。
6くFig. 1 is a block diagram of the waveform equalization circuit according to the present invention, Fig. 2 is an output waveform diagram of the first response section, Fig. 3 is a solitary wave reproduction waveform output from the thin film head, and Fig. 4 is a solitary wave reproduction waveform diagram. A diagram showing a comparison example of a conventional equivalent waveform (b) for waveform (al) and an equalized waveform (C) according to the present invention. 5 shows an output waveform diagram of the answering section. In the figure, 5 to 8 are delay elements whose delay amounts are τ, τ2, τ3, and τ4, 9 to 12 are attenuators,
13 is an adder, P is a positive peak point, and Q and R are negative peak points, respectively. 6
Claims (1)
されてなる波形等化回路において、前記遅延素子を遅延
量がそれぞれτ_1、τ_2、τ_3、τ_4である4
つの直列遅延素子にて構成し、該直列遅延素子の入力信
号となる1つの正のピーク点と、2つの負のピーク点と
を有する孤立波形に対して、前記正のピーク点と、2つ
の負の各ピーク点との時間間隔をそれぞれT_1、T_
4とし、前記孤立波形の正の波形の半値幅を前記正のピ
ーク時点を境にT_2+T_3として、補正値α_1、
α_2をそれぞれ(T_2/2)>α_1>(−T_2
/2)、(T_3/2)>α_2>(−T_3/2)と
した場合に、前記各遅延量を次式 τ_1+τ_2=T_1+α_1 τ_2=T_2+α_1 τ_3=T_3+α_2 τ_3+τ_4=T_4+α_2 にて求めることを特徴とする波形等化回路。[Scope of claims] In a waveform equalization circuit comprising a delay element whose output end is terminated, an attenuator, and an adder, the delay elements have delay amounts of τ_1, τ_2, τ_3, and τ_4, respectively.
For an isolated waveform composed of one series delay element and having one positive peak point and two negative peak points, which are the input signals of the series delay element, the positive peak point and two negative peak points The time intervals between each negative peak point are T_1 and T_, respectively.
4, the half-width of the positive waveform of the isolated waveform is T_2+T_3 with the positive peak time as the border, and the correction value α_1,
α_2 is (T_2/2)>α_1>(−T_2
/2), (T_3/2)>α_2>(-T_3/2), each delay amount is determined by the following formulas τ_1+τ_2=T_1+α_1 τ_2=T_2+α_1 τ_3=T_3+α_2 τ_3+τ_4=T_4+α_2 Waveform equalization circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59181402A JP2533077B2 (en) | 1984-08-29 | 1984-08-29 | Waveform equalization circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59181402A JP2533077B2 (en) | 1984-08-29 | 1984-08-29 | Waveform equalization circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6159664A true JPS6159664A (en) | 1986-03-27 |
JP2533077B2 JP2533077B2 (en) | 1996-09-11 |
Family
ID=16100122
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59181402A Expired - Lifetime JP2533077B2 (en) | 1984-08-29 | 1984-08-29 | Waveform equalization circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2533077B2 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61114611A (en) * | 1984-11-09 | 1986-06-02 | Hitachi Ltd | Waveform equalizing circuit |
EP0575624A1 (en) * | 1992-01-10 | 1993-12-29 | Fujitsu Limited | Circuit for equalizing waveform of signal reproduced by thin film magnetic head |
US5307213A (en) * | 1990-11-30 | 1994-04-26 | Hitachi, Ltd. | Data reproducing apparatus for eliminating undershoots in the vicinity of the outer edges of a magnetic pole |
US5337198A (en) * | 1990-11-30 | 1994-08-09 | Hitachi, Ltd. | Digital magnetic writing and reading apparatus |
EP0693213A1 (en) * | 1993-04-06 | 1996-01-24 | Cirrus Logic, Inc. | Spectral smoothing filter |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60136902A (en) * | 1983-12-26 | 1985-07-20 | Hitachi Ltd | Waveform equalizer |
-
1984
- 1984-08-29 JP JP59181402A patent/JP2533077B2/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60136902A (en) * | 1983-12-26 | 1985-07-20 | Hitachi Ltd | Waveform equalizer |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61114611A (en) * | 1984-11-09 | 1986-06-02 | Hitachi Ltd | Waveform equalizing circuit |
US5307213A (en) * | 1990-11-30 | 1994-04-26 | Hitachi, Ltd. | Data reproducing apparatus for eliminating undershoots in the vicinity of the outer edges of a magnetic pole |
US5337198A (en) * | 1990-11-30 | 1994-08-09 | Hitachi, Ltd. | Digital magnetic writing and reading apparatus |
EP0575624A1 (en) * | 1992-01-10 | 1993-12-29 | Fujitsu Limited | Circuit for equalizing waveform of signal reproduced by thin film magnetic head |
EP0575624A4 (en) * | 1992-01-10 | 1994-01-19 | Fujitsu Limited | |
US5440434A (en) * | 1992-01-10 | 1995-08-08 | Fujitsu Limited | Reproduced waveform equilizing circuit for thin-film magnetic head |
EP0693213A1 (en) * | 1993-04-06 | 1996-01-24 | Cirrus Logic, Inc. | Spectral smoothing filter |
EP0693213A4 (en) * | 1993-04-06 | 1996-02-21 |
Also Published As
Publication number | Publication date |
---|---|
JP2533077B2 (en) | 1996-09-11 |
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