JPS6159266A - Apparatus for measuring frequency - Google Patents

Abstract

PURPOSE:To attain the cost reduction of the titled apparatus, by performing delay many times by one delay line. CONSTITUTION:A high frequency signal inputted at an input port 1 is inputted not only to an I/Q phase discrimination circuit 4 through a band pass filter 2 and a distribution circuit 3a but also to a delay line 5 through a switch circuit 10. Next,a circuit 10 is changed over immediately before the high frequency signal is outputted from the line 5 and the high frequency signal outputted from the line 5 is amplified by an amplifier 11 to be inputted to a distribution circuit 3b to be divided into two and one of them is inputted to the circuit 4. The other high frequency signal of the circuit 3b is again fed back to the circuit 10 and once more inputted to the circuit 5 from the circuit 10. If a time is elapsed on and after this time while the circuit 10 is held to this state, the high frequency signal revolves succeedingly in this feedback loop to obtain a wave form V'B(t). Therefore, the high frequency signal is obtained at every delay times tau, 2tau-ntau and the output signal equal to the signal passed through the delay line just having a delay time of ntau is obtained.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a device for rapidly measuring the carrier frequency of a high-frequency signal using a phase discriminator, for example, when intercepting unknown radar radio waves over a wide band of frequencies. This relates to frequency measurement devices used in such applications.

[Prior art]

Conventionally, there has been a device of this type as shown in FIG.

In the figure, (1) is a high frequency signal input terminal, into which, for example, unknown radar radio waves are input. What about (2)? ll11 Bandpass filter path for determining the constant frequency bandwidth (
This is an arithmetic circuit that calculates the frequency of the input high-frequency signal from the output of 4). (7) is a terminal for outputting coded frequency information after calculation.

The operation of the conventional technique will be explained.

In Fig. 1, the high frequency signal input to the input terminal rll is limited by the bandpass filter (2) to the bandwidth for measuring the frequency, and unnecessary signals outside the band are removed. p=signal amplitude). On the other hand, the signal that reaches the r/Q phase discrimination circuit (4) via the delay line (5) has a phase corresponding to the delay time = τ = ωτ (ω; 2πf is the angular velocity of the input high-frequency signal). Since it is different, Vn(t)
It is expressed as = pω(t+τ).

Here, regarding the operation of the /Q phase discrimination circuit (4), as is well known, two types (I and Q) of sine amplitude characteristics can be obtained as the output detection video depending on the phase difference between the two input signals. , mixer type, multiplier type, etc.

Figure 2 shows the basic configuration of the K mixer type. In Figure 2, (21) is the high frequency signal input terminal, (23) is the 3db90@hybrid, (2) is the in-phase power divider, (C) is the balanced mixer 1) (C)
is balanced mixer 2, object is IF1 output terminal, field is IF
'2 output terminal, the top is the terminating resistor.

Therefore, for the input high-frequency signal buttons of VA(t) and VB(t), the outputs of the 3/Q phase discriminator circuit (4) and Q are obtained as follows.

I('s ``K(!IIθ Q('s = Kself θ) where K is a constant representing the maximum amplitude of the output video including the detection efficiency (9), and is expressed as 5, K = −P'' .At this time, θ must be within the following range.

0≦ σ=ωτ=2πfτ ku2π The bandpass filter (2) mentioned above is for determining the range of this θ ◇ Therefore, as mentioned above, the output video is sine with respect to changes in the input frequency. This becomes a curve, and the input frequency can be calculated conversely from this relationship.

Input carrier frequency = f = tan - 凰 (Q / I) / 2 * r The frequency calculation circuit (6) is a 5 circuit that performs the above calculation,
Frequency information is encoded and output from the output terminal (7).

The above description is just the basic configuration, and in reality, the phase amount -〇 is divided into 64 (
26) resolution is the limit. Therefore, in order to obtain even more accurate frequency resolution, it is common to use a multi-stage configuration as shown in FIG. In the example shown in FIG. 3, a three-stage structure is used in which the delay times of the delay lines (5a) to (5C) are changed to 1, 4, and 16 times, respectively. With this, it is possible to increase the accuracy by 16 times compared to the case where sg is performed in one stage, and the accuracy can be further improved by increasing the number of stages.

In addition, in the case of a multi-stage configuration as shown in Figure 6, the delay time of the delay lines (5a) to (5c) will have errors due to manufacturing precision, etc., so the frequency It is necessary to correct the output of the arithmetic circuit (61).The correction circuit (9) is a logic circuit that performs this function, and performs inter-stage correction of the output of each stage from the stage with the highest accuracy. This circuit ultimately determines data with the precision of the delay line (5c), which has the highest precision.

Conventional frequency measuring devices have been configured in multiple stages using delay lines with different delay times in order to improve frequency measurement accuracy, resulting in large scale and high cost devices.

[Summary of the invention]

This invention was made in order to eliminate the above-mentioned drawbacks of the conventional technology. By delaying the signal many times using - delay lines, it is possible to equivalently realize a long-time operation [line]. The purpose is to provide a compact frequency measurement device.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. Fourth
In the figure, α[ is a switch circuit that switches between the input high-frequency signal and the high-frequency signal that has passed through the delay line (5);
is an amplifier, and (11 is a shift register that sequentially stores the output of the frequency calculation circuit (6) at intervals of the delay time of the delay line (5).

Next, the operation will be explained. The high frequency signal inputted from the input terminal 111 is made similar to the conventional circuit, and one goes directly from the distribution circuit (3a) to the 0/phase discrimination circuit (4).

・・・・・・VA(t) The other output of the distribution circuit (6a) is initially connected to the switch circuit α [
Since it is connected to the delay line (5) as shown in FIG. 4, it is connected to the delay line (51) in the same way as in the conventional case.

Next, just before the time τ has elapsed, that is, the slow Iga path (5
) Just before the high frequency signal is output from the switch circuit 0ω
Switch to the opposite terminal as shown. And the delay line (5
) is amplified by the amplifier Uυ and then sent to the distribution circuit (3b), where the signal is divided into two parts, one of which is sent to the four-phase discrimination circuit (similar to the conventional device).
4) Enter.・・・・・・・・・ Vf+ (t) On the other hand, the other high frequency signal of the distribution circuit (6b) is returned to the switch circuit αO again, and the switch circuit is switched to the opposite terminal as shown in FIG. Another 7 degrees delay circuit from α0 (
Enter 5). After this time, if the switch circuit υ remains in this state and time passes, the high frequency signal continues to circulate in this RfJk loop and becomes y as shown in Figure 5.
6 (t> waveform is obtained.

Therefore, the delay time τI2τ+3'r...
A high frequency signal is obtained every time . . . , nτ, .

Then, the high frequency signals v(t) and v'B(t) are
The phase is detected by the phase discrimination circuit (4) every moment, and the frequency code is calculated by the frequency calculation circuit (6).
are sequentially read and stored. Then, after n1 hours have elapsed, the frequency code stored in the shift register (LS5) becomes full with hourly frequency information, and this information is corrected in the correction circuit (9) in the same way as in conventional devices, and the output terminal ( 7), it is possible to obtain the same result as a conventional multi-stage device by outputting it as a frequency code.

However, if the high-frequency signal returns repeatedly, the amplifier (1υ
The noise generated in
The return cycle cannot be continued indefinitely because the frequency measurement accuracy deteriorates as the ratio) decreases.

As described above, the series of operations is completed through these steps, and by returning to the initial state, it becomes possible to deal with the next high frequency signal.

〔Effect of the invention〕

As described above, according to the present invention, a long delay line is equivalently realized by delaying a signal many times using - number of delay lines, so there is no need for a multi-stage configuration. Therefore, the device can be made inexpensive and the same performance can be obtained with a smaller volume.

[Brief explanation of drawings]

Figure 1 is a block diagram showing a conventional frequency measurement device, Figure 2 is a block diagram showing a conventional frequency measurement device.
The figure is a block diagram showing the basic configuration of a mixer-type phase discrimination circuit, Figure 3 is a block diagram of a conventional device configured in multiple stages, and Figure 4 is a block diagram showing a frequency measuring device according to an embodiment of the present invention. FIG. 5 is a diagram showing the elapse of time when the signal is busy in this embodiment. (Jl...input terminal, (2)...bandpass filter, (31...distribution circuit, (4)...6 phase discrimination circuit, (5)...delay line, (6) ... Frequency calculation circuit, (7) ... Output terminal, (8) ... 5 distribution circuit, (9) ... Correction circuit, f11 river switch circuit, α2
...Shift register. In the drawings, the same reference numerals //'i indicate the same or similar parts.

Claims (1)

[Claims] A delay line that changes the phase of an input high-frequency signal carried at the frequency to be measured by delaying it for a certain period of time, and a delay line that changes the phase of the input high-frequency signal carried by the frequency to be measured by delaying the signal for a certain period of time. A return loop including the switch circuit and the delay line, and a high-frequency signal output of the return loop and the above-mentioned input high-frequency signal are phase synthesized and detected, and the amplitudes are equal and the phase difference is 90°. A frequency measurement device comprising an I/Q phase discrimination circuit for obtaining bipolar video.