JPS6159000B2 - - Google Patents
Info
- Publication number
- JPS6159000B2 JPS6159000B2 JP55140614A JP14061480A JPS6159000B2 JP S6159000 B2 JPS6159000 B2 JP S6159000B2 JP 55140614 A JP55140614 A JP 55140614A JP 14061480 A JP14061480 A JP 14061480A JP S6159000 B2 JPS6159000 B2 JP S6159000B2
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- board device
- circuit elements
- circuit element
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000010438 heat treatment Methods 0.000 claims description 16
- 238000002844 melting Methods 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 8
- 230000008018 melting Effects 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims description 6
- 230000020169 heat generation Effects 0.000 claims description 2
- 229910000679 solder Inorganic materials 0.000 description 16
- 239000004065 semiconductor Substances 0.000 description 12
- 239000004020 conductor Substances 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 230000032683 aging Effects 0.000 description 1
- 239000007767 bonding agent Substances 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000004907 flux Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 238000009736 wetting Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
Description
【発明の詳細な説明】
本発明は、配線基板装置上に搭載される集積回
路等の回路素子を交換する際に、その交換作業を
容易に行ない得るようにした配線基板装置におけ
る回路素子交換方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention provides a method for replacing circuit elements in a wiring board device, which facilitates the replacement work when replacing circuit elements such as integrated circuits mounted on the wiring board device. It is related to.
一般に、厚膜配線基板あるいはプリント基板等
の配線基板装置上に複数の回路素子を搭載してな
る混成集積回路モジユールにおいては、その製造
工程やエージング工程中に回路素子の性能が低下
したり、あるいは素子自体が破壊された場合、そ
の回路素子の交換が行なわれる。その交換の際に
は、基板装置と回路素子を接合している低融点金
属あるいは接合剤を加熱によつて溶融あるいは軟
化させた状態で、回路素子を基板装置から取外
し、しかる後に新たな回路素子の取付けが行なわ
れるようになつている。 In general, in a hybrid integrated circuit module in which multiple circuit elements are mounted on a wiring board device such as a thick film wiring board or a printed circuit board, the performance of the circuit elements may deteriorate during the manufacturing process or aging process, or If the element itself is destroyed, the circuit element is replaced. When replacing the circuit element, the low melting point metal or bonding agent that joins the board device and the circuit element is melted or softened by heating, and then the circuit element is removed from the board device, and then the new circuit element is replaced. The installation is about to take place.
ところで、交換対象としての回路素子以外の回
路素子は、その際接続の確保や特性劣化防止の点
から極力加熱されないことが望ましい。このため
従来にあつては赤外線ランプを用い赤外線を集光
させて局部加熱を行なう方法や、熱風を小口径の
ノズルから吹出させて局部加熱を行なう方法等が
採用されている。しかしながら、それら従来方法
による場合は、所要部分のみに対する局部加熱や
加熱部分に対する温度制御が極めて困難であり、
作業能率が低いという不具合がある。 Incidentally, it is desirable that circuit elements other than the circuit element to be replaced be heated as little as possible in order to ensure connection and prevent characteristic deterioration. For this reason, conventional methods have been adopted, such as a method in which an infrared lamp is used to condense infrared rays to locally heat the area, and a method in which hot air is blown out from a small-diameter nozzle to locally heat the area. However, when using these conventional methods, it is extremely difficult to locally heat only the required areas or to control the temperature of the heated areas.
There is a problem with low work efficiency.
本発明の目的は、前記従来の問題点を除去する
ことにあり、所望の回路素子取り付け部分のみを
状態良好に局部加熱することで、回路素子の交換
が容易に行なわれるを可とした配線基板装置にお
ける回路素子交換方法を供するにある。 SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above-mentioned conventional problems, and to provide a wiring board that enables easy replacement of circuit elements by locally heating only the desired circuit element mounting area in good condition. The present invention provides a method for replacing circuit elements in an apparatus.
このため本発明は、配線基板装置上の回路素子
対向位置にそれぞれ設けられた発熱パターンを選
択的に発熱させ、配線基板装置側電極によつてこ
の電極近傍の低融点金属を溶融することで、回路
素子の取外し、取付けを行なうが、その際回路素
子には所定の方向の力を作用させるようにしたも
のである。 For this reason, the present invention selectively generates heat in heating patterns provided at positions facing the circuit elements on the wiring board device, and melts the low melting point metal in the vicinity of this electrode using the electrode on the wiring board device side. When removing and installing circuit elements, a force is applied to the circuit elements in a predetermined direction.
以下、本発明の一実施例を図面を用い詳細に説
明する。先ず第１図は本発明による配線基板装置
を示したものである。図中、１は厚膜配線基板、
２は厚膜配線基板１上に設けられた配線パターン
であり、その端部には回路素子、例えば半導体素
子３の電極b1〜b4とはんだ４を介して接続される
電極a1〜a4が設けられている。また、この電極a1
〜a4の下部には、電圧印加端子７及び導体６を介
して電圧が印加された場合発熱する発熱パターン
５が設けられたものとなつている。更にこの厚膜
配線基板１は外部ヒータ（図示せず）によりその
上面が接合用はんだが溶融しない程度に均一な温
度を保持する予熱板８上に配置されている。尚、
前記電圧印加端子７は各発熱パターン対応に独立
に設けられているものである。 Hereinafter, one embodiment of the present invention will be described in detail using the drawings. First, FIG. 1 shows a wiring board device according to the present invention. In the figure, 1 is a thick film wiring board;
Reference numeral 2 denotes a wiring pattern provided on the thick film wiring board 1, and the ends thereof have electrodes a 1 to a connected to electrodes b 1 to b 4 of a circuit element, for example, a semiconductor element 3 via solder 4 . 4 are provided. Also, this electrode a 1
A heating pattern 5 that generates heat when a voltage is applied through the voltage application terminal 7 and the conductor 6 is provided at the lower part of ~ a4 . Furthermore, this thick film wiring board 1 is placed on a preheating plate 8 whose upper surface is maintained at a uniform temperature to the extent that the joining solder does not melt by an external heater (not shown). still,
The voltage application terminals 7 are provided independently for each heating pattern.
上記構成において、半導体素子３の交換を行な
う場合には、先ず基板全体が予熱板８により接合
用はんだ４が溶融しない程度まで加熱される。次
いで半導体素子３に、この半導体素子３を厚膜配
線基板１から引き離す方向の引張り力Ｆを付加し
た状態で、この半導体素子３の取付部分に位置す
る発熱パターン５対応の電圧印加端子７に電圧を
印加することにより、発熱用パターン５を発熱さ
せるようにするものである。この熱は、厚膜配線
基板１の上面に達し、更に電極a1〜a4を加熱して
はんだ４を加熱する。したがつて、はんだ４は電
極a1〜a4との接合面から溶融が始まるが、電極a1
〜a4の全ての接合面が溶融すると、引張り力Ｆに
よつて半導体素子３が引上げられ、半導体素子３
は厚膜基板１から取り外されることになるもので
ある。予熱板８によつて予め予熱しておく場合
は、速やかに取外しを行ない得るものである。 In the above configuration, when replacing the semiconductor element 3, the entire board is first heated by the preheating plate 8 to such an extent that the joining solder 4 does not melt. Next, while applying a tensile force F in the direction of separating the semiconductor element 3 from the thick film wiring board 1 to the semiconductor element 3, a voltage is applied to the voltage application terminal 7 corresponding to the heating pattern 5 located at the mounting part of the semiconductor element 3. By applying this, the heat generating pattern 5 is made to generate heat. This heat reaches the upper surface of the thick film wiring board 1, further heats the electrodes a1 to a4 , and heats the solder 4. Therefore, the solder 4 starts to melt from the joint surface with the electrodes a 1 to a 4 , but
When all the bonding surfaces of ~ a4 are melted, the semiconductor element 3 is pulled up by the tensile force F, and the semiconductor element 3
is to be removed from the thick film substrate 1. If it is preheated using the preheating plate 8, it can be removed quickly.
さて、半導体素子３を取り外した後に新たに別
の半導体素子を取り付けるには、取り外し時とは
逆の操作を行なうことで達成し得る。第１図を用
い説明すれば、新たな半導体素子の電極には半導
体素子３と同様はんだ４が既設されており、この
はんだ４を厚膜配線基板１の電極a1〜a4の上に位
置合せした状態で電圧印加端子７に電圧を印加す
れば、発熱用パターン５が発熱しこの熱が電極a1
〜a4を介し、はんだ４に伝達されてはんだ４が溶
融し、電極a1〜a4とはんだ４が接合されるわけで
ある。接合後は発熱用パターン５による発熱は停
止されるものである。なお、はんだ４と電極a1〜
a4のぬれをよくするため、フラツクスを電極a1〜
a4上に塗布した状態で作業を行なうのが望ましい
ものとなつている。 Now, in order to newly attach another semiconductor element after removing the semiconductor element 3, it can be achieved by performing the operation opposite to the operation at the time of removal. To explain using FIG. 1, solder 4 is already provided on the electrodes of a new semiconductor element, similar to the semiconductor element 3, and this solder 4 is placed on the electrodes a1 to a4 of the thick film wiring board 1. When a voltage is applied to the voltage application terminal 7 in the combined state, the heating pattern 5 generates heat, and this heat is transferred to the electrode a 1
~ a4 is transmitted to the solder 4, the solder 4 is melted, and the electrodes a1 ~ a4 and the solder 4 are joined. After bonding, the heat generation by the heat generating pattern 5 is stopped. In addition, the solder 4 and the electrode a 1 ~
To improve wetting of a 4 , flux is applied to electrodes a 1 ~
It has become desirable to carry out the work while it is coated on A4 .
第２図は本発明の他の実施例である厚膜配線基
板装置の平面を示すもので、厚膜配線基板１表面
上の回路素子取付エリアC1〜C9各々の内部には
発熱パターンR1〜R9が形成されており、また、
厚膜基板１の周縁部には発熱パターンR1〜R9に
電圧を印加するための端子X1，X2，X3，Y1，
Y2，Y3が露出形成されており、これらは縦、横
方向に走る導体２，２′を介し発熱パターンR1〜
R9に接続されるようになつている。本例でも素
子取付エリア内には第１図で説明した如く、回路
素子と接合するための電極及び配線パターンが設
けられており、これら下部に絶縁層を介し発熱パ
ターンR1〜R9が形成されたものとなつている。
各発熱パターンR1〜R9は電圧印加端子X1〜X3の
何れか１つとY1〜Y3の何れか１つとを任意に組
合せることによつて、任意の発熱用パターンのみ
発熱させ得るものである。本例では電圧印加端子
の取付け態様が先の場合と異なることを除けば事
情は同様であり、任意の回路素子を取り外し、ま
たその後に新たな回路素子を接続することによつ
ては任意の位置の回路素子に対し交換を行ない得
るものである。 FIG. 2 shows a plan view of a thick film wiring board device according to another embodiment of the present invention, and inside each of the circuit element mounting areas C 1 to C 9 on the surface of the thick film wiring board 1 there is a heating pattern R. 1 to R9 are formed, and
Terminals X 1 , X 2 , X 3 , Y 1 ,
Y 2 and Y 3 are formed exposed, and these are connected to heating patterns R 1 to R 1 through conductors 2 and 2' running in the vertical and horizontal directions.
It is now connected to R9 . In this example, as explained in Fig. 1, electrodes and wiring patterns are provided in the element mounting area to connect with the circuit elements, and heating patterns R 1 to R 9 are formed below these with an insulating layer interposed therebetween. It has become something that has been done.
Each heating pattern R 1 to R 9 can generate heat only in an arbitrary heating pattern by arbitrarily combining any one of voltage application terminals X 1 to X 3 and any one of Y 1 to Y 3 . It's something you get. In this example, the situation is the same except that the manner in which the voltage application terminal is attached is different from the previous case. circuit elements can be replaced.
なお、本発明は基板が厚膜配線基板以外でも、
また、基板と回路素子の接続がダイボンデイング
のものでも適用可となつている。 Note that the present invention applies even when the substrate is other than a thick film wiring board.
Furthermore, it is also possible to use die bonding to connect the substrate and circuit elements.
以上述べた如く、本発明によれば、取り外すべ
き回路素子に対応する発熱パターンのみを発熱さ
せ、接合用はんだを溶融することで、回路素子の
交換を容易に行ない得るが、その際接合用はんだ
を基板側から加熱していることから、基板側電極
上に残留するはんだの量の均一化が図れ、改めて
はんだ量の調整を行なうことなく新たな回路素子
の取付けが可能であり、また、多数の回路素子が
取付けされた基板に対し、任意の回路素子取付エ
リア部のみの局部加熱が可能であるため、他の回
路素子に影響を与えることなく交換作業の能率が
大幅に向上されるという効果がある。 As described above, according to the present invention, circuit elements can be easily replaced by generating heat only in the heating pattern corresponding to the circuit element to be removed and melting the joining solder. Since the solder is heated from the board side, the amount of solder remaining on the board side electrodes can be made uniform, and new circuit elements can be installed without having to adjust the amount of solder again. Since it is possible to locally heat only the circuit element mounting area of a board on which circuit elements are mounted, the efficiency of replacement work is greatly improved without affecting other circuit elements. There is.
第１図は本発明に係る配線基板装置での回路素
子交換方法を説明するためのその模式的断面を示
す図、第２図は本発明に係る他の配線基板装置の
平面を示す図である。
１……厚膜配線基板、２……配線パターン、３
……半導体素子、４……はんだ、５……発熱パタ
ーン、６……導体、７……電圧印加端子。
FIG. 1 is a schematic cross-sectional view for explaining a circuit element replacement method in a wiring board device according to the present invention, and FIG. 2 is a plan view of another wiring board device according to the present invention. . 1... Thick film wiring board, 2... Wiring pattern, 3
...Semiconductor element, 4...Solder, 5...Heating pattern, 6...Conductor, 7...Voltage application terminal.
Claims (1)
極に低融点金属を介し該基板装置上に接続された
回路素子を、新たな回路素子と交換する際での配
線基板装置における回路素子交換方法であつて、
交換対象としての回路素子に取外し方向に力を作
用させた状態で、配線基板装置上の回路素子対向
位置に各々設けられた発熱パターンを、上記交換
対象としての回路素子に応じて選択的に発熱駆動
し、配線基板装置側電極を介し低融点金属を溶融
することで該素子を配線基板装置より取り外した
後、新たな回路素子に取外し方向とは逆の方向に
力を作用させた状態で該素子を該素子に既接続の
低融点金属を介し配線基板装置側電極に接続し、
接続の完了を待つて発熱パターンに対する発熱駆
動が停止されることを特徴とする配線基板装置に
おける回路素子交換方法。 ２ 回路素子交換の際、配線基板装置は低融点金
属が溶融しない程度に予熱状態におかれる特許請
求の範囲第１項記載の配線基板装置における回路
素子交換方法。[Claims] 1. In a wiring board device when a circuit element connected to the wiring pattern of the wiring board device via a low melting point metal is replaced with a new circuit element. A circuit element replacement method,
While a force is applied to the circuit element to be replaced in the removal direction, heat generation patterns provided at positions facing the circuit elements on the wiring board device are selectively heated according to the circuit element to be replaced. After removing the element from the wiring board device by driving and melting the low melting point metal through the electrode on the wiring board device side, the new circuit element is removed while applying a force in the opposite direction to the removal direction. Connecting the element to an electrode on the wiring board device side via a low melting point metal already connected to the element,
A method for replacing circuit elements in a wiring board device, characterized in that heating drive for a heating pattern is stopped after waiting for completion of connection. 2. A method for replacing circuit elements in a wiring board device according to claim 1, in which the wiring board device is preheated to such an extent that the low-melting point metal does not melt when replacing the circuit elements.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14061480A JPS5764990A (en) | 1980-10-09 | 1980-10-09 | Method of exchanging circuit element in wired substrate unit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14061480A JPS5764990A (en) | 1980-10-09 | 1980-10-09 | Method of exchanging circuit element in wired substrate unit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5764990A JPS5764990A (en) | 1982-04-20 |
| JPS6159000B2 true JPS6159000B2 (en) | 1986-12-13 |
Family
ID=15272796
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14061480A Granted JPS5764990A (en) | 1980-10-09 | 1980-10-09 | Method of exchanging circuit element in wired substrate unit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5764990A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH026199U (en) * | 1988-06-25 | 1990-01-16 |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5944900A (en) * | 1982-09-08 | 1984-03-13 | 松下電器産業株式会社 | Circuit board device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4919550A (en) * | 1972-06-16 | 1974-02-21 | ||
| JPS54116670A (en) * | 1978-03-03 | 1979-09-11 | Nippon Telegraph & Telephone | Flexible sheet for electric connection |
-
1980
- 1980-10-09 JP JP14061480A patent/JPS5764990A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4919550A (en) * | 1972-06-16 | 1974-02-21 | ||
| JPS54116670A (en) * | 1978-03-03 | 1979-09-11 | Nippon Telegraph & Telephone | Flexible sheet for electric connection |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH026199U (en) * | 1988-06-25 | 1990-01-16 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5764990A (en) | 1982-04-20 |
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