JPS6153753B2 - - Google Patents

Info

Publication number
JPS6153753B2
JPS6153753B2 JP15427079A JP15427079A JPS6153753B2 JP S6153753 B2 JPS6153753 B2 JP S6153753B2 JP 15427079 A JP15427079 A JP 15427079A JP 15427079 A JP15427079 A JP 15427079A JP S6153753 B2 JPS6153753 B2 JP S6153753B2
Authority
JP
Japan
Prior art keywords
memory
data
bus
memory bus
timing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15427079A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5679353A (en
Inventor
Yasushi Fukunaga
Tadaaki Bando
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP15427079A priority Critical patent/JPS5679353A/ja
Publication of JPS5679353A publication Critical patent/JPS5679353A/ja
Publication of JPS6153753B2 publication Critical patent/JPS6153753B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Multi Processors (AREA)
  • Bus Control (AREA)
JP15427079A 1979-11-30 1979-11-30 Memory bus data transfer method of multiprocessor Granted JPS5679353A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15427079A JPS5679353A (en) 1979-11-30 1979-11-30 Memory bus data transfer method of multiprocessor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15427079A JPS5679353A (en) 1979-11-30 1979-11-30 Memory bus data transfer method of multiprocessor

Publications (2)

Publication Number Publication Date
JPS5679353A JPS5679353A (en) 1981-06-29
JPS6153753B2 true JPS6153753B2 (US20110009641A1-20110113-C00256.png) 1986-11-19

Family

ID=15580488

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15427079A Granted JPS5679353A (en) 1979-11-30 1979-11-30 Memory bus data transfer method of multiprocessor

Country Status (1)

Country Link
JP (1) JPS5679353A (US20110009641A1-20110113-C00256.png)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2519165B1 (fr) * 1981-12-30 1987-01-16 Finger Ulrich Procede d'echange de donnees entre des modules de traitement et une memoire commune dans un systeme de traitement de donnees et dispositif pour la mise en oeuvre de ce procede
DE3235739C2 (de) * 1982-09-27 1984-07-12 Nixdorf Computer Ag, 4790 Paderborn Verfahren zur Vorbereitung der Anschaltung einer von mehreren datenverarbeitenden Einrichtungen an eine zentral taktgesteuerte Mehrfach-Leitungsanordnung
JPS60245063A (ja) * 1984-05-21 1985-12-04 Fujitsu Ltd 共用メモリアクセス方式

Also Published As

Publication number Publication date
JPS5679353A (en) 1981-06-29

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