JPS6151506U - - Google Patents

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Publication number
JPS6151506U
JPS6151506U JP1984134673U JP13467384U JPS6151506U JP S6151506 U JPS6151506 U JP S6151506U JP 1984134673 U JP1984134673 U JP 1984134673U JP 13467384 U JP13467384 U JP 13467384U JP S6151506 U JPS6151506 U JP S6151506U
Authority
JP
Japan
Prior art keywords
circuit
processing unit
central processing
controlled
digital servo
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984134673U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1984134673U priority Critical patent/JPS6151506U/ja
Publication of JPS6151506U publication Critical patent/JPS6151506U/ja
Pending legal-status Critical Current

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  • Numerical Control (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Feedback Control In General (AREA)
  • Control Of Electric Motors In General (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案回路の各回路ブロツクの配置の
一実施例を示す図、第2図、第4図及び第6図は
夫々本考案回路の各要部の一実施例の回路系統図
、第3図、第5図は夫々第2図及び第4図図示回
路系統の動作説明用信号波形図、第7図及び第9
図は夫々本考案回路の各回路ブロツクの相互配線
によつて構成することのできる位相比較器及び周
波数弁別回路の一実施例の回路系統及びブロツク
系統図、第8図及び第10図は夫々第7図図示回
路系統及び第9図図示ブロツク系統の動作説明用
信号波形図、第11図は本考案回路を使用して各
回路ブロツク間を相互配線した後のデイジタルサ
ーボ回路の一例を示す回路系統図である。 1…基板、2…中央処理装置(CPU)、3
〜3i,50,69…時間測定回路、4〜4j
,67…単安定マルチバイブレータ、5〜5k
…プログラマブル・カウンタ、6〜6m…ゲー
ト回路、7〜7n…入出力(I/O)インター
フエース、10,30,40…プログラマブルタ
イマ、28,38,43,63,72…出力端子
、51…ドラムパルス入力端子、57…サンプリ
ングパルス入力端子、66…回転検出パルス入力
端子、75…ヘツドモータ回転検出パルス入力端
子、76,98,103,105…周波数弁別回
路、80…ヘツドスイツチング回路、83,10
0…位相比較器、87…ヘツドモータ、101…
キヤプスタンモータ、108…リールモータ、1
09…テープローデイングモータ、110…カセ
ツトハウジングモータ。
FIG. 1 is a diagram showing one embodiment of the arrangement of each circuit block of the circuit of the present invention, and FIGS. 2, 4, and 6 are circuit diagrams of one embodiment of each essential part of the circuit of the present invention, respectively. 3 and 5 are signal waveform diagrams for explaining the operation of the circuit systems shown in FIGS. 2 and 4, respectively, and FIGS. 7 and 9.
The figure shows a circuit system and a block system diagram of an embodiment of a phase comparator and a frequency discriminator circuit that can be constructed by interconnecting the circuit blocks of the circuit of the present invention, and FIGS. FIG. 7 is a signal waveform diagram for explaining the operation of the illustrated circuit system and FIG. 9 is a signal waveform diagram for explaining the operation of the illustrated block system. FIG. 11 is a circuit system showing an example of a digital servo circuit after interconnecting each circuit block using the circuit of the present invention. It is a diagram. 1... Board, 2... Central processing unit (CPU), 3 1
~3i, 50, 69...time measurement circuit, 4 1 ~4j
, 67...monostable multivibrator, 5 1 ~ 5k
...Programmable counter, 6 1 to 6m... Gate circuit, 7 1 to 7n... Input/output (I/O) interface, 10, 30, 40... Programmable timer, 28, 38, 43, 63, 72... Output terminal, 51...Drum pulse input terminal, 57...Sampling pulse input terminal, 66...Rotation detection pulse input terminal, 75...Head motor rotation detection pulse input terminal, 76, 98, 103, 105...Frequency discrimination circuit, 80...Head switching circuit, 83,10
0... Phase comparator, 87... Head motor, 101...
Capstan motor, 108...Reel motor, 1
09...Tape loading motor, 110...Cassette housing motor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] デイジタルサーボ回路に必要な回路部が機能毎
に搭載された基板上の上記各回路部を任意に選択
して、それらの各回路部間に任意の配線工程を行
なつて所望のデイジタルサーボ回路機能を形成せ
しめられる半導体集積回路であつて、該配線工程
直前の該基板上に上記回路部として、一の中央処
理装置と、該中央処理装置により制御し得る複数
の時間測定回路と、該中央処理装置により時定数
を制御できる複数の単安定マルチバイブレータと
、該中央処理装置により制御し得る複数のプログ
ラマブルカウンタと、複数のゲート回路と、複数
の入出力インターフエースとが互いに独立して夫
々配設してなるデイジタルサーボ用半導体集積回
路。
The circuit sections necessary for the digital servo circuit are mounted for each function by arbitrarily selecting each of the above circuit sections on the board, and performing any wiring process between the circuit sections to achieve the desired digital servo circuit function. A semiconductor integrated circuit is formed on the substrate immediately before the wiring step, and includes a central processing unit, a plurality of time measurement circuits that can be controlled by the central processing unit, and the central processing unit as the circuit portion on the substrate immediately before the wiring process. A plurality of monostable multivibrators whose time constants can be controlled by the device, a plurality of programmable counters which can be controlled by the central processing unit, a plurality of gate circuits, and a plurality of input/output interfaces are arranged independently from each other. A semiconductor integrated circuit for digital servo.
JP1984134673U 1984-09-05 1984-09-05 Pending JPS6151506U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984134673U JPS6151506U (en) 1984-09-05 1984-09-05

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984134673U JPS6151506U (en) 1984-09-05 1984-09-05

Publications (1)

Publication Number Publication Date
JPS6151506U true JPS6151506U (en) 1986-04-07

Family

ID=30693180

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984134673U Pending JPS6151506U (en) 1984-09-05 1984-09-05

Country Status (1)

Country Link
JP (1) JPS6151506U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55127607A (en) * 1979-03-26 1980-10-02 Shimadzu Corp Free-program type process controller
JPS5977660A (en) * 1982-09-17 1984-05-04 アムペツクス コーポレーション Capstan servo apparatus

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55127607A (en) * 1979-03-26 1980-10-02 Shimadzu Corp Free-program type process controller
JPS5977660A (en) * 1982-09-17 1984-05-04 アムペツクス コーポレーション Capstan servo apparatus

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