JPS6149853B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides an automatic tuning device, especially when radio broadcasts with the same content are transmitted using multiple broadcast waves, the reception state of the broadcast waves exceeds a preset reference level. This invention relates to an improvement in an automatic channel selection device configured to automatically detect good broadcast waves.

Some conventional automatic channel selection devices employ a method called frequency diversity, which detects the electric field strength level or noise level and compares it with a reference level to switch the reception of broadcast waves. However, in such a conventional system, reception of broadcast waves is simply switched based on a simple judgment based on the result of comparison with the reference level, which is insufficient. For example, if this method is applied to shortwave broadcasting where fading is large, the number of times of switching becomes too large, causing interruptions in the reproduced sound at the time of switching, and other various problems.

There is also a conventional method in which a plurality of receivers are provided and the output levels of each are compared to perform reception switching, but this method lacks practicality in terms of cost and space when considering how to fit it into a small consumer set.

The present invention has been made to improve the problems of the prior art, and it does not simply switch the reception of broadcast waves by comparing the signal level (S level) with a preset reference level, but instead performs various Switching is performed by adding a switching condition timing according to the radio wave situation, and if the detected signal level of the received broadcast wave becomes weak and does not recover within a predetermined time, the signal with the best S/N among the broadcast waves with the same content is set. It is characterized by being configured to select items.

The present invention will be described below with reference to embodiments shown in the drawings. FIG. 1 shows one embodiment in which the present invention is applied to a radio receiver configured with a PLL synthesizer circuit. In the figure, 1 is a high frequency amplifier, 2 is a mixer, 3 is a local oscillator, 4 is an intermediate frequency amplifier, and 5 is a high frequency amplifier.
1 is a detection circuit, 6 is a muting circuit, and 7 is an audio amplifier, which constitute a known radio receiver. 8 is an S level detection circuit that detects the carrier level of the received broadcast wave in a narrow band.

9 is a PLL circuit, 10 is a PLL data memory circuit (ROM), 11 is an address decoder for the memory circuit, 12 and 13 are reference level setting circuits, 14 and 1
5 is a comparison circuit, 16 is a differentiation circuit, 17, 18 and 19 are timers, 20, 21, 22 are up counters, 23 is a digital comparison circuit, 24 is a mono multivibrator, 25 is a flip-flop circuit, 26 is a down counter, 27 is a shift register, 28 is a data bus line, 29 is an automatic mode switch, AND ₁ to AND ₁₄ are AND circuits, and OR ₁ to OR ₄ are OR circuits.

Now, an example of broadcasting that transmits the same broadcast content using multiple broadcast waves is radio shortwave broadcasting.
Looking at the radio wave conditions, there is a fading characteristic of shortwave broadcasting, and even when detecting broadcast waves with good reception conditions, it may not be possible to say that the result is good even if the S level detection comparison is done instantaneously. .

For example, if the reference S level is set to 40 dB, it is not necessary to switch the receiving broadcast wave for instantaneous fading F, and it is necessary to switch the receiving broadcast wave for fading F with a long period. . Further, even if the reference S level is set to 20 dB, if the S level is lower than that, the reception condition is often poor, so switching is necessary. Thus, there is a need for a circuit that automatically detects good broadcast waves, taking into consideration the radio wave conditions unique to short waves.

Therefore, in the present invention, the reference level setting circuit 12,
13, the high level and low level, which are the reference levels for S level comparison, for example, 40 dB,
Two levels equivalent to 20 dB are set and applied to comparison circuits 14 and 15, where they are compared with the output from the S level detection circuit 8. The comparator circuit 14 is supplied with a low S level value (for example, a value corresponding to a level at which a signal equivalent to 20 dB is weak and difficult to hear) from the reference S level setting circuit 12, that is, a low reference S level.

Now, if you turn on the automatic mode switch 29,
In automatic detection mode, the pulse from the differentiator circuit 16 triggers the timer 17 via the OR circuit _OR1 , and the timer 17 outputs an output pulse after a predetermined period of time has elapsed.

At this time, since the S level and the low reference S level are compared by the comparator circuit 14, the comparison result is sent to the AND circuit AND ₁ and the above output pulse.
It is determined by giving it to AND ₂ . When the S level is lower than the low reference S level, the output of the comparator circuit 14 is high, so the output of the AND circuit _AND1 is high, triggering the timer 18. After a predetermined period of time has elapsed, the output pulse of the timer 18 is output to the comparator circuit 14.
It is applied to AND circuits AND ₃ and AND ₄ together with the output of , and judged again. As a result, if the S level is still low, the output of the AND circuit _AND3 becomes high level, operating the address decoder 11 via the OR circuit _OR2 , and reading out the PLL data previously stored in the memory circuit 10. The signal is input to the PLL circuit 9 and the broadcast wave of the next station is received. Further, the flip-flop circuit 25 is turned on by the output of the OR circuit OR ₂ , and the muting circuit 6 is operated by the output, thereby applying muting when the PLL circuit 9 is switched.

The reason why the timer 18 is provided here is to detect the magnitude of the S level that is detected again after a predetermined time has elapsed as described above, and to indicate that the S level has been lower than the low reference S level to some extent. This is to make a judgment and switch if it continues.

If the output of the AND circuit AND ₄ is at a high level,
Since the S level has increased, there is no switching and the timer 17 operates again. When the output of the AND circuit AND ₂ is at a high level, the S level is high, so the operation moves to the next comparison circuit 15.

Next, the comparator circuit 15 receives a value from the reference S level setting circuit 13 that is high even at the S level (for example,
A high reference S level signal is provided which is set at 40 dB). The value of this signal is set to such an extent that it cannot be said whether or not switching is necessary. The output of the comparison circuit 15 is given to the AND circuit AND ₆ via the AND circuit AND ₅ , and as a result of the comparison of the S level with the high reference S level,
If the S level is high, the output of the AND circuit _AND6 becomes high level, causing the up counter 21 to count up and causing the timer 17 to operate again via the OR circuit _OR3 . and timer 1
The output of 7 is sent to counter 2 via AND circuit AND ₂ .
It is given to 0 and causes the count to increase.

The counter 20 is for accumulating the output count of the timer 17, and when the set count is reached, a carry is output and the counter is cleared.

On the other hand, the up counter 21 is
It is used to integrate the comparison results when the S level is large.

Further, the up counter 22 is used to add up the results when the S level is small. That is, if the comparison result in the comparison circuit 15 is that the S level is lower than the high reference S level, the comparison result is counted up by the up counter 22 via AND circuits _AND7 and _AND8 . up counter 2
The count data accumulated in 1 and 22 is sent to the digital comparator circuit 2 by the carry output of the counter 20.
3, it compares the size and outputs the result. That is, the output of the digital comparison circuit 23 is given to the OR circuit OR ₂ , and the comparison result by the comparison circuit 15 shows that the number of times the S level was higher than the high reference S level is smaller than the number of times it was smaller. If the number of times the S level is higher than the high reference S level is smaller than the number of times the S level is higher than the high reference S level, the switching operation is performed as described above.

Now, in the case of radio shortwave broadcasting, there are three broadcasts of the same broadcast content, and as a result of the above comparison, the operation when switching occurs three times in a row will now be described.

If the switching occurs three times in a row, or if the switching is determined by the comparator circuit 14 as shown in the table below (1) to (7)
and the case (8) in which switching is made only by the judgment of the comparison circuit 13 is included.

(1) 30dB (2) 30dB (3)10dB (4)10dB 30〃 10〃 30〃 10〃 10〃 10〃 30dB 30dB (5)10dB (6)30dB (7)30dB (8) 10dB 30〃 10〃 30〃 10〃 10〃 30〃 30〃 10〃 In the above cases, regarding (3), (4), (6) and (7), the third received broadcast is replaced with (1), (2) and ( Regarding 8), 1
The degree of switching is reduced by newly receiving the first received broadcast and, regarding (5), the second received broadcast. This is because in the states (1) to (8) above, not all broadcasts are being received very well, so it is better to stop them than to switch them.

To explain its operation, the output of the OR circuit 2 counts down the down counter 26, which is preset to "2". The output of the digital comparison circuit 23 is input to the shift register 27, and the number of switching points is stored based on the judgment of the comparison circuit 15. As mentioned above, when the down counter 26 switches three times in a row and a borrow output is output, the contents of the shift register 27 are changed to the AND circuit by the borrow output.
It passes through AND ₉ to AND ₁₁ and is sent to the address decoder 11 via the data bus 28, which determines which station should be received, and extracts the PLL data corresponding to that address from the storage circuit 10 and sends it to the PLL circuit. 9 and receive it. The down counter 26 and shift register 27 perform preset and shift registers, respectively, when a borrow output occurs and when the comparator circuit 15 determines that the number of times the S level was greater than the high reference S level is greater than the number of times it was small. cleared.

The timer 19 is activated by the borrow output of the down counter 26, and this is to prevent switching from occurring for a certain period of time to newly received broadcast waves. That is, in this case, the output of the timer 19 is connected to the AND circuit _AND5 and
Since it is applied to the negative input of AND ₈ , it disables the judgment result of the comparator circuit 15 for a predetermined period of time, and
It is also applied to the negative input of AND ₁₂ , similarly disabling the determination result of the comparison circuit 14, and enabling it after a predetermined period of time has elapsed.

In all cases (8), the S level is lower than the low reference S level and the switching occurs, and in this case, the frequency that caused the switching is returned to and the switching does not occur for a certain period of time as described above. Normally, muting is canceled by clearing the flip-flop 25 at the time when the output of the AND circuit _AND6 becomes high when the determination result of the comparison circuit 15 is high. Muting is canceled when a new signal is received after the above-mentioned three consecutive switchings are performed by clearing the flip-flop 25 by passing the borrow output of the down counter 26 through the OR circuit _OR4 .

The mono multivibrator 24 is used to operate the timer 17 at a predetermined timing after the flip-flop circuit 25 is set.

As is clear from the above explanation, according to the present invention, it is possible to automatically detect broadcast waves that are always in good reception condition and receive the most suitable broadcast waves, and it also uses a PLL channel selection method. Therefore, the synchronization is also good.

[Brief explanation of the drawing]

The figure is a block diagram showing one embodiment of the present invention. 2... Mixing circuit, 3... Local oscillator, 4... Intermediate frequency amplifier, 5... Detection circuit, 6... Muting circuit, 8... S level detection circuit, 9... PLL circuit, 1
2, 13... Reference level setting circuit, 14, 15... Comparison circuit.

Claims (1)

[Claims] 1. Means for detecting a signal level in a radio receiver that receives signals by switching reception frequencies using a PLL circuit, means for setting low and high reference signal levels, and a detected signal level and a low reference signal level. a first comparison means for comparing the detected signal level and the high reference signal level;
If the detected signal level as a result of the comparison by the first comparing means is below the low reference signal level, the means causes the first comparing means to perform the comparison again after a predetermined time has elapsed; means for controlling the PLL circuit to switch the reception frequency when the signal level is below the low reference signal level; means for causing a second comparing means to perform a comparison after this switching; In the following case, the automatic selection is characterized by comprising means for controlling the PLL circuit so as to select a signal having a level that is intermediate to the level of the detected signal at the time of comparison by the first and second comparing means. station equipment. 2. The radio receiver has a muting circuit, and is configured to operate the muting circuit to perform a channel selection operation according to the determination results of the first and second comparing means and the radio wave condition. An automatic channel selection device according to claim 1. 3 having first and second counters, the first counter integrating the results when the detected signal level is greater than the high reference signal level, and the second counter integrating the results when the detected signal level is smaller; The automatic channel selection device according to claim 1, characterized in that the PLL circuit is configured to control a PLL circuit so as to compare the respective integration times and switch the received broadcast wave according to the comparison result. .