JPS6148024A - Bidirectional matrix device - Google Patents

Abstract

PURPOSE:To double the number of inputs or outputs selectable by the number of the same selection signal lines by providing two elements for output and input at an intersecting portion and separating them by using polarity of a diode. CONSTITUTION:At each intersecting portion, a pair of luminous diodes LED1- LED32 are connected in parallel with reverse polarity respectively. T10-T13 are longitudinal selecting transistors and T20-T23 are horizontal selecting transistors. T30-T32 are power source switching transistors and feeds a power source V to any one of a longitudinal selection circuit SEL1 comprising T10-T13 or a horizontal selection circuit SEL2 by a parity selection signal EN. Accordingly, when the signal EN is 1, T31, T30 are turned ON, and the luminous diode LED1...LED31 of odd number can be selected, and when the signal EN is ''0'', T32 is turned ON, and the luminous diodes LED2...LED32 of even number can be selected.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a bidirectional matrix device that can double the number of inputs or outputs without increasing the number of selection signal lines.

[Conventional technology]

A matrix circuit in which only one intersection is selected by the vertical direction -A-E and horizontal direction selection signals outputs (displays)
It is used for both purpose and input.

Figure 5 shows an example of a conventional display matrix circuit, 3x3
= 9 light emitting diodes LED + , LED 2°・
3+3=6 types of selection signals VO~
V2. The selection is made using HO-H2. T
1 to T3 are vertical selection signals ■H (high) of 0 to V2,
Transistor T4 turned on and off by L (low)
-T6 are transistors that are turned on and off according to H and L of the horizontal selection signals HO to H2.

To select one light emitting diode in this matrix circuit, only one vertical selection signal is set to [■]], and only one horizontal selection signal is set to L. For example, to select the light emitting diode LED +, ■〇-H (V1=V2=L)
to turn on the transistor T1 and set HO=L.
(1-11=) I 2 =I() to turn off the transistor T4 and allow the current from the power supply DD to flow through only the LED+ to the transistor T1. At this time, LED 2. LED:1 is also connected to transistor T1, but transistor T5. Since T6 is on, those seven nodes are grounded and do not emit light.

[Problem that the invention seeks to solve]

In the above-mentioned matrix circuit, (m+n) types of selection signal lines are required to configure the intersection of (mxn)I[ffl, so in order to increase the number of intersections, the number of selection signal lines must be increased. must be increased.

Generally, in order to use such a matrix circuit for output (display) or for manual key operation, a microprocessor (M
However, since the number of input/output terminals of a microprocessor is limited, it has the disadvantage that it cannot be connected to a matrix circuit of a certain size or more.

Multi-IJ circuits are becoming larger in size as the switches and displays on the front operation panels of in-vehicle devices become more multifunctional (this is a positive trend. However, they must be made smaller in terms of space). There are also conflicting demands that one intersection should have two exits.

By providing blade or input elements and separating them using diode polarity, the number of inputs or outputs that can be selected with the same number of selection signal lines is doubled.

[Failure to solve the problem]

The present invention connects a pair of diodes in parallel with opposite polarities to each intersection of a matrix circuit in which only one intersection is selected by vertical and horizontal selection signals, and utilizes the polarity of the pair of diodes. The invention is characterized in that two types of input or output are performed using one intersection.

[Effect]

The pair of diodes in each cross section can polarize one cross section into two cross sections, thereby doubling the number of lines that can be input or output with the same number of selection signal lines. This will be explained in detail below with reference to illustrated embodiments.

〔Example〕

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and MTX is (
This is a display matrix circuit having 4×4) intersections. Each intersection has a pair of light emitting diodes (LE
DI, LED2), (LED3.LED4),...
...(LED3., LED32) are connected in parallel with opposite polarity. "l O"" T I3 is a transistor that is turned on and off by the vertical selection signal VO~■3, T2
OT23 is a transistor that is turned on and off by the horizontal selection signals HO to H3.

T2O-T32 are 1-transistors forming the switching circuit PS of the power supply VDD. This power supply switching circuit PS supplies a power supply VDD to either the vertical selection circuit SEL+ or the horizontal selection circuit SEL2, which is made up of transistors T10 to Tl3, in response to the odd-even selection signal EN. In other words, when the signal EN is 1 (H), the transistor T31
, T2O is turned on and the odd numbered light emitting diode L
EDr, LED: 1. ...LED3. or become selectable. Conversely, when the signal EN is 0 (L), the transistor T32 is turned on and the even numbered light emitting diodes LED2. LED , + , ...LED32
becomes selectable. In the selection circuit to which power is supplied from the circuit PS, an off transistor has a bitter taste, and in a selection circuit to which no power is supplied, an on transistor has a bitter taste. As a driving method for the display matrix circuit MTX, there is a dynamic driving method in which, for example, 110-83 are sequentially switched as a timing number 1, and vO to 3 are given data according to the display contents. In this example, an odd-even switching signal EN is added to this to double the number of display elements.

The operation will be explained below with reference to FIG. This figure is a main part circuit diagram centered on the generation diodes LEDI and LED2 of FIG. 1. When the odd-even selection signal EN is 1 (odd number), the transistor T30. T.

turns on and VDD is applied to the collector of transistor T2o.
is applied. At this time, if the signal HO is 0 (L) and the transistor T20 is off, and the signal 0 is 1 (H) and the transistor Tlo is on, the current flows along the path indicated by the solid arrow in the figure, and the odd-numbered light emitting diode LED + lights up. Conversely, when the odd-even selection signal EN is 0 (even number), the transistor T32 is turned on and the transistor T1 is turned on.
VDD is applied to the collector of o. Therefore, believe]! −
When IO is 1, 1-transistor T20 is turned on, and the signal ■
If the transistor TIO is off at 0 or 0, a current flows along the path indicated by the dashed arrow in the figure, and the even-numbered light emitting diodes LED 2 light up.

The above logic is shown in Table 1.

Table 1 The overall logic is shown in Table 2 (when EN=1) and Table 3 (when EN=1).
= 0).

Table 2 In the embodiment described above, there is one signal line for the odd-even selection signal EN.
Although this extra circuit is required, the scale of the matrix circuit MTX can be substantially doubled by this increase alone.

FIG. 3 shows another embodiment of the present invention applied to an input matrix. At each intersection of the matrix circuit MTX, a pair of diodes (DI, D2) connected in parallel with opposite polarity,
(Dl, D4), . . . (D17D+8), and switches Sl, S2 . . . connected in series with each diode.・・・・・・
...SI8 is provided. MPU selects signals VO to V2
．． The macro processor generates HO~82 and scans the matrix circuit MTX, and uses the input/output baud 1- as shown in FIG. In other words, purchase one input/output board with MO3I-transistors Q+ to Q3, and
S transistors Q4 to Q6 constitute another input/output port. 1 - transistor Q1. Q4 is in a high impedance state at input, and is switched internally as a pull-up resistor at output (controlled by the I10 terminal (11 ports)).Transistors Q2 and Q5 are driven by signals from inside the MPU. transistor Q
: ], Q6 is for input driven by an external signal. Depending on whether these input/output ports are used as shown in the solid line or as shown in the broken line, one of the switches at the same intersection is selected (scanned).

For example, switch S1. Taking the intersection of S2 as an example, the output transistor Q2 is turned off, the input/output switching transistor Q1 is turned on, and the selection signal HO is set to 1.
When monitoring with the input transistor Q6 with 0 as the input level (at this time, Q4 is off and in a high impedance state.

), if switch S1 is off, ■0 is grounded by pull-down resistor R2, so it is 0; conversely, S, f, S, +
If is on, 1 of HO is connected to resistor R through Sl and Dl.
2, so vo=i, and in response to this, transistor Q6 is turned off (when V O = O) or on (when V O = 1). Conversely, the output transistor Q5 is turned off, the input/output switching transistor Q4 is turned on, the selection signal 0 is set to 1, the current HO is set to the input level, and the 1-transistor Q3 (at this time, Ql is in a high impedance state). ), it can be determined whether the switch S2 is on or off based on the voltage generated across the pull-down resistor R1.

The table below is a logical table showing this.

Table 4 This is true for all other intersections.

Incidentally, in the case of an input matrix as in this example, since odd-even switching can be performed within the processor MPU, there is no need to draw out the odd-even selection signal EN as shown in FIG. 1 to the matrix circuit. Then, the MPU performs selective scanning at a constant timing and monitors the on/off states of all switches in the matrix circuit MTX.

〔Effect of the invention〕

As described above, according to the present invention, two output or input elements are provided at each intersection of a matrix circuit having a plurality of intersections, and these are separated using the polarity of the diode. Therefore, the number of inputs or outputs that can be selected with the same number of selection signal lines can be doubled. Therefore, there is an advantage that the number of wires connecting between the matrix circuit and the processor can be reduced, and that more inputs or outputs can be processed even if the processor has fewer input/output terminals. Therefore, it is possible to effectively meet the contradictory demands of multi-functionality and miniaturization such as in in-vehicle equipment.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram showing an embodiment of the present invention applied to a display matrix, Fig. 2 is a main part circuit diagram for explaining its operation,
Fig. 3 is a circuit diagram showing another embodiment of the present invention applied to an input matrix, Fig. 4 is a main part circuit diagram for explaining its operation, and Fig. 5 is a circuit showing an example of a conventional unidirectional matrix. It is a diagram. In the figure, MTX is a matrix circuit, LED+, LED=,
. . . are light emitting diodes, Dl, D2.・・・・・・
... is a diode, Sl, S2. . . . is a switch, MPU is a microprocessor, and PS is a power supply switching circuit.

Claims (1)

[Claims] A pair of diodes are connected in parallel with opposite polarities to each intersection of a matrix circuit in which only one intersection is selected by vertical and horizontal selection signals, and one A bidirectional matrix device characterized in that two types of input or output are performed at the intersection.