JPS6147029B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a ghost detection device that is applied to remove ghosts that are a problem when receiving television signals.

A method for removing ghosts in the video stage is to detect the level of the in-phase component or quadrature component of the ghost, and use this detection output to form a cancellation signal that is simulated as a ghost, and to remove the ghost from the video signal containing the ghost. There is one that synthesizes signals. Another method is to simulate the ghost transfer function using a transversal filter to form a cancellation signal. In either method, it is necessary to detect ghosts from a constant waveform that is included in standard television signals and is independent of the video signal. Usually, as shown in FIG. 1A, the detection period is often an H/2 period up to the equalization pulse after (and before) the leading edge VE of the vertical synchronizing signal.
The waveform of the ghost varies depending on the phase difference between the desired signal and the unnecessary signal at the high frequency stage. When the delay time of the unnecessary signal with respect to the desired signal is τ and the video carrier angular frequency at the high frequency stage is ω _c , (=ω _c τ). As an example (=0
A video intermediate frequency signal containing a ghost with a delay time τ of 4.5 [μ _s ] or more at 4.5 [μs] or more becomes the one shown in Figure 2A, and when this is synchronously detected, it becomes the one shown in Figure 1B. A video signal containing ghosts is obtained.

However, when receiving television signals, an AGC circuit is provided in conjunction with the tuner's RF amplifier and video intermediate frequency amplifier. Since the AGC circuit operates to keep the level of the leading edge of the synchronizing signal constant, the AGC operates to reduce the level of the leading edge of the synchronizing signal that is prominent in some parts as shown in Figure 2A. In this case, a sag as shown in FIG. 2B occurs during the rising operation of the AGC operation, and therefore the waveform after synchronous detection also includes a sag as shown in FIG. 1C. Since this sag occurs within the ghost detection section, a ghost cannot be accurately detected from such a waveform. However, if the time constant of the AGC circuit is made longer, Figure 1B
The waveform shown in can be obtained as is. but,
As a result, deterioration in image quality increases due to disturbances such as motor noise, ignition noise, and flutter noise.

In view of the above points, the present invention disables the AGC operation or disables the AGC operation during a part of the vertical blanking period that includes a predetermined section from the leading edge of the vertical synchronization signal required for ghost detection. The time constant is made large.

FIG. 3 shows the basic configuration of an embodiment of the present invention. In the figure, 1 is a tuner, 2 is a video intermediate frequency amplifier, 3 is a synchronous detection circuit, and 4 is a circuit required for synchronous detection. This is a carrier extraction circuit that extracts the carrier from the video intermediate frequency signal. The video signal from the synchronous detection circuit 3 is supplied to the ghost removal circuit 5 and is also supplied to the AGC circuit 6.
An AGC voltage for the RF amplifier and video intermediate frequency amplifier 2 of the tuner 1 is generated from the AGC circuit 6. At the output terminal 7 of the ghost removal circuit 5, a video signal from which the ghost has been removed appears. This video signal is supplied to a switching signal generation circuit 8, which generates a switching signal P _S. The time constant of the AGC circuit 6 is switched by this switching signal P _S , and the time constant of the AGC circuit 6 is made large in the ghost detection period.

FIG. 4 shows a more detailed configuration of an embodiment of the present invention. The ghost removal circuit 5 of this example is designed to remove ghosts with a simple configuration, taking into account that most actual ghosts are one delayed ghost. In other words, the levels of the in-phase and quadrature components of the ghost change depending on the difference in reception channels (that is, the difference in ω _c ), but when the ghost is transmitted from one location, the delay time τ of the ghost remains constant. It is. Therefore, the delay time τ is determined and the levels of the in-phase component and quadrature component are controlled to form a cancellation signal.

The leading edge of the vertical synchronization signal is used to detect the levels (including polarity) of the in-phase and quadrature components. FIG. 5 shows the waveform near the leading edge of the vertical synchronization signal according to the phase difference ( ) at the high frequency stage between the desired signal and the ghost. (=0
In the case of (=180°), there is a ghost with the same polarity as the in-phase component, and in the case of (=180°), there is only the in-phase component with the opposite polarity, and similarly (
=90°) and (=270°), only orthogonal components are present. Taking into account the peculiarities of such waveforms, at least three positions are selected, including a first position determined by the ghost delay time (τ) with respect to the desired signal, and second and third positions separated by a predetermined time before and after the first position.
Detect the level of the video signal at a point. 6th
The figure shows a first position X ₁ , a second position X ₂ and a third position X ₃ in the case of (=225°), respectively, as an example. If the detection level at each position is V ₁ , V ₂ , and V ₃ , then the detection signal V _I obtained by the calculation of (V ₂ − _{V 3} )
corresponds to the level and polarity of the in-phase component of the ghost, and is the detection signal V _Q obtained by the calculation of (V ₂ - V ₁ ).
corresponds to the level and polarity of the orthogonal component, assuming that the ghost of the in-phase component is removed.

Therefore, an in-phase component and a quadrature component are formed for the video signal delayed by τ, and the levels and polarities of the in-phase component and quadrature component are weighted in proportion to the above-mentioned detection signals V _I and V _Q. ,
Thereafter, the ghost can be canceled by adding the two and combining the output of this addition, that is, the cancellation signal, with the video signal.

In FIG. 4, a video signal Sd obtained by synchronous detection is supplied to a combiner 9, where it is combined with a cancellation signal. This synthesizer 9
The output S ₁ of is taken out to the output terminal 7. A cathode ray tube (not shown) is connected to the output terminal 7 via a video amplifier or the like, as in a normal television receiver. Further, the output of the synthesizer 9 is supplied to a delay circuit 11. The delay circuit 11 can be realized using a delay line, a charge transfer element, etc., and includes a plurality of delay lines such that the difference in delay amount between the i-th tap and the (i+1) or (i-1)th tap is equal. Taps have been derived. One of the plurality of taps is selected by the switching means 12, and the video signal _S2 appearing at the selected tap is supplied to the in-phase and quadrature component generating circuit 13. The in-phase component is multiplier 1
4I, the orthogonal component is supplied to multiplier 14Q, and the outputs of multipliers 14I and 14Q are supplied to adder 1
5, and a cancellation signal _S3 is generated at the output of this adder 15.

The output of the synthesizer 9 is applied to an in-phase and quadrature component detection circuit 16, which is shown surrounded by a broken line. This detection circuit 16 includes sampling and holding circuits 17, 18, and 19 to which the output of the synthesizer 9 is supplied, and output voltages V1 and _V1 of the sampling and holding circuits 17 and 18.
The synthesizer 20Q is supplied with V ₂ and generates a detection output of (V ₂ −V ₁ =V _Q ), and the output voltages V ₂ and V ₃ of the sampling and hold circuits 18 and 19 are supplied with (V ₂ −V ₃ = V _I ), and the outputs V _Q of the combiners 20Q and 20I.
and analog accumulators 21Q and 21I that cumulatively add V _I . The output of accumulator 21I is supplied to multiplier 14I as a multiplication coefficient, and the output of accumulator 21Q is supplied to multiplier 14Q as a multiplication coefficient. This makes it possible to form cancellation signals corresponding to the in-phase and quadrature components of the ghost, respectively.

sampling hold circuit 17 of the detection circuit 6;
Sampling pulses for each of 18 and 19
P ₁ , P ₂ , and P ₃ are formed by a sampling pulse generation circuit 22 shown surrounded by a broken line. The sampling pulse generation circuit 22 can generate the sampling pulse P ₁ at a position corresponding to the ghost delay time τ. Delay circuit 1 selected by switching means 12
The video signal _S2 appearing at tap 1 is supplied to a vertical synchronization signal leading edge detection circuit 23, and its output is as follows:
A detection pulse Pv that rises at the position of the leading edge is generated.
The leading edge of the sync-separated vertical sync signal typically lags slightly behind that in the input video signal, so
A leading edge detection circuit 23 generates a detection pulse Pv that corresponds to that in the video signal. From this detection pulse Pv, a monostable multivibrator 24,
25, 26, 27, and 28 form sampling pulses P ₁ , P ₂ , and P ₃ . The monostable multivibrators 24, 25 are for defining the positions of the sampling pulses P ₁ and P ₃ , and the monostable multivibrators 26, 27, 28 are for regulating the positions of the sampling pulses P ₁ , P ₂ , and P _3. This is to specify the width. The position of the leading edge of each sampling pulse is the detection position X ₁ , X ₂ ,
Compatible with _X3 .

The in-phase and quadrature component generation circuit 13 is configured to generate orthogonal components using a transversal filter or a differentiating circuit, and also to generate an in-phase component via a delay circuit that corrects the delay time caused by these components. The delay time thus generated by the in-phase and quadrature component generating circuit 13 is assumed to be τ ₂ .

A monostable multivibrator 29 is also provided which is triggered by the output of the leading edge detection circuit 23 and generates a switching signal P _S . This switching signal P _S is supplied to the AGC circuit 6, and the switching signal P _S
The time constant of the AGC circuit 6 is switched to a longer one only during the high level period.

FIG. 7 shows an example of the leading edge detection circuit 23. A video signal S ₂ is supplied to an input terminal indicated by 30 in FIG. 7, and this video signal S ₂ is supplied to a vertical sync separation circuit 31 and a horizontal sync separation circuit 32. The video signal S ₂ is what appears at the output of the switching means 12. The vertical synchronization separation circuit 31 has an integrator with a long time constant, and the horizontal synchronization separation circuit 32
has an integrator with a short time constant, and both are
In both cases, a clamp circuit is provided before the integrator to perform APL.
(average video signal level). When the level of a ghost, especially a ghost of an opposite phase, is high, the video carrier wave becomes small, making it difficult to detect a horizontal synchronizing signal, and in some cases, a horizontal synchronizing signal is dropped. In order to prevent this, if the integration time constant is shortened, the vertical synchronization signal cannot be detected accurately due to the presence of the equalization pulse. Therefore, two separate sync separation circuits, a vertical sync separation circuit 31 and a horizontal sync separation circuit 32, are provided.

As shown in Figure 8A, it consists of equalized pulses.
A video signal S 2 in which a 3H vertical synchronizing signal period VD is located after a 3H equalization pulse period EQ ₁ , and _a 3H equalization pulse period EQ ₂ is located further after that is input to the input terminal 3.
0, the output Sv' of the integrator of the vertical synchronization separation circuit 31 becomes as shown in FIG. 8B. In other words, for the horizontal synchronization signal or equalization pulse,
Because the time constant is large, the level of the integrator output Sv′ does not reach the reference level, and the vertical synchronization signal period
At VD, the integrator output Sv' reaches the reference level, and a vertical synchronization signal that rises at this timing is generated. The monostable multivibrator 33 is triggered by the rise of this vertical synchronization signal, and a pulse _P4 shown in FIG. 8C is generated. The rise of this pulse _P4 triggers the monostable multivibrator 34, which generates the reset pulse _P5 shown in FIG. 8D. The time constant of the monostable multivibrator 33 is selected such that the pulse width of its output pulse _P4 is slightly longer than the vertical synchronization signal period VD,
The monostable multivibrator 34 is prevented from being triggered by noise included during the vertical synchronization signal period VD.

This reset pulse _P5 is supplied to the counter 35. The counter 35 counts the output of the reference oscillator 36 at a sufficiently higher frequency (200 [kHz] to 1 [MHz]) than the horizontal frequency. As the reference oscillator 36, for example, a crystal oscillator can be used. Counter 3 is activated at the rising edge of reset pulse _P5 mentioned above.
5 is reset, and the output pulse _P6 shown in FIG. 8E is generated from the counter 35 after a period of approximately (1V-1H) (where 1V is one vertical period). Further, the horizontal synchronization signal Sh (including the equalization pulse) is separated from the horizontal synchronization separation circuit 32 as shown in FIG. 8F, and this horizontal synchronization signal Sh and the output pulse _P6 of the counter 35 are The signal is supplied to the AND gate 37. Therefore, the output terminal 38 of the AND gate 37
As shown in FIG. 8G, a detection pulse Pv whose rise coincides with the leading edge VE of the vertical synchronizing signal of the next field is obtained.

Further, by triggering the monostable multivibrator 29 at the leading edge of the output pulse P ₆ of the counter 35, a switching signal P _S shown in FIG. 8H is generated at the output terminal 39. This switching signal P _S is at a high level during a period from approximately H/2 before the leading edge VE of the vertical synchronizing signal to the next equalization pulse.
The switching signal P _S may have a pulse width wider than that shown in the figure so that its fall is delayed.

FIG. 9 shows the configuration of the AGC circuit 6. In the same figure, a constant current source indicated by 40 generates a constant current at a level corresponding to the leading edge level of the synchronization signal, and this is transmitted to the loop filter 41 indicated by a broken line. supplied to The time constant of the loop filter 41 is determined by the resistor 42.
and a capacitor 43, and the AGC voltage is taken out at its output terminal 44. A series circuit of a capacitor 45 and a discharge resistor 46 is inserted between the output terminal 44 of the loop filter 41 and the ground, and the connection point between the two is connected to the collector of an NPN transistor 47. The emitter of this transistor 47 is grounded, and the above-mentioned switching signal P is connected to a terminal 48 derived from its base.
_S is supplied. Therefore, when the transistor 47 is turned on while the switching signal P _S is at a high level, the capacitor 45 is connected in parallel to the capacitor 43, and the time constant becomes large. Switching signal P
When the transistor 47 is off while _S is at a low level, the value of the resistor 46 is large, so
The loop filter 41 has the original time constant. In addition, since the loop filter 41 is an external component even when the circuit is integrated circuit, it is easy to add the capacitor 45, resistor 46, and transistor 47.

In addition to switching the time constant of the AGC circuit to a larger one, the operation of the AGC circuit may be disabled. For example, a configuration may be considered in which a predetermined DC voltage is used instead of the AGC voltage during a period when the switching signal P _S is at a high level.

In the embodiment of the present invention described above, the operation when a video signal Sd including a ghost is supplied from the synchronous detection circuit 3 as shown in FIG. 10A will be described. First, the user operates the switching means 12 while viewing the received video, and selects the tap of the delay circuit 11 that minimizes ghosts. In this state, the video signal _S1 from which the ghost has been removed is output to the output terminal 7, as shown by the dashed line in FIG. 10B. Further, a video signal S ₂ (shown by a solid line in FIG. 10B) having a delay time τ ₁ obtained by subtracting the delay time τ ₂ generated in the in-phase and quadrature component generation circuit 13 from the ghost delay time τ is taken out from the delay circuit 11. It is. Therefore, the _leading edge detection circuit 23 outputs a detection pulse Pv shown in FIG.
occurs. The rising edge of this detection pulse Pv triggers the monostable multivibrators 24 and 26, and the monostable multivibrator 26 generates a sampling pulse _P2 . Furthermore, by making the delay time of the monostable multivibrator 24 equal to τ ₂ , the sampling pulse P ₁ can be generated from the monostable multivibrator 27 triggered by its output. Furthermore, sampling pulse _P3 can be generated at a position delayed from sampling pulse _P1 . These sampling pulses P ₁ , P ₂ and P ₃ are shown in FIG. 10D.

In this way, the sampling pulse generation circuit 22
Since the sampling pulse is formed from the video signal _S2 appearing at the tap of the delay circuit 11 selected by the switching means 12, the sampling pulse corresponding to the ghost delay time τ can be automatically generated.

_{From the} multiplier _14I as shown _{in FIG .} In-phase component S _I shown in E
is generated, and the orthogonal component S _Q shown in FIG. 10F is generated from the multiplier 14Q by the cumulative output of the detection signal V _Q (=V ₂ -V ₁ ). Therefore, the canceling signal S ₃ (=S _I +S _Q ) shown in FIG. 10G is generated from the adder 15, and is combined with the video signal shown in FIG. 10A in the synthesizer 9 to cancel the ghost. It can be done.

As understood from the description of one embodiment above,
According to the present invention, in the ghost detection section,
Since the time constant of the AGC circuit is made large or disabled, it is possible to prevent the waveform in the detection section from differing from the original waveform due to the rising response of the AGC operation, as explained at the beginning. As a result, the ghost level etc. can be detected accurately.

FIG. 11 shows another embodiment of the invention. In this example, the ghost removal circuit 5 is configured to simulate a ghost using a transversal filter and form a cancellation signal. That is, the video signal appearing at the output of the synthesizer 9
S ₁ is supplied to delay circuit 49 . Delay circuit 49
is the sampling period Δτ (e.g. 100 [ns])
It is equipped with n taps (for example, 256) at intervals, the output of each tap is supplied to multipliers 50 ₁ to 50 _o , and the output of the multipliers 50 ₁ to 50 _o is supplied to adder 5
1, and from this adder 51 a cancellation signal S ₃
occurs. Further, the video signal appearing at the output of the synthesizer 9 is supplied to a differentiating circuit 52, and its differentiated output waveform is supplied to a demultiplexer 53. Like the delay circuit 49, the demultiplexer 53 has n taps spaced apart by sampling periods Δτ, and the output of each tap is supplied to an analog waveform accumulator 54. The analog waveform accumulator 54 includes, for example, n analog accumulators configured as a sampling and holding circuit, and the demultiplexer 53 is connected to the detection interval (approximately H/after the leading edge VE of the vertical synchronization signal).
The sampling gate is turned on at the timing when the differential waveform of section 2) is finished being supplied, and n values obtained by sampling the ghost differential waveform at the sampling period Δτ are stored in the hold capacitor. The n values from the hold capacitor of this analog waveform accumulator 53 are transferred to multipliers 50 ₁ to 50
_o as a weighting coefficient, and an adder 51 can generate a canceling signal _S3 .

The video signal _S1 appearing at the output side of the synthesizer 9 of the ghost removal circuit is supplied to the switching signal generating circuit 8 to generate the switching signal _Ps . This switching signal P _S
is the leading edge of the vertical synchronization signal as in the previous embodiment.
It reached a high level slightly before VE, and due to this
The time constant of the AGC circuit 6 is switched to a larger one. Therefore, there is an advantage that ghosts can be detected accurately as described above.

It should be noted that the ghost removal device is not limited to the feedback type, but may have a feedforward type structure. Furthermore, since the waveform within the detection section will have a sag due to the AGC operation, it is noticeable when there is a _ghost of the in-phase component. You can also do it. That is, in one embodiment of the present invention shown in FIG. 4, a gate circuit whose on/off is controlled depending on the presence or absence of the output of the analog accumulator 21I is provided, and the switching signal P _S is transmitted through this gate circuit.
The configuration is such that the signal is supplied to the AGC circuit 6. Furthermore,
It goes without saying that the present invention may be applied not only to a ghost removal device but also to a ghost measurement device that measures the level of ghosts and the like.

[Brief explanation of the drawing]

1 and 2 are waveform diagrams of video signals and video intermediate frequency signals used to explain the present invention, FIG. 3 is a basic configuration diagram of an embodiment of the present invention, and FIG. 4 is an embodiment of the present invention. A detailed block diagram of the example, FIGS. 5 and 6 are waveform diagrams used in the explanation, and FIGS. 7 and 8 are
The figure is a block diagram of an example of a leading edge detection circuit for a vertical synchronization signal and a waveform diagram used for its explanation.
FIG. 10 is a waveform diagram used to explain the ghost removal operation of one embodiment of the present invention, and FIG. 11 is a block diagram of another embodiment of the present invention. 5 is a ghost removal circuit, 6 is an AGC circuit, 8 is a switching signal generation circuit, and 9 is a synthesizer.

Claims (1)

[Claims] 1. In a ghost detection device in which a part of the vertical blanking period including a predetermined period from the leading edge of the vertical synchronization signal is set as a ghost detection period, at least the AGC operation in the ghost detection period is disabled or the AGC operation is A ghost detection device with a large time constant.