JPS6143876B2 - - Google Patents
Info
- Publication number
- JPS6143876B2 JPS6143876B2 JP52146882A JP14688277A JPS6143876B2 JP S6143876 B2 JPS6143876 B2 JP S6143876B2 JP 52146882 A JP52146882 A JP 52146882A JP 14688277 A JP14688277 A JP 14688277A JP S6143876 B2 JPS6143876 B2 JP S6143876B2
- Authority
- JP
- Japan
- Prior art keywords
- element body
- layer
- resin layer
- semiconductor element
- metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 229910052751 metal Inorganic materials 0.000 claims description 25
- 239000002184 metal Substances 0.000 claims description 25
- 239000011347 resin Substances 0.000 claims description 20
- 229920005989 resin Polymers 0.000 claims description 20
- 239000004065 semiconductor Substances 0.000 claims description 17
- 239000000758 substrate Substances 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 7
- 238000004519 manufacturing process Methods 0.000 claims description 6
- 206010040844 Skin exfoliation Diseases 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000004070 electrodeposition Methods 0.000 description 3
- WPYVAWXEWQSOGY-UHFFFAOYSA-N indium antimonide Chemical compound [Sb]#[In] WPYVAWXEWQSOGY-UHFFFAOYSA-N 0.000 description 3
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000000994 depressogenic effect Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 229910000859 α-Fe Inorganic materials 0.000 description 1
Description
【発明の詳細な説明】
本発明は、半導体素子特に高移動度半導体を利
用した磁気抵抗素子の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor element, particularly a magnetoresistive element using a high mobility semiconductor.
まず従来のこの種素子の製造方法を第１図を用
いて説明する。第１図Ａは絶縁基板１上にインジ
ウムアンチモナイドInSb等高移動半導体により
半導体素子本体２を形成した平面図を示し、この
素子本体２の形成は、基板１全面に被着した半導
体ウエハをフオトエツチング等により所定の素子
形状に分割することにより行なわれる。第１図Ｂ
は第１図Ａの−断面図を示している。この素
子本体２を形成した基板１上には、第１図Ｃに示
すごとく感光樹脂層３が被覆される。この樹脂層
３の半導体素子本体２上の所定の箇所は、第１図
Ａの−方向の断面を示す第１図Ｄに示す如く
樹脂層３が除去され、半導体素子本体２が部分的
に顕出せしめられている。その後、この顕出部分
および樹脂層３上に導電金属層４が電着等により
形成される（第１図Ｅ，Ｆ参照）。しかる後、素
子顕出部分に位置する金属層４を残して、他の部
分を樹脂層３とともに除去すれば第１図Ｇ，Ｈに
示す素子が得られる。図中５，５……は、前記金
属層４を分割して形成した金属バー、６，６は引
出電極である。 First, a conventional method for manufacturing this type of device will be explained with reference to FIG. FIG. 1A shows a plan view in which a semiconductor element body 2 is formed on an insulating substrate 1 by using an indium antimonide InSb level-shifting semiconductor. This is done by dividing into predetermined element shapes by photoetching or the like. Figure 1B
shows a - sectional view of FIG. 1A. The substrate 1 on which the element body 2 is formed is coated with a photosensitive resin layer 3 as shown in FIG. 1C. The resin layer 3 is removed at a predetermined location on the semiconductor element body 2, as shown in FIG. 1D, which shows a cross section in the - direction of FIG. I'm forced to come out. Thereafter, a conductive metal layer 4 is formed on the exposed portion and the resin layer 3 by electrodeposition or the like (see FIGS. 1E and F). Thereafter, the metal layer 4 located in the exposed portion of the device is left and the other portions are removed together with the resin layer 3 to obtain the device shown in FIGS. 1G and 1H. In the figure, 5, 5, . . . are metal bars formed by dividing the metal layer 4, and 6, 6 are extraction electrodes.
しかしながらこのような方法で素子を製造する
場合、以下のような欠点が生じる。すなわち、感
光樹脂層３を用いて金属バー形成箇所以外の部分
をマスキングするとき、素子本体２と基板１との
間に段差が生じるため、スピンナー等により感光
樹脂層３を塗布形成すると、この樹脂層３の厚み
は均一にならず、特に素子本体２のエツジ２ａに
位置する樹脂層３ａは第１図Ｃに示す如く薄くそ
のため感光樹脂層３の現像或はその後の工程にお
いてピンホールを生じたり、剥離し易いという問
題が生じている。そしてこのピンホールや剥離部
分においては、爾後の金属層４電着形成の際、金
属層４が素子本体２に接触してしまい、樹脂層３
を除去した後も、第１図Ｇに示すごとき金属バー
５，５……の短絡部分５ａ，５ａ……として残る
こととなる。このような素子は、磁気抵抗効果を
示さず、使用に耐えないことは言うまでもない。 However, when manufacturing devices using this method, the following drawbacks occur. That is, when the photosensitive resin layer 3 is used to mask areas other than the metal bar formation locations, a step is created between the element body 2 and the substrate 1, so when the photosensitive resin layer 3 is applied and formed using a spinner, this resin The thickness of the layer 3 is not uniform, and in particular the resin layer 3a located at the edge 2a of the element body 2 is thin as shown in FIG. , a problem arises in that it is easy to peel off. In these pinholes and peeled parts, the metal layer 4 comes into contact with the element body 2 when the metal layer 4 is subsequently formed by electrodeposition, and the resin layer 3
Even after the metal bars 5, 5, . . . are removed, short circuit portions 5a, 5a, . . . of the metal bars 5, 5, . Needless to say, such an element does not exhibit a magnetoresistive effect and cannot be used.
本発明は上述の欠点を解消するもので、以下第
２図に示す工程図を参考にして１実施例を説明す
る。フエライト板、セラミツク板、或いはガラス
板等よりなる絶縁基板１０上に、厚さ４〜５μｍ
程度の半導体膜を全面に形成し、次いで第２図Ａ
及び同図Ａの−断面図である第２図Ｂで示す
ように、パターニングを行ないフオトエツチング
等を用いて所定の形状に半導体素子本体１１を形
成する。この半導体素子本体１１は前述の例と同
様、InSb等の高移動度半導体が使用される。 The present invention solves the above-mentioned drawbacks, and one embodiment will be described below with reference to the process diagram shown in FIG. 4 to 5 μm thick on an insulating substrate 10 made of a ferrite plate, a ceramic plate, a glass plate, etc.
A semiconductor film of approximately
As shown in FIG. 2B, which is a cross-sectional view taken from FIG. This semiconductor element body 11 is made of a high mobility semiconductor such as InSb, as in the previous example.
次に、絶縁基板１０上にKMER（コダツク社
製フオトレジスト）等の感光樹脂（或いはSiO2
等）よりなる絶縁物を素子本体１１と略同一の厚
さ（約４〜５μｍ）だけ第２図Ｃに示す如く塗布
し、さらに硬化させた後、素子本体１表面に付着
した樹脂膜部分１２ａを露光、現像処理して除去
する（SiO2の場合にはエツチング除去する）。
尚、この現像処理工程で隣接する素子本体間の絶
縁層１２は部分的に少許陥没するがその陥没量は
素子本体１１の厚さに比べて十分小さくさせるこ
とができる。 Next, a photosensitive resin (or SiO 2
etc.) is coated to approximately the same thickness (approximately 4 to 5 μm) as the element body 11 as shown in FIG. is removed by exposure and development (in the case of SiO 2 , it is removed by etching).
In this development step, the insulating layer 12 between adjacent element bodies is partially depressed to some extent, but the amount of depression can be made sufficiently small compared to the thickness of the element body 11.
次に、絶縁基板１０上の素子本体１１及び絶縁
層１２の上にこれらを覆うように他の感光樹脂を
塗布して絶縁層１３を形成する（第２図Ｅ）。こ
の絶縁層１３は隣接する素子本体間に絶縁層１２
を配備しているので第１図Ｃに示すような段差に
基づくエツジ部１１ａのピンホールや剥離を防止
することができている。素子本体１１の長手方向
上の絶縁層１３は後に、金属バーを形成する部分
１３ａが除去される（第２図Ｆ、第２図Ａの−
方向の断面を示す）。その後、インジウム若し
くは銅等の金属が電着法により、絶縁層１３及び
この絶縁層が除去された結果表出された素子本体
１１の上に付設され金属層１４が形成される（第
２図Ｇ、Ｈ）。このとき感光樹脂層１３にはピン
ホールや剥離が殆んど生じていないから、素子本
体表出部分以外にこの金属層１４が接触すること
はない。しかる後、感光樹脂層１３をこれに付着
した金属層１４とともに除去すれば半導体素子１
１上にこれに交差するように金属バー１５，１５
……が分割形成されて素子が完成する（第２図
Ｉ、Ｊ）。すなわち素子本体２は、その周囲の絶
縁層１２と略同一面を形成しており、素子本体１
１上に所定の数だけ金属バー１５，１５……およ
び引出電極１６，１６が形成されている。 Next, another photosensitive resin is applied onto the element body 11 and the insulating layer 12 on the insulating substrate 10 so as to cover them, thereby forming the insulating layer 13 (FIG. 2E). This insulating layer 13 is formed between adjacent element bodies.
1C, it is possible to prevent pinholes and peeling of the edge portion 11a due to the step as shown in FIG. 1C. The portions 13a forming the metal bars of the insulating layer 13 on the longitudinal direction of the element body 11 are later removed (see FIGS. 2F and 2A).
direction). Thereafter, a metal such as indium or copper is applied by electrodeposition onto the insulating layer 13 and the element body 11 exposed as a result of removing this insulating layer, thereby forming a metal layer 14 (FIG. 2G). , H). At this time, since there are almost no pinholes or peelings in the photosensitive resin layer 13, the metal layer 14 does not come into contact with anything other than the exposed portion of the element body. Thereafter, the semiconductor element 1 is removed by removing the photosensitive resin layer 13 together with the metal layer 14 attached thereto.
Metal bars 15, 15 are placed on top of 1 to cross this.
. . . are formed in sections to complete the device (Fig. 2 I, J). That is, the element body 2 forms approximately the same surface as the surrounding insulating layer 12, and the element body 1
1, a predetermined number of metal bars 15, 15, . . . and lead electrodes 16, 16 are formed.
本発明製造方法によれば、金属バーを形成する
マスクとして平坦な感光樹脂層が使用できるよう
素子本体周囲にこれと同一厚さを有する絶縁層を
介在せしめるものであるから、絶縁層にピンホー
ルや剥離を生じる惧れはなく、したがつて素子本
体エツジに金属部分が残ることはない。すなわ
ち、金属バーは、それぞれ完全に独立させること
ができ、金属バーで挾まれた部分の半導体素子本
体に、充分な磁気抵抗効果を発揮させることがで
きる。また素子本体は、その周囲を絶縁層にて囲
繞されているため、外部からの衝撃等に対し保護
される利点もある。 According to the manufacturing method of the present invention, an insulating layer having the same thickness as that of the flat photosensitive resin layer is interposed around the element body so that the flat photosensitive resin layer can be used as a mask for forming metal bars. There is no risk of peeling or peeling, and therefore no metal parts remain on the edges of the element body. That is, the metal bars can be made completely independent from each other, and the portions of the semiconductor element body sandwiched between the metal bars can exhibit a sufficient magnetoresistive effect. Furthermore, since the element body is surrounded by an insulating layer, it also has the advantage of being protected against external impacts.
第１図Ａ，Ｂ，Ｃ，Ｄ，Ｅ，Ｆ，Ｇ，Ｈは従来
の製法の工程図、第２図Ａ，Ｂ，Ｃ，Ｄ，Ｅ，
Ｆ，Ｇ，Ｈ，Ｉ，Ｊは本発明方法の１実施例の工
程説明図であり、第２図Ａ，Ｉは平面図、第２図
Ｂ，Ｃ，Ｄ，Ｅ，Ｇは第２図Ａの−方向の断
面図、第２図Ｆ，Ｈ，Ｊは第２図Ａの−方向
の断面図である。
１０……絶縁基板、１１……半導体素子本体、
１３……感光樹脂層、１４……金属層、１５……
金属バー、１６……引出電極、５ａ……短絡形
状、１２……絶縁層。
Figure 1 A, B, C, D, E, F, G, H is a process diagram of the conventional manufacturing method, Figure 2 A, B, C, D, E,
F, G, H, I, J are process explanatory diagrams of one embodiment of the method of the present invention, Fig. 2 A, I are plan views, Fig. 2 B, C, D, E, G are Fig. 2 FIGS. 2F, H, and J are sectional views in the - direction of FIG. 2A. 10...Insulating substrate, 11...Semiconductor element body,
13... Photosensitive resin layer, 14... Metal layer, 15...
Metal bar, 16... Leading electrode, 5a... Short circuit shape, 12... Insulating layer.
Claims (1)
成する工程、前記絶縁基板上において半導体素子
本体間隙を埋め素子本体と略同一の厚さを有する
絶縁層を形成する工程、この絶縁層および素子本
体上に樹脂層を形成する工程、この樹脂層の前記
半導体素子本体上部適所を除去し半導体素子本体
を顕出させる工程、樹脂層上に金属層を形成する
工程、前記樹脂層をこれに付着した金属層ととも
に除去し前記半導体素子本体顕出部分に金属バー
を形成する工程とを有してなる磁気抵抗素子の製
造方法。1. A step of forming a semiconductor element body in a predetermined shape on an insulating substrate, a step of forming an insulating layer on the insulating substrate to fill a gap between the semiconductor element bodies and having approximately the same thickness as the element body, this insulating layer and the element body. a step of forming a resin layer thereon, a step of removing a suitable part of the upper part of the semiconductor element body of the resin layer to expose the semiconductor element body, a step of forming a metal layer on the resin layer, and a step of adhering the resin layer thereto. A method for manufacturing a magnetoresistive element, comprising the step of removing the metal layer together with the semiconductor element body and forming a metal bar in the exposed portion of the semiconductor element body.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14688277A JPS5478094A (en) | 1977-12-02 | 1977-12-02 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14688277A JPS5478094A (en) | 1977-12-02 | 1977-12-02 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5478094A JPS5478094A (en) | 1979-06-21 |
| JPS6143876B2 true JPS6143876B2 (en) | 1986-09-30 |
Family
ID=15417697
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14688277A Granted JPS5478094A (en) | 1977-12-02 | 1977-12-02 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5478094A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4922878A (en) * | 1972-06-21 | 1974-02-28 | ||
| JPS4934784A (en) * | 1972-08-01 | 1974-03-30 | ||
| JPS5110778A (en) * | 1974-07-17 | 1976-01-28 | Naito Densei Kogyo Co Ltd | Jidenhenkansoshi oyobi sonoseizoho |
-
1977
- 1977-12-02 JP JP14688277A patent/JPS5478094A/en active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4922878A (en) * | 1972-06-21 | 1974-02-28 | ||
| JPS4934784A (en) * | 1972-08-01 | 1974-03-30 | ||
| JPS5110778A (en) * | 1974-07-17 | 1976-01-28 | Naito Densei Kogyo Co Ltd | Jidenhenkansoshi oyobi sonoseizoho |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5478094A (en) | 1979-06-21 |
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