JPS614374A - Gamma correcting circuit - Google Patents

Abstract

PURPOSE:To furnish a gamma correcting circuit that can reproduce luminance correctly and to improve picture quality in a liquid crystal TV receiving set by making a converting circuit that converts digitally video signals parallel comparison type constitution and gamma correcting adding resistance to its reference voltage input terminal. CONSTITUTION:An A/D converting circuit 21 is constituted to a parallel comparison type. A comparator 22 of the circuit 21 makes comparison with video signals making voltage divided by voltage dividing resistances R1-R16 and resistances for gamma correction R23-R25 reference voltage, and a decoder 23 decodes the signal of the result of comparison and converts to data of 4-bit. A latch circuit 24 latches the data synchronizing with sampling pulse phis, and outputs latch data D1-D4 to a luminance modulating circuit. By adding resistances R23-R25 to voltage dividing resistances R1-R16, the comparison reference voltage of a converting circuit 21 becomes unequal interval, and the output data can be made to proportional to gamma-th power of the luminance signal, through it is a broken line approximation. By making gamma correction in this way, luminance is reproduced correctly.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a gamma correction circuit in a liquid crystal television receiver.

[Prior Art and Its Problems In a co-television receiver, a CRT is generally used to display images. In the above CRT, the relationship between the control grid signal voltage and the brightness is not linear, and the actual brightness is the signal voltage applied to the grid raised to the γ power (γ=2
．． 2).

For this reason, conventionally, the signal voltage is corrected to the 1/γ power on the transmitting side so that the brightness of the subject is correctly reproduced.

On the other hand, recently, a liquid crystal television receiver using a liquid crystal display panel in place of the CRT has been put into practical use as a portable small television receiver. The brightness of the liquid crystal display panel is approximately proportional to the applied signal voltage (effective value), but in conventional liquid crystal television receivers, the brightness of the fourth
As shown in the figure, the received signal is applied to the liquid crystal display panel without any correction. FIG. 4 shows the configuration of the liquid crystal drive circuit portion of a conventional liquid crystal television receiver, in which 1 is a brightness modulation pulse generation circuit, and 2 is a brightness modulation circuit 2. The luminance modulation pulse generation circuit 1 includes 4
It is composed of a bit counter 10, which is reset by a latch pulse φn shown in FIG. 5, and performs a count-up operation by a clock pulse φC. The clock pulse φC is equal to each latch pulse φ4 as shown in FIG.
For example, 14 shots occur during that time. The Q-Q4 outputs of the counter 10 are input to OR circuits 11a-11d in the brightness modulation circuit 2. In addition, the above OR circuit 1
1a to 11d contain 4-bit digital video signals! ~
T54 is input, and its output is input to the reset terminal R of the latch circuit 13 via the NAND circuit 12. The set terminal S of this latch circuit 13 is connected to the latch pulse φ
in, which is the inverted version of the file, is input.

The output of the latch circuit 13 is input directly or via the inverter 14 to the NOR circuits 15a to 15d. Further, the frame signal φF is directly input to the NOR circuits 15a and 15b, and the frame signal φF is input via the inverter 16 to the NOR circuits 15c and 15d. The outputs of the NOR circuits 15a to 15d are input as gate signals to gate circuits 17a to 17d. The gate circuits 17a to 17d apply liquid crystal driving voltages VD and V2 according to the gate signal f.
, VB, and Vs are selected and outputted as the signal electrode drive signal YrL of the liquid crystal display panel.

In the above configuration, after the counter 10 is reset by the latch pulse φn, the brightness modulation pulse generation circuit 1 counts the clock pulse φC and outputs the output terminals 01 to Q.
The brightness modulation pulses P] to P4 shown in FIG. These brightness modulation pulses Pl to P4 are sent to the OR circuit 1 of the brightness modulation circuit 2 together with the 4-bit digital signals b1 to D4.
1a to 11d. On the other hand, the brightness modulation circuit 2
The latch circuit 13 is set by the latch pulse γn, and its output signal A falls to O°' as shown in FIG. In this state, the logical conditions of the digital data D1 to D4 and the brightness modulation pulses P1 to P4 are taken, and the OR circuit 11'
The contents of the counter 10 are sequentially counted up by the clock pulse φC until the outputs of the OR circuits 11a to 11d all become "1". Then, when the outputs of the OR circuits 11a to 11d become all "1", the NOR circuit 12 The output of
As a result, the latch circuit 13 is reset, and the output A of the latch circuit 13 returns to the "1" signal level. Now, for example, if the data D1 to D4 are rololJ, the inverted data 151 to 154 are rloloJ, and when the counter 10 counts up to "5" and becomes "0101", the outputs of the OR circuits 11a to 11d all become "1°", and the NAND circuit 12 to N
The latch circuit 13 is reset by outputting the OI+ signal.

As mentioned above, the time width of the output signal A of the latch circuit 13 is
It is set corresponding to the data D1 to D4, and changes linearly as shown in FIG. Thus, the output signal A of the latch circuit 13 passes through the gate circuits L7a to 17d together with the frame signal φF through the NOR circuits 158 to 15d.
This controls gate circuits 17a to 17d to select liquid crystal drive voltages VO, V2, VB, and Vs, and outputs them as signal electrode drive signals Yn.

As described above, conventionally, the received signal is applied to the liquid crystal display panel without being corrected, which makes it impossible to reproduce correct brightness.

[Object of the Invention] The present invention has been made in view of the above points, and provides a gamma correction circuit that can accurately reproduce the brightness of a subject on a liquid crystal display panel and improve image quality in a liquid crystal television receiver. The purpose is to provide

[Summary of the Invention J The present invention provides a liquid crystal television receiver in which the A/D conversion circuit for converting a video signal into a digital signal has a parallel comparison type configuration, and γ correction is performed by adding a resistor to the reference voltage input terminal. This is how it was done.

[First Embodiment of the Invention] A first embodiment of the invention will be described below with reference to the drawings. FIG. 1 shows the configuration of an A/D conversion circuit 21 in a liquid crystal television receiver.

This A/D conversion circuit 21 is configured as a parallel comparison type, and includes, for example, a 15-stage comparator 22 that compares a video signal sent from a video amplification circuit (not shown) with a reference voltage. Decode the output of 4
It consists of a decoder 23 that outputs bit digital data, and a latch circuit 24 that latches the output of this decoder 23. A video signal from the video amplification circuit is input to each stage of the comparator 22, and a voltage equally divided by 16 voltage dividing resistors R1 to R16 is input as a comparison reference voltage. Then, Vcc power is supplied from the outside to one end a on the resistor R1 side of the voltage dividing resistors R1 to R16 connected in series through the resistor R21, and the resistor R16
The other end e of the side is grounded via a resistor R22. Furthermore, outside the A/D conversion circuit 21, resistors R1 to R4
A resistor R23 is connected in parallel to the resistor R23, and a resistor 24 is connected in parallel to the resistors R5 to R8.
, a resistor R25 is connected in parallel to the resistors R9 to R12. The resistors R23, R2, 4, and R25 are γ correction resistors, and the input/output characteristics of the A/D conversion circuit 21 are γ of the luminance signal.
The value is set to be proportional to the power of Further, the latch circuit 24 latches the output of the decoder 23 in synchronization with the sampling pulse φB, and digital data D1 to
It is output as D4 to the next stage brightness modulation circuit.

In the above configuration, the comparator 22 compares the voltage divided by the voltage dividing C resistors R1 to R16 and R23, R24, and R25 with the video signal as a reference voltage,
The comparison result is output to the decoder 23.

This decoder 23 decodes the signal from the comparator 22 and converts it into 4-bit data, and outputs it to the latch circuit 24.
Output to. This latch circuit 24 latches the data from the decoder 23 in synchronization with the sampling pulse φS, and outputs the latched data D1 to D4 to the brightness modulation circuit.

Therefore, the A/D conversion circuit 21 has resistors R23, R
24, if R25 is not connected, resistors R1~
Since the comparison voltages divided by R16 are equally spaced,
As shown by the solid line A in FIG. 2, the relationship between the input signal and the output signal becomes linear. And the voltage dividing resistors R1 to R16
By adding resistors R23, R24, and R25 to
, R24, and R25, solid line B is shown in Fig. 2.
Although it is a broken line approximation as shown in , the output data can be made proportional to the γ power of the luminance signal. That is, in the characteristic shown by the solid line B, it is possible to match the ideal characteristic shown by the broken line C at three points, 01, C2, and 03.
The ideal characteristic C can be approximated. Therefore, the above value of γ is r2. ．． 2J, so when approximating at point j as shown in the above example, a, b, c, d,
Reference voltage between points e 1: a-b, Eb-c, l: c-
The ratio of d1Ed-e is Ea-b: Eb-c:
Ec-d: Ed-e=12:15:20:53. Then, divide the voltage resistors R1 to R16 into R1=R2=
......--R16 = R, then the parallel combined resistance of R23 and 4R is A, the parallel combined resistance of R24 and 4R is B,
When the parallel combined resistance of R25 and 4R is C1 and 4R is D, A:B:C:D=12:15:20:53
becomes. By performing the γ correction as described above, it is possible to accurately reproduce brightness on the liquid crystal display panel and improve image quality.

[Second embodiment of the invention] Next, a second embodiment of the present invention will be described.

In the first embodiment, approximation is performed using three points when performing γ correction, but in this second embodiment, approximation is performed using one point. That is, this second embodiment is similar to the third embodiment.
As shown in the figure, the three γ correction resistors R2 in FIG.
3. One γ correction resistor R2 instead of R24 and R25
6 between point a and point d, that is, the voltage dividing resistors R1 to R
12 in parallel. In this case, γ
The value of the correction resistor R26 is R26 and 12R (R1-R1
When the parallel combined resistance with 2) is E, E:4R=47:53. By setting the value of each resistor as described above, the γ correction characteristic can be approximated to the ideal characteristic C by a single point of zero, as shown by the dashed line in FIG. Even in the case of approximation at one point as described above, practically sufficient γ correction can be performed, brightness can be accurately reproduced on the liquid crystal display panel, and image quality can be improved.

[Effects of the Invention] As detailed above, according to the present invention, in a liquid crystal television receiver, A for converting a video signal into a digital signal is provided.
By making the /D conversion circuit a parallel comparison type configuration and adding a resistor to the reference voltage input terminal of the A/D conversion circuit,
Since the correction is performed, the γ correction can be reliably performed with a simple configuration, the brightness can be accurately reproduced on the liquid crystal display panel, and the image quality can be improved.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of the present invention, FIG. 2 is a diagram showing a γ correction curve in the present invention, FIG. 3 is a circuit diagram showing a second embodiment of the present invention, and FIG. Figure 5 shows a brightness modulation circuit in a conventional LCD television receiver.
This figure is a timing chart for explaining the operation of FIG. 4. 21... A/D conversion circuit, 22... Comparator,
23.r.decoder, 24...latch circuit, R1-R
16... Resistor for voltage division, R23-R2B... Resistor for γ correction. Applicant's Representative Patent Attorney Takehiko Suzue No. 1-2 Figure 3ii! I

Claims (1)

[Claims] Parallel comparison type A that converts video signals into digital signals for driving the liquid crystal display panel in liquid crystal television receivers.
A /D conversion circuit, and a γ correction means that adds a γ correction resistor to the reference voltage input terminal of the A/D conversion circuit and corrects the output data so that it is proportional to the γ power of the video signal. Features a gamma correction circuit.