JPS6143065A - Contact type image sensor and its driving method - Google Patents

Abstract

PURPOSE:To attain low noise in a high speed by using plural CCD shift registers as drive circuits and adopting the CCD drive system where no field through noise is mixed from a transfer gate pulse at each driving integrated circuit device. CONSTITUTION:All MXN sets of transfer gates 52 in an M chip are connected in common and they are turned on twice consecutively by a gate pulse phiTG. A photoelectric converting element 54 corresponding to a bias electric charge stored in the CCD shift register 51 is injected at first. The photo signal charge and the bias charge are transferred from the photoelectric converting element 54 into the CCD shift register 51 at the 2nd time. Thus, as the output of the contact type image sensor, the photo signal charge and the bias charge are extracted sequentially in response to the arrangement of the photoelectric converting element 54, then a pure photo signal only is extracted.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a contact image sensor used as a photoelectric conversion device in facsimile machines and the like.

In particular, the present invention relates to a low-noise contact image sensor using a CCD shift register and a method for driving the same.

(Prior Art and its Problems) Compared to 1MO8 type IC image sensors, CCD sensors, etc., contact type image sensors do not use a reduction optical system using lenses, so they are smaller and more economical. It is a large-sized device equipped with a photoelectric conversion element array having the same length as the document width. The number of elements is 1728 elements or 3456 elements.

As a circuit for sequentially scanning and driving this, FIG. 1 shows a driving integrated circuit consisting of, for example, a 64-stage/chip or 128-stage/chip scan pulse generation circuit 1 and an MO8FET switch 2 for addressing. on the glass substrate,
A first conventional example in which the photoelectric conversion element 4 and the photoelectric conversion element 4 are directly mounted is shown.

When using amorphous silicon as the photoelectric conversion element 4 and reading signals in accumulation mode operation, MO8F
A clock input line 7 that supplies lock pulses necessary to control the switching noise of pulses applied with GoHC through the gate-drain overlapping capacitance 3 of the ET switch 2 and the scanning pulse generation circuit 1 such as a shift register. Clock noise appearing through the parasitic coupling capacitance 8 between the output line 6 and the output line 6 becomes a problem.

In particular, with the light intensity of a light source such as an LED, which is often used in contact type image sensors, when performing high-speed reading of 5 m5 ec/line to 10 m5 ec/line or higher required by facsimile machines, the magnitude of the optical signal is small. In order to increase B/N due to insufficient
The current situation is that some kind of noise suppression method must be adopted.

A second conventional example that employs a method of suppressing fixed pattern noise such as switching noise and black and white noise is published by Koike et al. in the Journal of the Institute of Electronics and Communication Engineers, Vol. 1, 1977. J60-C Pages 113 to 120 K “MO using adjacent bit correlation method”
This is shown in a paper titled "Improvement of S image sensor". As shown in FIG. 2, a second MO8FET switch 2 is provided for a 1-bit photoelectric conversion element 4, and the scanning pulse generated by the scanning circuit 1 turns on the MO8FET switches 2t- of two adjacent elements at the same time. This is a method of suppressing noise by eliminating the differential between the signal line 22 where noise is output and the noise line 21 where only noise is output.

Also, as shown in FIG. 3, for example, Yoshimura et al.
National Technical Report 1975 vO1, 21
, A6, pages 692 to 703, “Low Noise”
In a paper published under the title "Dimensional MOS Image Sensor," a dummy capacitor 33 with the same capacitance as the superimposed capacitance of the MO8FET switch 2 is provided, and both are switched simultaneously to reduce the signal line 32 and noise line 31. Differential and 9
, which employs a method to suppress the noise that appears in both.

In addition, for example, Ohba et al., Lutele Pigeon Society Technical Report 1980 Vo1.4413.53 From Hage, 58
As shown in the paper published on page K entitled "Proposal of fixed pattern noise and suppression circuit for two-dimensional MO8 type solid-state image sensor", while driving a 1-bit photoelectric conversion element,
A so-called integral method is adopted in which only the positive and negative noise of a pair of drive pulses is canceled by integrating the signal and noise. For example, IEICE technical report by Saito et al., October 1983 ED83- 64ra
-8i: H film high-speed A4-16 dot/contact image sensor"
CM for both P and N channels as O8FET switch and chi 2
There is a method that uses OS switch and switch and applies pulses of opposite phase to both gates to cancel out noise more than K.

However, even if such noise suppression is performed, there will be problems due to variations in individual transistors, intrusion of clock noise, etc.
Noise can only be suppressed up to a certain level. The performance of the contact image sensor is 20d S/N in large 4 format, 16 screen, Q, 8771 see/line.
There is a development report for B, but if you try to drive it at an even higher speed of 0.5 m5 ec/line or less, the S/N will deteriorate and this will lead to resolution deterioration. Also, recently there has been a strong demand for halftones.
For example, since a high S/N of 40 dB or more is desired, sufficient image sensor performance cannot be obtained with the above-described noise suppression method.

By the way, in a CCD sensor, as shown in FIG. 4(a).

The optical signal charge accumulated in the photodiode 42 is transferred to the COD shift register 40 by turning on the transfer gate 41 at the same time.
By scanning, an optical signal output SP is obtained in time series through the output amplifier 43. At this time, as shown in the timing chart of Fig. 4 Φ), there is transfer gate pulse feed-through noise Nf as a fixed pattern noise that appears in the output, but this is outside the signal readout period of one line and the signal after It is easy to remove the spores through processing.

As described above, the CCD sensor does not have the problem of fixed pattern noise that occurs with the MO8 type IC image sensor.

In addition, in the current CCD sensor, 1 is used as the transfer clock.
Therefore, just as an MO8-type drive integrated circuit is applied to a contact type image sensor, a CCD drive integrated circuit without the photodiode 42 of a CCD sensor can be used to produce, for example, A4 size, 16 element/
,,If we assume a contact type image sensor with 3456 elements, then Q,4 @see/line.

When reading with alternate lead extraction, high speeds of about 0.2 m5ec/line or higher can be expected. Furthermore, as its output method uses a floating gate amplifier to achieve high sensitivity, it has a high S/N compared to an MO8 type IC image sensor. However, in this case, a plurality of CCD driving integrated circuits are naturally required. Therefore, when scanning this contact type image sensor and trying to obtain the original signal output, the feed-through noise of the transfer gate pulse at the switching of the plurality of integrated circuits is generated during the readout period of the l line. mixed into the signal.

Further, even if floating gate amplifiers are employed as the output method of each CCD driving integrated circuit as described above, if the outputs of the plurality of gate amplifiers are connected as they are, a short circuit will occur. Therefore, the number of output terminals of the contact type image sensor is equal to the number of CCD drive integrated circuits, and for example, the number of stages of one CCD drive integrated circuit is 256.
Even as a row, A4 size, 8 elements/meter and 16 elements/m
The contact type image sensor requires 7 and 14 output terminals, respectively, and the wiring is more complicated than the drive circuit of the conventional MO8 type IC image sensor, and the reliability of external connections is lost. There are some drawbacks.

Furthermore, in a CCD sensor, when the original signal is small and the potential across the shift diode 42 becomes less than 0.3V, there is an afterimage phenomenon in which charge transfer is not performed promptly even if the transfer gate 41 is turned on. This potential is determined by the amount of primary charge and the element capacitance, and it is difficult to reduce the element capacitance of a contact type image sensor to less than the IPF including wiring capacitance. Assuming a sensor element of 16 elements/dragon, the amount of unilateral charge in the currently available yellow-green LED (570 nm peak wavelength) with a sensor surface illuminance of 100 AtX is as follows.

It is only about 0.2PG, and therefore the potential across the device can only change by 200mV. Therefore, when an A-8I sensor element is used as a sensor element of a CCD driving integrated circuit, the above-mentioned afterimage phenomenon occurs if the sensor element is simply connected as is.

(Object of the present invention) An object of the present invention is to eliminate the above-mentioned drawbacks and provide a high-speed, low-noise contact type image sensor.

(Configuration of the Present Invention) According to the present invention, there are a plurality of photoelectric conversion element rows, and N stages of 7 autogates connected to the photoelectric conversion element row in one-to-one correspondence with the photoelectric conversion element row.

an N-stage CCD shift register that is connected to the transfer gate and outputs signal charges in time series; an output amplifier that amplifies the time-series output; and an output amplifier that amplifies the time-series output. A switching circuit provided after the amplifier and the N-stage CO
A D shift register: a plurality of drive integrated circuits each having at least an input mechanism on a semiconductor substrate for electrically injecting charge into the first stage; and an output line commonly connected to outputs from switching circuits of the drive integrated circuits. A close-contact image sensor is characterized in that it is provided on an insulating substrate, even if it is not visible on the insulating substrate.
A photoelectric conversion element array consisting of a plurality of photoelectric conversion element arrays, N stages of 7 autogates connected to the photoelectric conversion element array in one-to-one correspondence with the photoelectric conversion element array, and N stages of 7 autogates connected one-to-one to the photoelectric conversion element arrays. a transfer gate, an N-stage CCD shift register δ connected to the transfer gate and outputting signal charges in time series, an output amplifier amplifying the time-series output, a switching circuit provided after the output amplifier, and the N stages. a plurality of drive integrated circuits each having at least an input mechanism for electrically injecting charge into the first stage of the CCD shift register; and an output line to which outputs from switching circuits of the plurality of drive integrated circuits are commonly connected. In the image sensor, the means for simultaneously opening or closing all the photogates and transfer gates in the plurality of drive integrated circuits, and the means for opening or closing are performed twice in succession, The first time was the CC
A clock for controlling the CCD shift register of the single driving integrated circuit; means for applying pulses and switching pulses for controlling the switching circuit so as to output signal charges accumulated only in the CCD shift register of the single driving integrated circuit to the output line in time series; The clock pulses that control the input mechanism are delayed by at least l clock periods from the clock pulses that control the CCD shift registers, and the clock pulses that control the input mechanism are
The means applied to inject charges into the CD shift register and the clock pulses and switching pulses applied to each of the 1 m plurality of driving integrated circuits are continuous in time series without overlapping with each other. A method for driving an image sensor can be obtained, comprising the steps of:

(Example) The present invention will be explained in detail below based on an example.

FIG. 5 is a diagram showing the configuration of a contact type image sensor according to an embodiment of the present invention, and FIGS. 6 and 7 are diagrams showing the configuration of a contact type image sensor according to an embodiment of the present invention shown in FIG. FIG. 4 is a diagram showing a timing chart for driving a 4-image sensor.

It consists of one or N transfer stages of M CCD shift registers 51 from the first to the M-th. The N transfer stages are cascade-connected and are composed of, for example, embedded channel CCD shift registers (hereinafter simply referred to as CCD shift registers) with high transfer efficiency, and transfer clock pulses Φ! ~
ΦM and the transfer clock pulse Φ! with the opposite phase to this. ~
This is a two-phase CCD shift register that sequentially transfers the accumulated optical signals to the next stage every K cycles of ΦM and obtains a time-series output. .

N-stage transfer gates 52 and N-stage 7t gates 53 are connected in cascade to each stage of the N-stage CCD shift register 51 in a one-to-l ratio.

On the input side, metal individual electrodes such as Au formed on an insulating substrate such as a glass substrate and ITO (Indium
A photoelectric conversion element 54 consisting of an amorphous silicon thin film sandwiched between transparent electrodes such as M Tin Oxid@) is wire-bonded via bonding pads 55 in a one-to-one correspondence with 11C.

The time-series optical signal charge outputted from the CCD shift register 51 is output as a voltage output in the same time-series manner by the floating gate amplifier 56, and then the switch 5
7 is passed through and output to the output line 5B.

Furthermore, in this example, the amount of photocharge is small.

In order to eliminate afterimages due to incomplete transfer, a charge injection photodiode 59 and a transfer gate 60 are provided at the first stage of the CCD shift register 51 to apply bias charges to the photoelectric conversion element 54 made of an amorphous silicon thin film.

Single-chip COD drive integrated circuit C or less
C) 50 is an N-stage CCD shift register 51;
N transfer gates 52 and photogates 53.
70-Chinging gate amplifier 56. To switch 57? , a charge injection photodiode 59, and a transfer gate 6o. For example, if this N stage is 256, then in an A4 size, 16 element/me3456 multilayer contact type image sensor, 14 chips 1. (M is 14)
C50 is mounted together with the photoelectric conversion element 54 on an insulating substrate.

M chip contains MXN transformers 7 and 52
are connected in common and are turned on twice in succession, all at the same time, by the gate pulse ΦTG. At the first time, the bias charges accumulated in the CCD shift register 51 are injected into the corresponding photoelectric conversion elements 54 respectively.

Therefore, the potential distribution under each gate is
The potential is lowest on the photoelectric conversion element 54 side, and the potential is applied so as to be inclined to the transfer gate 52F and the CCD shift register 51F. The second time, the process is reversed, and the optical signal charges and bias charges are transferred from the photoelectric conversion element 54 side to the CCD shift register 51. Therefore, the potential distribution is opposite to that of the above], and the CCD shift register 5
The potential is applied so that 1F is the lowest. In this way, the optical signal charges and bias charges stored in the CCD shift register 51 are read out in time series according to the arrangement of the photoelectric conversion elements 54, so that they are only transferred to the first CCD shift register 51. Clock pulses Φ1 and Φ1 are applied. To output N stages of original signal charges and bias charges in time series, if one stage of transfer is performed in one period of Φl and Φ1, clock pulses Φ1 and Φ
All you have to do is return 1 for N period edges 9.

At this time, the bias charge to the next line in the sub-scanning direction is
The transfer clocks Φ1 and Φl are used to read and simultaneously store data in the first CCD shift register 51. The injection is performed by applying the transfer gate ΦZGI to the first CCD shift register 51 ON node 59. At this time, the injection into the first stage generates the source signal that was previously stored and is to be read. In this way. At the same time as a completion of overflow, the busy CCD shift register 51
Inside, preparations are made for injecting bias charge to the next line.

During this time, only the first CCD shift register 51 of, for example, 0MO8 configuration and the first switch 57 on the same chip are activated by the output switching pulse Φfs. During this period, the transfer clock pulses Φ2 to ΦM and i-5''i of the other second to Mth chips and the second to Mth switches 57 are in the off state. However, the optical signal charges and bias charges in each of the CCD shift registers 51 are not transferred but remain accumulated.

After the output of the first CCD shift register 51 is read out, the transfer clock pulses Φ2 and Φ2 are applied to the second CCD shift register.

The second switch 57 on the second chip is turned on.

As a result, following the output of the first CCD shift register 51, the output of the second CCD shift register 51 is read out in chronological order. Also, as in the first case, the bias charges are the transfer gate pulse ΦXG2 and the transfer clock pulse Φ2.

Φ2), it is set in the second CCD shift register 51 at the same time after the readout is completed.

Hereinafter, similar operations are performed in the third, fourth, . . . Mth drive ICs 50. Therefore, this close-contact image
An optical signal charge and a bias charge are sequentially outputted as the output O of the digital sensor in time series according to the arrangement of the photoelectric conversion elements 54. Since this bias charge can be regarded as a DC offset, it is easy to remove it in a later circuit69, so that only the pure original signal can be obtained.

Pulse ΦtS to ΦMg or 018 to switch 57
Feedthrough noise occurs due to ~0M8, but its level is about tmv, and since the output of the floating gate amplifier 56 is thick, for example, about 1V, it does not pose a problem. This switch 57 does not have to have a 0MO8 configuration, and may be a P-channel or N-channel MOS light or chi, but a CMOS switch can cancel noise by a pair of positive and negative pulses, and can reduce the noise by 1 mV or more. is measured.

Transfer gate 52. Photogate 53 is.

Since it is turned on only once per line scan, the feedthrough noise occurs outside the reading time.

The signal output is obtained in the same form as a conventional CCD sensor.

For example, with A4 size, 16 elements/cut contact type image sensor, Q
, S/N of 40 dB or more is possible at 5 @see/line), and can adequately handle halftones.

Further, if only the optical signal charge is used, as described above, the potential change is about 0.2 V, which causes an afterimage problem, but in this embodiment, bias charges are injected.

There's no problem with that either. This bias charge is sufficient at about 0.3 PC, and even when combined with the optical signal charge amount of 0.2 PC,
0.5PC and 15X30 often used in current COD
Even with a shift register μ-, sufficient data can be transferred without overflowing.

When the switch 57 in one chip is on, all the switches 57 in the other chips are off and no short circuit occurs, so all the switches on the output line 581C can be connected, and the output of the contact type image sensor is as follows. Since only a book is required, reliability when connecting with the outside world is improved.

In FIG. 5 showing this embodiment, circuits related to power supply, grounding, etc. necessary for driving the integrated circuit are omitted.

(Effects of the Present Invention) As detailed above, according to the present invention, a COD drive method uses a plurality of CCD shift registers as drive circuits, and eliminates feed-through noise of transfer gate pulses from each drive integrated circuit. By adopting this, high speed and low noise can be achieved.

Moreover, at this time, due to the large capacity of the amorphous silicon photoelectric conversion element compared to a CCD sensor, the afterimage phenomenon that occurs even at the maximum amount of photoelectric charge can be solved by adopting a configuration in which bias charge is injected. The injection method is also a method that can be used in conjunction with the readout transfer lock pulse, and a contact type image sensor that can obtain a high S/N ratio is realized.

[Brief explanation of the drawing]

Figure 1, Figure 2, Figure 3, and Figure 4 (a) are
．． Third. 4) is a timing diagram showing the operation of FIG. 4, FIG. 5 is a circuit diagram showing an embodiment of the present invention, and FIGS. 6 and 7 are 6 is a timing chart showing the operation of FIG. 5. FIG. . In the figure, 1 is a scanning pulse generator, 2 is a FET switch,
3 is the overlapping capacitance between the gate and drain, 4 is the photoelectric conversion element, 5 is the power supply, 6 is the output terminal, 7 is the clock pulse input terminal, 8 is the coupling capacitance between the clock line and the output line, 21.31 is the noise output line, 22.32 is the signal output line,
33 is a dummy capacitor, 40 is a CCD shift register, 41 is a transfer gate, 42 is a photoelectric conversion element,
43 is a floating gate amplifier, 50 is a semiconductor substrate, 51 is a CCD shift register, 52 is a transfer gate, 53 is a photogate, 54 is a photoelectric conversion cable 58 is a signal output line, 59 is a charge injection photodiode, and 60 is a transfer gate. be. Figure 1 Figure 2 Figure 3 Figure 1/ Figure 4 Figure 6

Claims (2)

[Claims] (1) A photoelectric conversion element array consisting of a plurality of photoelectric conversion element arrays, N stages of photogates connected to the photoelectric conversion element array in one-to-one correspondence to each element of the photoelectric conversion element array, and one pair for each photoelectric conversion element array. 1, an N-stage CCD shift register that is connected to the transfer gate and outputs signal charges in time series, an output amplifier that amplifies the output of the CCD shift register, and a subsequent stage of the output amplifier. a plurality of drive integrated circuits comprising at least an input mechanism on a semiconductor substrate for electrically injecting charge into the first stage of the N-stage CCD shift register;
A contact type image sensor comprising at least an output line to which outputs from switching circuits of the driving integrated circuit are commonly connected on an insulating substrate. (2) a plurality of photoelectric conversion element arrays, N stages of photogates connected to the photoelectric conversion element array in one-to-one correspondence with the photoelectric conversion element array; N stages of transfer gates, and N stages of CCs connected to the transfer gates and outputting signal charges in time series.
A D shift register, an output amplifier for amplifying the time-series output, a switching circuit provided after the output amplifier, and an input mechanism for electrically injecting charge into the first stage of the N-stage CCD shift register are mounted on a semiconductor substrate. In the image sensor, the image sensor includes at least a plurality of drive integrated circuits, and an output line to which outputs from switching circuits of the plurality of drive integrated circuits are connected in common. means for simultaneously opening or closing the photogate and the transfer gate;
The means for opening or closing is performed twice in succession, the first time being a means for transferring charge from the CCD shift register to the plurality of photoelectric conversion element arrays, and the second time being the means for transferring charge from the CCD shift register to the plurality of photoelectric conversion element arrays, and the second time being the means for transferring charge from the CCD shift register to the plurality of photoelectric conversion element arrays. The clock pulse for controlling the CCD shift register of one of the plurality of drive integrated circuits and the switching pulse for controlling the switching circuit are configured to control the CCD shift register of one of the plurality of drive integrated circuits.
means for applying signal charges accumulated only in the D shift register so as to output them in time series to the output line; and controlling the input mechanism delayed by at least one clock period from the clock pulse controlling the CCD shift register. means for applying a clock pulse to inject charges into the N stages of CCD shift registers; and each of the clock pulses and switching pulses applied to each of the plurality of driving integrated circuits overlap with each other. 1. A method for driving an image sensor, characterized in that the method includes the step of: chronologically continuous means;