JPS614253U - Threshold voltage generator - Google Patents
Threshold voltage generatorInfo
- Publication number
- JPS614253U JPS614253U JP9001784U JP9001784U JPS614253U JP S614253 U JPS614253 U JP S614253U JP 9001784 U JP9001784 U JP 9001784U JP 9001784 U JP9001784 U JP 9001784U JP S614253 U JPS614253 U JP S614253U
- Authority
- JP
- Japan
- Prior art keywords
- peak value
- threshold voltage
- output
- voltage generator
- edge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Image Input (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図はこの考案の一実施例を示すブロック図である。
第2図および第3図は従来の読取装置における撮像素子
の読取信号とそのスレツショルド電圧を示す波形図であ
る。
第4図は従来の紙幣読取装置で用いられるスレツショル
ド電圧発生装置を示すブロック図である。
第5図は第1図の装置の各部における信号の波形を示す
図である。
図において、1は光源、2は紙幣、3は光学系、41ま
撮像素子、9は視野ゲート、10は両端検出回路、60
はピーク値検出回路を示す。FIG. 1 is a block diagram showing an embodiment of this invention. FIGS. 2 and 3 are waveform diagrams showing a read signal of an image sensor and its threshold voltage in a conventional reading device. FIG. 4 is a block diagram showing a threshold voltage generator used in a conventional banknote reading device. FIG. 5 is a diagram showing the waveforms of signals in each part of the device shown in FIG. 1. In the figure, 1 is a light source, 2 is a banknote, 3 is an optical system, 41 is an image sensor, 9 is a field of view gate, 10 is a both-end detection circuit, 60
indicates a peak value detection circuit.
Claims (2)
変換するための撮像素子と、 前記撮像素子の出力の端部付近でのピーク値を検出する
ピーク値検出手段と、 前記ピーク値検出手段の出力に基づいて、スレツショル
ド電圧を発生する手段とを備える、スレツショルド電圧
発生装置。(1) An imaging device for converting an image of an object formed by an optical system into an electrical signal, a peak value detection means for detecting a peak value near an end of the output of the imaging device, and the peak value detection and means for generating a threshold voltage based on the output of the means.
する端部検出パルス発生手段と、前記端部検出パルスに
同期して、前記撮像素子の出力のピーク値を検出するピ
ーク値検出回路とを含む、実用新案登録請求の範囲第1
項記載のスレツショルド電圧発生装置。(2) The peak value detection means includes an edge detection pulse generation means that generates an edge detection pulse near the edge of the output of the image sensor, and an output of the image sensor in synchronization with the edge detection pulse. and a peak value detection circuit for detecting the peak value of the utility model registration claim 1.
Threshold voltage generator as described in .
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9001784U JPS614253U (en) | 1984-06-15 | 1984-06-15 | Threshold voltage generator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9001784U JPS614253U (en) | 1984-06-15 | 1984-06-15 | Threshold voltage generator |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS614253U true JPS614253U (en) | 1986-01-11 |
Family
ID=30644631
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9001784U Pending JPS614253U (en) | 1984-06-15 | 1984-06-15 | Threshold voltage generator |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS614253U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS522337A (en) * | 1975-06-24 | 1977-01-10 | Nec Corp | Slice level deciding equipment |
JPS5814282A (en) * | 1981-07-20 | 1983-01-27 | Ricoh Co Ltd | Picture signal binarizing circuit |
-
1984
- 1984-06-15 JP JP9001784U patent/JPS614253U/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS522337A (en) * | 1975-06-24 | 1977-01-10 | Nec Corp | Slice level deciding equipment |
JPS5814282A (en) * | 1981-07-20 | 1983-01-27 | Ricoh Co Ltd | Picture signal binarizing circuit |
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