JPS6142494U - electronic clock - Google Patents

electronic clock

Info

Publication number
JPS6142494U
JPS6142494U JP1985101450U JP10145085U JPS6142494U JP S6142494 U JPS6142494 U JP S6142494U JP 1985101450 U JP1985101450 U JP 1985101450U JP 10145085 U JP10145085 U JP 10145085U JP S6142494 U JPS6142494 U JP S6142494U
Authority
JP
Japan
Prior art keywords
switch
circuit
opened
closed
operating member
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1985101450U
Other languages
Japanese (ja)
Other versions
JPS626555Y2 (en
Inventor
仁美 鮎沢
Original Assignee
セイコーエプソン株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by セイコーエプソン株式会社 filed Critical セイコーエプソン株式会社
Priority to JP1985101450U priority Critical patent/JPS6142494U/en
Publication of JPS6142494U publication Critical patent/JPS6142494U/en
Application granted granted Critical
Publication of JPS626555Y2 publication Critical patent/JPS626555Y2/ja
Granted legal-status Critical Current

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  • Electric Clocks (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】 第1図;スイラチ構造平面図、第2図;第1図の巻真を
引き出した状態の平面図、第3図;本考案による計測回
路及び補正回路の回路図、第4図;第3図の回路図のタ
イミングチャート1・・・巻真、2・・・スイッチレバ
ー、3・・・回路基板、4・・・ピン、5・・・ビン、
6・・・スイッチピン、7・・・スイッチピン、8・・
・銅箔、9・・・銅箔、10・・・カム、11・・・ク
リック部、1 2, 1 3, 1 4−・・スイ
ッチ、15・・・チャタリング防止回路、16.17・
・・微分回路、18・・・計測回路、19・・・ORゲ
ート、20・・・R−Sタイプ・フリップ・フロツプ、
21・・−ANDゲー1、22・・・ANDゲート、2
3・・・EX,−ORゲート、24・・−ORゲート、
25.26・・・モードカウンター用メモリー、27.
28・・・モートカウンター〈 29・・・ANDゲー
ト、30・・・Noゲート、31・・・セレクトゲート
、32・・・セレクトゲート、33・・−AND−OR
ゲート、34・・・計測回路、35・・・ANDゲート
[Brief Description of the Drawings] Fig. 1: A plan view of the suirachi structure, Fig. 2: A plan view of the winding stem shown in Fig. 1 with it pulled out, Fig. 3: A circuit diagram of the measuring circuit and correction circuit according to the present invention, Figure 4; Timing chart of the circuit diagram in Figure 3 1... Winding stem, 2... Switch lever, 3... Circuit board, 4... Pin, 5... Bin,
6...Switch pin, 7...Switch pin, 8...
・Copper foil, 9...Copper foil, 10...Cam, 11...Click part, 1 2, 1 3, 1 4-...Switch, 15...Chattering prevention circuit, 16.17.
...Differential circuit, 18...Measuring circuit, 19...OR gate, 20...R-S type flip-flop,
21...-AND gate 1, 22...AND gate, 2
3...EX, -OR gate, 24...-OR gate,
25.26...Mode counter memory, 27.
28...Mote counter〈 29...AND gate, 30...No gate, 31...Select gate, 32...Select gate, 33...-AND-OR
Gate, 34...Measuring circuit, 35...AND gate.

Claims (2)

【実用新案登録請求の範囲】[Scope of utility model registration request] (1)外部操作部材の回転操作により開閉される第1の
スイッチと、同一外部操作部材の押引によって開閉され
る第2のスイッチを有する完全電子時計において、前記
第1のスイッチの操作から前記第2のスイッチの操作ま
での時間を測定する計測回路と、前記計測回路の信号に
より前記第1のスイッチの操作から前記第2のスイッチ
の操作までの時間が所定値以下のときに前記第1のスイ
ッチの操作前の状態に復帰させる補正回路を有する事を
特徴とする完全電子時計。
(1) In a fully electronic timepiece having a first switch that is opened and closed by rotating an external operating member, and a second switch that is opened and closed by pushing and pulling the same external operating member, from the operation of the first switch to the a measuring circuit for measuring the time until the operation of the second switch; and a measuring circuit that measures the time from the operation of the first switch to the operation of the second switch according to a signal from the measuring circuit. A fully electronic timepiece characterized by having a correction circuit that returns the state to the state before the switch was operated.
(2)外部操作部材の回転操作により開閉される第1の
スイッチと同二外部操作部材の押引によって開閉される
第2のスイッチを有する完全電子−時計において、前記
第2のスイッチの操作から前記第1のスイッチの操作ま
での時間を測定す.る計測回路と、前記計測回路の信号
により前記第2のスイッチの操作から前記第1のスイッ
チの操作までの時間が所定値以下のときに前記第1のス
イッチの操作前の状態に復帰させる補正回路を有する事
を特徴とする完全電子時計。
(2) In a fully electronic timepiece having a first switch that is opened and closed by the rotational operation of an external operating member and a second switch that is opened and closed by pushing and pulling the same external operating member, from the operation of the second switch. Measure the time until the first switch is operated. a measurement circuit, and a correction that returns the state before the operation of the first switch when the time from the operation of the second switch to the operation of the first switch is equal to or less than a predetermined value based on a signal from the measurement circuit. A completely electronic clock characterized by having a circuit.
JP1985101450U 1985-07-03 1985-07-03 electronic clock Granted JPS6142494U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985101450U JPS6142494U (en) 1985-07-03 1985-07-03 electronic clock

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985101450U JPS6142494U (en) 1985-07-03 1985-07-03 electronic clock

Publications (2)

Publication Number Publication Date
JPS6142494U true JPS6142494U (en) 1986-03-19
JPS626555Y2 JPS626555Y2 (en) 1987-02-14

Family

ID=30660888

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985101450U Granted JPS6142494U (en) 1985-07-03 1985-07-03 electronic clock

Country Status (1)

Country Link
JP (1) JPS6142494U (en)

Also Published As

Publication number Publication date
JPS626555Y2 (en) 1987-02-14

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