JPS6142127U - Tuning stop circuit for automatic tuning receiver - Google Patents
Tuning stop circuit for automatic tuning receiverInfo
- Publication number
- JPS6142127U JPS6142127U JP12589084U JP12589084U JPS6142127U JP S6142127 U JPS6142127 U JP S6142127U JP 12589084 U JP12589084 U JP 12589084U JP 12589084 U JP12589084 U JP 12589084U JP S6142127 U JPS6142127 U JP S6142127U
- Authority
- JP
- Japan
- Prior art keywords
- tuning
- circuit
- stop circuit
- receiver
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Stereo-Broadcasting Methods (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図はこの考案の一実施例を示す結線図、、第２図は
従来のものの一例を示す結線図である。
・１．２１・・・アンテナ、２，２２・・・フロントエ
ンド回路、３，２３・・・ＩＦ回路、４，２４・・・Ａ
ＮＤ回路、５，２５・・・インバータ回路、６，７，１
４，２６，２７・・・ボリューム，３．２８・・・コン
トロール回路、９．２９・・・マルチプレクサ、１０・
・・ステレオインジケータ、１１・・・トランジスタ、
１２，１３，１６・・・抵抗、１５・・・スイッチ。FIG. 1 is a wiring diagram showing an embodiment of this invention, and FIG. 2 is a wiring diagram showing an example of a conventional one.・1.21...Antenna, 2,22...Front end circuit, 3,23...IF circuit, 4,24...A
ND circuit, 5, 25... Inverter circuit, 6, 7, 1
4, 26, 27... Volume, 3.28... Control circuit, 9.29... Multiplexer, 10.
...stereo indicator, 11...transistor,
12, 13, 16...Resistor, 15...Switch.
Claims (1)
いあ、ＩＦ回路のＳＤ端子出力およびＳメータ出力と前
記ステレオ受信状態検出回路の串力との３出力のＡＮＤ
をとるＡＮＤ回路を設け、この． ＡＮＤ回路の出力に
よって選局動作を停止させ菰ようにしたことを特徴とす
る選局停止回路。In an automatic tuning receiver equipped with a stereo reception state detection circuit, the three outputs of the SD terminal output and S meter output of the IF circuit and the output of the stereo reception state detection circuit are ANDed.
An AND circuit is provided to take this . A channel selection stop circuit characterized in that the channel selection operation is stopped by the output of an AND circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12589084U JPS6142127U (en) | 1984-08-21 | 1984-08-21 | Tuning stop circuit for automatic tuning receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12589084U JPS6142127U (en) | 1984-08-21 | 1984-08-21 | Tuning stop circuit for automatic tuning receiver |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6142127U true JPS6142127U (en) | 1986-03-18 |
Family
ID=30684578
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12589084U Pending JPS6142127U (en) | 1984-08-21 | 1984-08-21 | Tuning stop circuit for automatic tuning receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6142127U (en) |
-
1984
- 1984-08-21 JP JP12589084U patent/JPS6142127U/en active Pending
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