JPS617150U - FPU receiver - Google Patents
FPU receiverInfo
- Publication number
- JPS617150U JPS617150U JP9151284U JP9151284U JPS617150U JP S617150 U JPS617150 U JP S617150U JP 9151284 U JP9151284 U JP 9151284U JP 9151284 U JP9151284 U JP 9151284U JP S617150 U JPS617150 U JP S617150U
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- terminals
- received
- fpu
- receiving antenna
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Radio Relay Systems (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
、第１図は従来のＦＰＵ受信装置のブロック図、第２図
は本考案の一実施例のブロック図である。
１，２・・・・・・ＦＰＵ受信空中線装置、３，４・・
・・・・二分配器、５・・・・・・ＳＨＦ切換器、６〜
９・・・・・・ＦＰＵ受信機、１０〜１３．２１〜２８
．３１〜３４・・・・・・端子。, FIG. 1 is a block diagram of a conventional FPU receiver, and FIG. 2 is a block diagram of an embodiment of the present invention. 1, 2... FPU receiving antenna device, 3, 4...
...Two-way divider, 5...SHF switch, 6~
9...FPU receiver, 10-13.21-28
．． 31-34...Terminal.
Claims (1)
受信信号を受け第１及び第２の端子から出力する第１の
二分配器と、前記第２の受信空中線の受信信号を受け第
３及び第４の端子から出力する第２の二分配器と、第５
の端子に受けた前記第２の端子の出力信号又は第６の端
子に受けた前記第４の端子の出力信号のうちのいずれか
一方を選択して第７の端子から出力する切換器と、前記
第１、第３及び第７の端子に受信信号の入力端子がそれ
ぞれ接続してある第１、第２及び第３のＦＰＵ受信機と
が備えてなるＦＰＵ受信装置。a first and second receiving antenna, a first two-way splitter that receives the received signal of the first receiving antenna and outputs it from the first and second terminals; and a first two-way splitter that receives the received signal of the second receiving antenna; a second two-way divider outputting from the third and fourth terminals, and a fifth
a switch that selects either the output signal of the second terminal received at the terminal or the output signal of the fourth terminal received at the sixth terminal and outputs it from a seventh terminal; An FPU receiving device comprising first, second, and third FPU receivers each having a received signal input terminal connected to the first, third, and seventh terminals, respectively.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9151284U JPS617150U (en) | 1984-06-19 | 1984-06-19 | FPU receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9151284U JPS617150U (en) | 1984-06-19 | 1984-06-19 | FPU receiver |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS617150U true JPS617150U (en) | 1986-01-17 |
Family
ID=30647467
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9151284U Pending JPS617150U (en) | 1984-06-19 | 1984-06-19 | FPU receiver |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS617150U (en) |
-
1984
- 1984-06-19 JP JP9151284U patent/JPS617150U/en active Pending
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