JPS6141224Y2 - - Google Patents

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Publication number
JPS6141224Y2
JPS6141224Y2 JP6094379U JP6094379U JPS6141224Y2 JP S6141224 Y2 JPS6141224 Y2 JP S6141224Y2 JP 6094379 U JP6094379 U JP 6094379U JP 6094379 U JP6094379 U JP 6094379U JP S6141224 Y2 JPS6141224 Y2 JP S6141224Y2
Authority
JP
Japan
Prior art keywords
electrode
lead
electrodes
width
capacitive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP6094379U
Other languages
Japanese (ja)
Other versions
JPS55162937U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6094379U priority Critical patent/JPS6141224Y2/ja
Publication of JPS55162937U publication Critical patent/JPS55162937U/ja
Application granted granted Critical
Publication of JPS6141224Y2 publication Critical patent/JPS6141224Y2/ja
Expired legal-status Critical Current

Links

Description

【考案の詳細な説明】 本考案は容量値のバラツキのない製作容易な積
層磁器コンデンサを提供せんとするものである。
[Detailed Description of the Invention] The present invention aims to provide a multilayer ceramic capacitor that is easy to manufacture and has no variation in capacitance value.

従来の積層磁器コンデンサは、第1図に示すよ
うな磁器シート10、つまり三側辺より一定間隔
をもつて電極20が付与されたものを、複数枚前
記電極20の導出端30が交互に相対向して位置
されるように積み重ねたものであつた。この場合
磁器シート10上に付与される電極20は、専ら
シルクスクリーン等で印刷、塗布されるが、この
印刷時に位置ズレを生じたり、印刷ムラによつて
印刷面積が変化したりすることが多く、これを積
み重ねた際に所定の電極対向面積が得られず、容
量値のバラツキの大きいものとなつていた。また
磁器シート10を積み重ねる際にも、正確に重合
させることは難かしく、所望の容量値を得ること
が困難となつていた。この磁器シート10の積み
重ね工程は、現在殆んど手作業で行なわれている
ため、このズレは不可避のものとされており、作
業者に相当の熟練を要求され、製作にも手数を要
するという欠点を有していた。
A conventional multilayer ceramic capacitor consists of a plurality of porcelain sheets 10 as shown in FIG. They were stacked so that they were facing each other. In this case, the electrodes 20 applied on the porcelain sheet 10 are printed and coated exclusively by silk screen or the like, but this printing often causes misalignment or changes in the printed area due to printing unevenness. When stacking these, a predetermined electrode facing area could not be obtained, resulting in large variations in capacitance value. Furthermore, when stacking the porcelain sheets 10, it is difficult to polymerize them accurately, making it difficult to obtain a desired capacitance value. Currently, the process of stacking the porcelain sheets 10 is mostly done manually, so this misalignment is unavoidable, requiring considerable skill on the part of the workers, and requiring a lot of effort to manufacture. It had drawbacks.

本考案は上記のような欠点を除去せんとしてな
されたものであつて、電極の付与位置や面積にズ
レやバラツキがあつても、また磁器シートの積み
重ねにズレがあつても、常に所望の容量が得られ
る積層磁器コンデンサを提供せんとするものであ
る。
The present invention was developed to eliminate the above-mentioned drawbacks, and even if there are misalignments or variations in the position and area of the electrodes, or even if there are misalignments in the stacking of porcelain sheets, the desired capacity can always be achieved. The present invention aims to provide a multilayer ceramic capacitor that provides the following properties.

以下本考案の実施例を図面とともに詳述する。 Embodiments of the present invention will be described in detail below with reference to the drawings.

第2図は一方の電極2が付与されてなる磁器シ
ート1の平面図、第3図は他方の電極4が付与さ
れてなる磁器シート3の平面図である。
FIG. 2 is a plan view of the porcelain sheet 1 provided with one electrode 2, and FIG. 3 is a plan view of the porcelain sheet 3 provided with the other electrode 4.

第2図における磁器シート1には、各端縁から
所定間隔をもつて付与されてなる容量電極2a
と、磁器シート1の一端部近傍に付与されてなる
導出電極2bと、両電極2aと2bとを連結する
ように付与されてなる連結電極2cとが一体に、
例えば印刷法により設けられている。この場合前
記連結電極2cは、容量電極2aの一側端中央部
であつて、容量電極2aの巾l1の半分の巾を有し
ている。つまり容量電極2aの両側から等しい長
さl2,l2を隔てて付与され、2l2の巾を有するもの
である。
The porcelain sheet 1 in FIG. 2 has capacitive electrodes 2a provided at predetermined intervals from each edge.
A lead-out electrode 2b provided near one end of the porcelain sheet 1, and a connecting electrode 2c provided to connect both electrodes 2a and 2b are integrally formed.
For example, it is provided by a printing method. In this case, the connection electrode 2c is located at the center of one end of the capacitor electrode 2a and has a width that is half the width l1 of the capacitor electrode 2a. That is, they are provided at equal lengths l 2 and l 2 from both sides of the capacitive electrode 2a, and have a width of 2l 2 .

第3図における磁器シート3には、第2図示の
ものと同様に、各端縁から所定間隔をもつて付与
されてなる容量電極4aと、磁器シート3の一端
部近傍に付与されてなる導出電極4bと、両電極
4aと4bとを連結するように付与されてなる連
結電極4cとが一体に設けられている。この場合
前記容量電極4aの巾l3は前記磁器シート1の容
量電極2aの巾l1よりも大きくし、重ね合わせた
時に容量電極2aが巾方向にはみ出ないようにし
ておく。また、容量電極4aと導出電極4bとを
連結する連結電極4cの巾は、前記の連結電極2
cの巾2l2と同じ巾で設けられている。そして両
磁器シート1,3の容量電極2a,4aの長さh
は等しくして付与されるとともに、後述する正規
に重ね合わされた場合には、その両先端が連結電
極2c,4cのそれぞれ中央部に位置されるよう
な長さに選ばれている。
The porcelain sheet 3 in FIG. 3 has capacitive electrodes 4a provided at predetermined intervals from each edge, and a lead-out electrode 4a provided near one end of the porcelain sheet 3, similar to the one shown in the second drawing. An electrode 4b and a connecting electrode 4c provided to connect both electrodes 4a and 4b are integrally provided. In this case, the width l3 of the capacitive electrode 4a is made larger than the width l1 of the capacitive electrode 2a of the ceramic sheet 1 so that the capacitive electrode 2a does not protrude in the width direction when stacked. Further, the width of the connecting electrode 4c connecting the capacitor electrode 4a and the lead-out electrode 4b is the same as that of the connecting electrode 2.
It is provided with the same width as the width 2l 2 of c. And the length h of the capacitive electrodes 2a and 4a of both porcelain sheets 1 and 3
are given equally, and are selected to have a length such that when they are properly overlapped as described later, both tips thereof are located at the center of each of the connecting electrodes 2c, 4c.

本考案は、このように形成される磁器シート1
および3を、それぞれ交互に複数枚、導出電極2
b,4bが相対向して位置されるように積み重ね
て一体に焼成し、外部接続用電極(図示しない)
を焼付けたりして積層コンデンサを得るのであ
る。
The present invention provides a porcelain sheet 1 formed in this way.
and 3, alternately, a plurality of sheets, and the lead-out electrode 2
b and 4b are stacked so that they are facing each other and fired together, and an electrode for external connection (not shown) is formed.
A multilayer capacitor is obtained by baking the

次に本考案積層磁器コンデンサの有用性につい
て詳述する。
Next, the usefulness of the multilayer ceramic capacitor of the present invention will be explained in detail.

第4図〜第6図は、第2図、第3図に示す磁器
シート1,3を重ね合わせた際の電極2,4の位
置関係を明確に示したもので、第4図示のものは
正規に重ね合わされた状態を、第5図、第6図示
のものは、一方の磁器シート1が巾方向および長
さ方向のいずれにもズレた状態を、それぞれ示し
たものである。
Figures 4 to 6 clearly show the positional relationship of the electrodes 2 and 4 when the porcelain sheets 1 and 3 shown in Figures 2 and 3 are overlapped, and the one shown in Figure 4 is a FIGS. 5 and 6 show a state in which the porcelain sheets 1 are properly stacked, and a state in which one of the porcelain sheets 1 is misaligned in both the width direction and the length direction, respectively.

第4図においては、両容量電極2a,4a、連
結電極2c,4cが、互いに重なり合う部分で容
量が得られ、これがすなわち所定の容量となる。
つまりこの場合の容量が形成される面積Sは、 S=h1l1+x2l2+x2l2 =h1l1+4xl2 となる。なお、h1は容量電極2aと4aとが重合
している長さ、xは連結電極2c,4cと容量電
極2a,4aとの重なり巾であり、左右等しく設
定されている。
In FIG. 4, a capacitance is obtained at a portion where both capacitance electrodes 2a, 4a and connection electrodes 2c, 4c overlap with each other, and this becomes a predetermined capacitance.
In other words, the area S where the capacitance is formed in this case is S=h 1 l 1 +x2l 2 +x2l 2 =h 1 l 1 +4xl 2 . Note that h 1 is the overlapping length of the capacitive electrodes 2a and 4a, and x is the overlapping width of the connecting electrodes 2c and 4c and the capacitive electrodes 2a and 4a, which are set equally on the left and right sides.

第5図は磁器シート1が巾方向(上方向)およ
び長さ方向(左方向)のいずれにもズレたもので
あり巾方向のズレは一方の容量電極4aが巾広に
形成されているので、他方の容量電極2aがはみ
出ない限り容量が変化することはない。これに対
し長さ方向のズレは、重なり合うべき連結電極4
cと容量電極2aとが重なり合わなくなるため、
その部分c1の容量は減少するが、逆に容量電極2
aの容量電極4aとの対向面積がc2,c2の部分だ
け実質的に増加し、容量も増加する。この場合連
結電極4cの巾2l2と容量電極2aの両側の長さ
l2,l2を合したものとは同寸であるので増加、減
少する容量は互いに相殺され、全体の容量は、第
4図示のものにくらべて全く変化することはな
い。すなわち第5図示のものにおいて、いま一方
の電極2が5mmだけ左方にズレたとすると、全体
の容量を形成する面積Sは、 S=(h1+5)l1+(x−5)2l2+(x−5)2l2 =h1l1+5l1+2xl2 −10l2+2xl2−10l2 となり、l1=4l2であるので、 S=4h1l2+20l2+2xl2 −10l2+2xl2−10l2 =4h1l2+4xl2 =h1l1+4xl2 となり、第4図のものの面積と全く同じになるこ
とがわかる。
In Figure 5, the porcelain sheet 1 is misaligned in both the width direction (upward direction) and the length direction (leftward direction).The misalignment in the width direction is due to the fact that one capacitor electrode 4a is formed wide. , the capacitance will not change unless the other capacitor electrode 2a protrudes. On the other hand, the difference in the length direction is caused by the connection electrodes 4 that should overlap.
c and the capacitive electrode 2a no longer overlap,
The capacitance of the part c1 decreases, but on the contrary, the capacitance of the capacitive electrode 2
The area of a facing the capacitive electrode 4a is substantially increased by the portions c 2 and c 2 , and the capacitance is also increased. In this case, the width 2l 2 of the connecting electrode 4c and the length on both sides of the capacitive electrode 2a
Since the size is the same as the sum of l 2 and l 2 , increases and decreases in capacity cancel each other out, and the overall capacity does not change at all compared to the one shown in Figure 4. That is, in the case shown in Figure 5, if the other electrode 2 is shifted to the left by 5 mm, the area S forming the entire capacitance is S = (h 1 + 5) l 1 + (x - 5) 2 l 2 +(x-5)2l 2 = h 1 l 1 +5l 1 +2xl 2 -10l 2 +2xl 2 -10l 2 , and since l 1 = 4l 2 , S = 4h 1 l 2 +20l 2 +2xl 2 -10l 2 +2xl 2 −10l 2 = 4h 1 l 2 + 4xl 2 = h 1 l 1 + 4xl 2 , and it can be seen that the area is exactly the same as the one in Figure 4.

第6図は磁器シート1が巾方向(下方向)およ
び長さ方向(右方向)にズレたものであり、第5
図のものと逆のものであるが、同様の理由により
これも容量が変化することはない。つまり、ズレ
ることによつて重合する部分C2の容量増加と、
実質的に重合しなくなる部分C4,C4の合した容
量減少とが相殺されることになるのである。
Figure 6 shows the porcelain sheet 1 shifted in the width direction (downward direction) and length direction (rightward direction);
Although this is the opposite of the one in the figure, the capacitance does not change for the same reason. In other words, the capacity of the part C 2 that polymerizes due to misalignment increases,
This is offset by the combined capacity reduction of the portions C 4 and C 4 that are no longer substantially polymerized.

なお、上記の記載ならびに図面は、本考案を説
明するための実施例であることはいうまでもな
く、本考案の趣旨を逸脱しない程度に変更するよ
うなこと、例えば導出電極の形状や面積、導出の
させ方を変えるようなことは、必要により行ない
得る。
It goes without saying that the above description and drawings are examples for explaining the present invention, and changes may be made without departing from the spirit of the present invention, such as the shape and area of the lead-out electrode, etc. The method of derivation may be changed as necessary.

以上の説明から明らかなとおり、本考案では電
極付与時や磁器シートの積み重ね時にズレが生じ
たとしても、その得られる容量は何ら変化せず、
常に所定容量の安定な積層磁器コンデンサを得る
ことができる。また、本考案ではズレによる影響
が全くないので、製作が容易となるばかりか、作
業者の熟練度もさほど必要としないものになる等
実用的効果は大きい。
As is clear from the above explanation, in the present invention, even if misalignment occurs when applying electrodes or stacking porcelain sheets, the obtained capacity will not change at all.
A stable multilayer ceramic capacitor with a predetermined capacity can always be obtained. Furthermore, since the present invention is not affected by misalignment at all, it is not only easy to manufacture, but also has great practical effects, such as not requiring much skill on the part of the operator.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の積層磁器コンデンサに用いられ
ている磁器シートの平面図、第2図、第3図は本
考案積層磁器コンデンサに用いる磁器シートの形
状例を示す平面図、第4〜6図は、第2図、第3
図の磁器シートを重ね合わせた状態を示すいずれ
も平面図である。 1,3……磁器シート、2a,4a……容量電
極、2b,4b……導出電極、2c,4c……連
結電極。
Figure 1 is a plan view of a ceramic sheet used in a conventional multilayer ceramic capacitor, Figures 2 and 3 are plan views showing examples of the shape of the ceramic sheet used in the multilayer ceramic capacitor of the present invention, and Figures 4 to 6. are shown in Figures 2 and 3.
Both are plan views showing a state in which the porcelain sheets shown in the figures are stacked one on top of the other. 1, 3...Porcelain sheet, 2a, 4a...Capacitive electrode, 2b, 4b...Leading electrode, 2c, 4c...Connection electrode.

Claims (1)

【実用新案登録請求の範囲】 周縁より所定間隔をもつて付与されてなる容量
電極と、一側端近傍に付与されてなる導出電極
と、この導出電極と前記容量電極とを連結するよ
うに付与されてなる連結電極とを有する磁器シー
トを、複数枚、前記導出電極が交互に相対向して
位置されるように積層し、前記導出電極の導出端
面に外部接続用電極を付与してなる積層磁器コン
デンサであつて、 対向する一方の容量電極の巾を他方の容量電極
の巾より大とし、前記連結電極の巾は巾狭の容量
電極の巾の半分とし、前記対向する容量電極の長
さは互いに同じで、かつその先端が積層された状
態において互いに他方の連結電極の領域に存する
ように設定してあることを特徴とする積層磁器コ
ンデンサ。
[Claims for Utility Model Registration] A capacitor electrode provided at a predetermined interval from the periphery, a lead-out electrode provided near one end, and a lead-out electrode provided to connect the lead-out electrode and the capacitor electrode. a plurality of porcelain sheets each having a connecting electrode formed of a plurality of porcelain sheets, the lead-out electrodes being alternately positioned facing each other, and external connection electrodes provided on the lead-out end faces of the lead-out electrodes. A ceramic capacitor, wherein the width of one of the opposing capacitive electrodes is larger than the width of the other capacitive electrode, the width of the connecting electrode is half the width of the narrower capacitive electrode, and the length of the opposing capacitive electrode is A multilayer ceramic capacitor characterized in that the capacitors are identical to each other, and their tips are located in the area of the other connecting electrode in a stacked state.
JP6094379U 1979-05-07 1979-05-07 Expired JPS6141224Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6094379U JPS6141224Y2 (en) 1979-05-07 1979-05-07

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6094379U JPS6141224Y2 (en) 1979-05-07 1979-05-07

Publications (2)

Publication Number Publication Date
JPS55162937U JPS55162937U (en) 1980-11-22
JPS6141224Y2 true JPS6141224Y2 (en) 1986-11-25

Family

ID=29294915

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6094379U Expired JPS6141224Y2 (en) 1979-05-07 1979-05-07

Country Status (1)

Country Link
JP (1) JPS6141224Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013004980A (en) * 2011-06-16 2013-01-07 Samsung Electro-Mechanics Co Ltd Stacked chip element and method for manufacturing the same

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5321630B2 (en) * 2011-03-30 2013-10-23 Tdk株式会社 Multilayer capacitor
KR102356801B1 (en) * 2017-09-12 2022-01-28 삼성전기주식회사 Multilayer ceramic

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013004980A (en) * 2011-06-16 2013-01-07 Samsung Electro-Mechanics Co Ltd Stacked chip element and method for manufacturing the same

Also Published As

Publication number Publication date
JPS55162937U (en) 1980-11-22

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