JP5321630B2 - Multilayer capacitor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a stacked capacitor that reduces a product-specific variation in capacitance. <P>SOLUTION: In the stacked capacitor, an internal electrode layer includes a first internal electrode 20 and a second internal electrode 30, an intermediate internal electrode layer includes a third internal electrode 40 having a shape extending in a direction of opposition of a first end face 1a and a second end face 1b and narrower than a width w1 of the first internal electrode 20 and the second internal electrode 30, and including a central portion 40c having a constant width w3 narrower than a width w2 of both end portions 40a, 40b, and the central portion 40c overlaps the first internal electrode 20 and the second internal electrode 30. <P>COPYRIGHT: (C)2013,JPO&amp;INPIT

Description

  The present invention relates to a multilayer capacitor.

  2. Description of the Related Art Conventionally, a multilayer capacitor formed by laminating a plurality of dielectric layers provided with an electrode pattern is known, and for example, disclosed in Patent Document 1 below. The multilayer capacitor disclosed in Patent Document 1 has an element body in which internal electrode layers and float electrode layers are alternately stacked via dielectric layers, and a series capacitor component is formed by the internal electrodes and the float electrodes. Is formed.

JP-A-7-135124

  When the multilayer capacitor as described above is manufactured, in the step of laminating the dielectric layers on which the electrode patterns are formed, a positional deviation (lamination misalignment) in a direction orthogonal to the laminating direction may occur between the dielectric layers that overlap one above the other. is there. Such a misalignment leads to variations in capacitance among the multilayer capacitor products. In particular, in a multilayer capacitor having a small capacitance (for example, about 10 pF) used in a recent high frequency filter of several gigahertz band, reduction of variation in the capacitance has become a very important technical problem.

  The present invention has been made to solve the above-described problem, and an object of the present invention is to provide a multilayer capacitor in which variation in capacitance between products is reduced.

  A multilayer capacitor in accordance with the present invention is a multilayer capacitor including an element body in which internal electrode layers and intermediate internal electrode layers are alternately stacked via dielectric layers, the first end face of the element body facing each other, and The second end face is provided with a first terminal electrode and a second terminal electrode, respectively, and the internal electrode layer is electrically connected to the first terminal electrode and second from the first end face side. A first internal electrode extending in the direction of the end surface of the first internal electrode, and a second internal electrode electrically connected to the second terminal electrode and extending in the direction of the first end surface from the second end surface side. The electrode layer is not connected to either the first terminal electrode or the second terminal electrode, and forms a plurality of capacitance components connected in series between the first internal electrode and the second internal electrode. 3 internal electrodes, and the third internal electrode includes a first end surface and a first end surface. A central portion extending in a direction facing the end surface of the first inner electrode and having a shape narrower than the width of the first internal electrode and the second internal electrode, and having a uniform width narrower than the width of both ends. The central portion overlaps with a part of the first internal electrode and a part of the second internal electrode.

  In this multilayer capacitor, when a misalignment in the width direction of the third internal electrode occurs between the internal electrode layer and the intermediate internal electrode layer, the width is larger than the width of the first internal electrode and the second internal electrode. Since the third internal electrode has a narrow shape, it is possible to suppress a change in electrostatic capacitance due to stacking misalignment in the width direction of the third internal electrode. In addition, even when a stacking misalignment between the internal electrode layer and the intermediate internal electrode layer occurs in the extending direction of the third internal electrode (that is, the facing direction between the first end surface and the second end surface), Since the central portion of the uniform width extends so as to overlap with a part of the first internal electrode and a part of the second internal electrode, the electrostatic discharge caused by the stacking deviation in the extending direction of the third internal electrode Capacitance change can also be suppressed. In particular, since the central portion of the third internal electrode is narrower than both ends, the stacking misalignment in the extending direction of the third internal electrode is smaller than when the central portion is not narrowed. In this case, the change in the opposed area between the first internal electrode and the third internal electrode and the change in the opposed area between the second internal electrode and the third internal electrode are reduced. As a result, the first internal electrode A change in the combined capacitance of a plurality of capacitance components connected in series formed by the electrode, the second internal electrode, and the third internal electrode is reduced. As described above, the multilayer capacitor according to the present invention can suppress a change in capacitance even when a multilayer shift occurs, so that a variation in capacitance among products can be reduced.

  Moreover, the aspect by which the center part of the 3rd internal electrode was divided | segmented into plurality along the facing direction of a 1st end surface and a 2nd end surface may be sufficient. In this case, the conductive state of the third internal electrode can be maintained even when one of the divided central portions is disconnected.

  Further, the difference between the end position in the width direction of the first internal electrode and the second internal electrode and the end position in the width direction of the end portion of the third internal electrode is the first internal electrode or the second internal electrode. It may be an aspect that is larger than the difference between the end position in the extending direction of the internal electrode and the end position on the center side in the extending direction of the end of the third internal electrode. In this case, it is possible to effectively suppress the change in the capacitance due to the stacking misalignment in the width direction as compared with the stacking misalignment in the extending direction of the third internal electrode.

  Moreover, the aspect which an internal electrode layer located in the outermost direction in the lamination direction of an element body among several internal electrode layers may be located in the outer side in the lamination direction of an element body rather than an intermediate | middle internal electrode layer may be sufficient. When the intermediate internal electrode layer is located outside the internal electrode layer in the stacking direction of the element body, it is between the first terminal electrode and the second terminal electrode and the third internal electrode of the intermediate internal electrode layer. However, stray capacitance can be avoided by adopting the above embodiment.

  ADVANTAGE OF THE INVENTION According to this invention, the multilayer capacitor by which the dispersion | variation in the electrostatic capacitance between products was aimed at is provided.

FIG. 1 is a perspective view showing a multilayer capacitor according to an embodiment of the present invention. 2 is a cross-sectional view taken along the line II-II of the multilayer capacitor shown in FIG. 3 is a cross-sectional view taken along line III-III of the multilayer capacitor shown in FIG. FIG. 4 is a development view in which the element body of the multilayer capacitor of FIG. 1 is developed for each dielectric layer. FIG. 5 is a view of the first internal electrode and the second internal electrode of the internal electrode layer and the third internal electrode of the intermediate internal electrode layer as viewed from the stacking direction. FIG. 6 is a view of the internal electrode layer of the multilayer capacitor according to the prior art as viewed from the stacking direction. FIG. 7 is a view showing a third internal electrode having a shape different from that of FIG. FIG. 8 is a diagram showing a third internal electrode having a shape different from that in FIG.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description, the same reference numerals are used for the same elements or elements having the same function, and redundant description is omitted.

  The configuration of the multilayer capacitor 100 according to the embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a perspective view showing the multilayer capacitor 100. FIG. 2 is a cross-sectional view taken along the line II-II of the multilayer capacitor 100 shown in FIG. 3 is a cross-sectional view of the multilayer capacitor 100 shown in FIG. 2 taken along the line III-III. FIG. 4 is a development view in which the element body 1 of the multilayer capacitor 100 is developed for each dielectric layer.

  As shown in FIG. 1, the multilayer capacitor 100 includes a base body 1 configured in a substantially rectangular parallelepiped shape by stacking and integrating a plurality of rectangular plate-shaped dielectric layers, a first terminal electrode 2, and a first terminal electrode 2. 2 terminal electrodes 3 are provided. The multilayer capacitor 100 has a length of about 0.4 to 5.7 mm, a width of 0.2 to 5.0 mm, and a thickness of about 0.2 to 3.2 mm.

  The first terminal electrode 2 is an external electrode formed on the first end face 1a in the longitudinal direction (X direction in the figure) of the element body 1 and covers the first end face 1a of the element body 1 and the end face Is formed so as to integrally cover a part of four side surfaces adjacent to each other. The second terminal electrode 3 is an external electrode formed on the opposite end surface (second end surface) 1b facing the first end surface 1a and covers the second end surface 1b of the element body 1. The four side surfaces adjacent to the end surface are integrally covered.

  The first terminal electrode 2 and the second terminal electrode 3 are plated on the element body 1. Specifically, a conductive paste mainly composed of Cu, Ni, Ag, Pd or the like is attached to the outer surface of the element body 1 by dipping or the like, and then baked at a predetermined temperature (for example, about 700 ° C.). It is formed by applying electroplating. Ni, Sn, etc. can be used for electroplating. The thicknesses of the first terminal electrode 2 and the second terminal electrode 3 are set to about 20 to 700 μm.

  As shown in FIGS. 2 and 3, the element body 1 is configured as a laminated body in which a plurality of rectangular plate-like dielectric layers 6, a plurality of internal electrode layers 7, and a plurality of intermediate internal electrode layers 8 are stacked. Has been. The internal electrode layer 7 and the intermediate internal electrode layer 8 are arranged one by one in the element body 1 along the stacking direction (Z direction in the figure) of the dielectric layer 6 (hereinafter simply referred to as “stacking direction”). Are disposed so as to sandwich at least one dielectric layer 6 therebetween. In the element body 1, the internal electrode layers 7 and the intermediate internal electrode layers 8 are alternately stacked via the dielectric layers 6.

  Actually, the plurality of dielectric layers 6 in the element body 1 of the multilayer capacitor 100 are integrated to such an extent that the boundary between them cannot be visually recognized. As shown in FIG. 4, the element body 1 is formed by stacking and firing 10 ceramic green sheets and integrating them. Specifically, the ten ceramic green sheets are, in order from the top, the sheet 10 on which no electrode pattern is formed, the sheet 11 on which the electrode pattern of the internal electrode layer 7 is formed, and the electrode pattern of the intermediate internal electrode layer 8. Sheet 12 formed, electrode 11 formed with electrode pattern of internal electrode layer 7, sheet 12 formed with electrode pattern of intermediate internal electrode layer 8, sheet 11 formed with electrode pattern of internal electrode layer 7, intermediate The sheet 12 on which the electrode pattern of the internal electrode layer 8 is formed, the sheet 11 on which the electrode pattern of the internal electrode layer 7 is formed, the sheet 12 on which the electrode pattern of the intermediate internal electrode layer 8 is formed, and the electrode pattern of the internal electrode layer 7 It is comprised with the sheet | seat 11 in which was formed.

Each sheet 10-12 _is configured and BaTiO 3, CaZrO ₃ as the main component, its thickness, i.e. the thickness of the dielectric layer 6 after firing, there is a 6～60Myuemu. The electrode pattern of each of the sheets 11 to 12 includes a conductive material such as Ni or Ni alloy, and is configured as a sintered body of a conductive paste including the conductive material.

  Next, the electrode pattern of the internal electrode layer 7 and the electrode pattern of the intermediate internal electrode layer 8 will be described with reference to FIG.

  As shown in FIG. 5, the electrode pattern of the internal electrode layer 7 includes a pair of internal electrodes 20 and 30 (a first internal electrode 20 and a second internal electrode 30). Each of these internal electrodes 20 and 30 has a rectangular shape with a width w1, and faces the first end surface 1a and the second end surface 1b on the sheet 11 in a state of being separated by a predetermined length. They are arranged in line symmetry with respect to a center line traversing in a direction orthogonal to the direction (Y direction in the figure) (hereinafter referred to as “width direction”).

  The first internal electrode 20 is located on the first end face 1a side of the element body 1, is electrically connected to the first terminal electrode 2, and extends from the first end face 1a to the second end face 1b side. ing. The second internal electrode 30 is located on the second end face 1b side of the element body 1, is electrically connected to the second terminal electrode 3, and extends from the second end face 1b to the first end face 1a side. ing.

  The electrode pattern of the intermediate internal electrode layer 8 is configured by a third internal electrode 40 disposed in the center of the sheet 12. The third internal electrode 40 is not connected to the first terminal electrode 2 and the second terminal electrode 3, and both the electrodes 2 and 3 are electrically insulated. The third internal electrode 40 has an I-shape and extends in the facing direction between the first end surface 1a and the second end surface 1b. The third internal electrode 40 includes wide end portions 40a and 40b having a width w2, and a narrow central portion 40c having a width w3 (w3 <w2).

  The central portion 40 c of the third internal electrode 40 has a uniform width, and the length in the extending direction is a part of the first internal electrode 20 and a part of the second internal electrode 30. Designed to hang. Therefore, the central portion 40 c of the third internal electrode 40 overlaps with a part of the first internal electrode 20 and a part of the second internal electrode 30. Further, both end portions 40 a and 40 b of the third internal electrode 40 also overlap with the first internal electrode 20 and the second internal electrode 30.

  Thereby, the third internal electrode 40 forms two capacitance components connected in series between the first internal electrode 20 and the second internal electrode 30. Specifically, the third internal electrode 40 forms a capacitance component of the electrostatic capacitance C1 in the opposing region facing the first internal electrode 20, and electrostatically forms in the opposing region facing the second internal electrode 30. A capacitance component of the capacitance C2 is formed, and these capacitance components are connected in series to form a combined capacitance C (= C1 × C2 / (C1 + C2)).

  The position and dimensions of the third internal electrode 40 are the widths of the first internal electrode 20 and the second internal electrode 30 with respect to the positions and dimensions of the first internal electrode 20 and the second internal electrode 30. The difference d1 between the end position in the direction and the end position in the width direction of the end of the third internal electrode 40 is the end in the extending direction of the first internal electrode 20 (or the second internal electrode 30). Designed to be larger than the difference d2 between the position of the portion and the end position of the end portion 40b (or end portion 40a) of the third internal electrode 40 on the center portion 40c side in the extending direction (ie, d1> d2). Yes.

  In the multilayer capacitor 100 having the configuration described above, when a misalignment in the width direction (Y direction) occurs between the internal electrode layer 7 and the intermediate internal electrode layer 8, the end of the third internal electrode 40 Since 40a and 40b have a shape (width w2) narrower than the width w1 of the first internal electrode 20 and the second internal electrode 30, stacking deviation is allowed by the difference d1 in the end position in the width direction. It is possible to suppress the change in capacitance due to the stacking deviation in the width direction of the third internal electrode 40.

  On the other hand, when the end positions in the width direction of the first internal electrode 20 ′, the second internal electrode 30 ′, and the third internal electrode 40 ′ are the same as in the prior art shown in FIG. However, the above-described stacking misalignment cannot be allowed, and as a result, the facing area is reduced due to the stacking misalignment, and the capacitance is greatly reduced.

  Even when a stacking misalignment in the extending direction (X direction) occurs between the internal electrode layer 7 and the intermediate internal electrode layer 8, the central portion 40 c having a uniform width is a part of the first internal electrode 20 and the first internal electrode 20. Since the second internal electrode 30 extends so as to overlap a part of the second internal electrode 30, it is possible to suppress a change in capacitance due to stacking misalignment in the extending direction of the third internal electrode 40. In other words, even when a reduction in the area facing the third internal electrode 40 occurs in one of the first internal electrode 20 and the second internal electrode 30 due to the stacking deviation in the extending direction, the other internal In the electrode, the facing area increases (compensates) by the reduced area, so that the change in capacitance is effectively suppressed.

  In particular, since the central portion 40c of the third internal electrode 40 is narrower than the both end portions 40a and 40b, the first internal electrode 40 is not disposed at the time of stacking misalignment in the extending direction of the third internal electrode 40. Changes in the opposing area between the electrode 20 and the third internal electrode 40 and the opposing area between the second internal electrode 30 and the third internal electrode 40 are reduced. That is, the width w3 of the central portion 40c of the third internal electrode 40 is narrowed (w3 <w2) with respect to the width w2 of both end portions 40a and 40b, thereby facing the stacking deviation (for example, the deviation amount of Δl). The amount of change in area (Δl × w3) is effectively reduced compared to the amount of change in the facing area (Δl × w2) when the width is not narrowed. Therefore, the amount of change in the capacitance C1 formed by the first internal electrode 20 and the third internal electrode 40 is reduced, and the second internal electrode 30 and the third internal electrode 40 are formed. As a result, the amount of change in the combined capacitance C is also reduced.

  In the case where the third inner electrode 40 ′ has a uniform width in the extending direction as in the prior art shown in FIG. 6, when the stacking misalignment occurs in the extending direction of the third inner electrode 40 ′. The amount of change in the facing area is larger than that in the above-described embodiment in which the central portion 40c is narrower than the both end portions 40a and 40b, and the combined capacitance C is thereby greatly changed.

  As described in detail above, in the multilayer capacitor 100, even if a multilayer deviation occurs, a change in capacitance can be suppressed, so that a variation in capacitance among products can be reduced. ing.

  Further, as shown in FIG. 5, with respect to the positional relationship between the first internal electrode 20 (or the second internal electrode 30) and the third internal electrode 40, the difference d1 in the end position in the width direction extends. Since the difference d2 from the end position with respect to the direction is larger than the stacking misalignment in the extending direction of the third internal electrode 40, the capacitance change caused by the stacking misalignment in the width direction is effectively suppressed. Can do. As described above, in the stacking misalignment in the extending direction, the opposing area is mutually compensated between the first internal electrode 20 and the second internal electrode 30, but the stacking misalignment in the width direction is such an opposing area. Therefore, it is preferable to increase the allowable length (d1) with respect to the stacking deviation in the width direction.

  Here, the terminal electrodes 2 and 3 formed on the end faces 1 a and 1 b of the element body 1 of the multilayer capacitor 100 form a stray capacitance between the terminal electrodes 2 and 3 and the internal electrodes formed in the element body 1. In particular, stray capacitance tends to occur between the portion of the terminal electrodes 2 and 3 that wrap around the side surface of the element body 1 and the third internal electrode 40. Therefore, when the intermediate internal electrode layer 8 is located outside the internal electrode layer 7 in the stacking direction of the element body 1, the first terminal electrode 2, the second terminal electrode 3, and the intermediate internal electrode layer 8 A stray capacitance is generated between the third internal electrode 40 and the third internal electrode 40.

  Therefore, in the multilayer capacitor 100, the internal electrode layers 7 are arranged on the uppermost layer and the lowermost layer of the element body 1, and among the plurality of internal electrode layers 7, internal electrodes located on the outermost side in the stacking direction of the element body 1. The stray capacitance is suppressed by positioning the layer 7 outside the intermediate internal electrode layer 8. That is, since the internal electrodes 20 and 30 of the internal electrode layer 7 are electrically connected to the terminal electrodes 2 and 3 having the same polarity, a stray capacitance is not generated between the terminal electrodes 2 and 3, and much more. The variation in electrostatic capacitance among products is reduced. In particular, since the width w1 of the first internal electrode 20 and the second internal electrode 30 is designed to be wider than the width w2 of the third internal electrode 40, the terminal electrodes 2, 3 and the third internal electrode 40 are designed. The situation in which stray capacitance occurs between the two is effectively suppressed.

  The present invention is not limited to the above embodiment, and various modifications are possible.

  The third internal electrode 40A shown in FIG. 7 differs from the above-described third internal electrode 40 in that the width of the central portion 40c is reduced by the opening 41. The opening 41 has a rectangular shape extending along the extending direction in the middle of the central portion 40c, and also in the third inner electrode 40A in which the central portion 40c is divided into two along the extending direction, The total sum of the widths of the two central portions 40c (width w4) is designed to be narrower than the width w2 of both end portions 40a and 40b.

  The third internal electrode 40B shown in FIG. 8 differs from the above-described third internal electrode 40A in that it is further constricted from the width direction. Also in the third inner electrode 40B, the total sum of the widths of the two central portions 40c (width w5) is designed to be narrower than the width w2 of both end portions 40a and 40b.

  Even the multilayer capacitor employing the third internal electrodes 40A and 40B shown in FIGS. 7 and 8 has the same or equivalent effect as the multilayer capacitor 100 employing the third internal electrode 40. Further, the width of the central portion 40c is made narrower as the width w5 of the central portion 40c of the third internal electrode 40B in FIG. 8 with respect to the width w4 of the central portion 40c of the third internal electrode 40A in FIG. As a result, the change in capacitance can be more effectively suppressed. Further, by dividing the central portion 40c into a plurality of parts like the third internal electrode 40A and the third internal electrode 40B, the conductive state of the third internal electrode is maintained even when one of them is disconnected. This can significantly improve the reliability of the multilayer capacitor.

  DESCRIPTION OF SYMBOLS 100 ... Multilayer capacitor, 1 ... Element body, 1a ... 1st end surface, 1b ... 2nd end surface, 2 ... 1st terminal electrode, 3 ... 2nd terminal electrode, 6 ... Dielectric layer, 7 ... Internal electrode Layers, 8 ... intermediate internal electrode layer, 20 ... first internal electrode, 30 ... second internal electrode, 40, 40A, 40B ... third internal electrode, 40a, 40b ... end, 40c ... center.

Claims (3)

A multilayer capacitor including an element body in which internal electrode layers and intermediate internal electrode layers are alternately stacked via dielectric layers,
A first terminal electrode and a second terminal electrode are respectively provided on the first end surface and the second end surface facing each other of the element body,
The internal electrode layer is electrically connected to the first terminal electrode and extends from the first end face side toward the second end face, and the second terminal electrode A second internal electrode that is electrically connected and extends in the first end face direction from the second end face side;
The intermediate internal electrode layer is not connected to any of the first terminal electrode and the second terminal electrode, and is connected in series between the first internal electrode and the second internal electrode. A third internal electrode forming a capacitive component of
The third internal electrode extends in a facing direction between the first end surface and the second end surface, and is narrower than widths of the first internal electrode and the second internal electrode. Including a central part having a shape and a uniform width narrower than the widths of both ends, wherein the central part overlaps a part of the first internal electrode and a part of the second internal electrode ;
A multilayer capacitor in which a central portion of the third internal electrode is divided into a plurality along the facing direction of the first end surface and the second end surface . A multilayer capacitor including an element body in which internal electrode layers and intermediate internal electrode layers are alternately stacked via dielectric layers,
A first terminal electrode and a second terminal electrode are respectively provided on the first end surface and the second end surface facing each other of the element body,
The internal electrode layer is electrically connected to the first terminal electrode and extends from the first end face side toward the second end face, and the second terminal electrode A second internal electrode that is electrically connected and extends in the first end face direction from the second end face side;
The intermediate internal electrode layer is not connected to any of the first terminal electrode and the second terminal electrode, and is connected in series between the first internal electrode and the second internal electrode. A third internal electrode forming a capacitive component of
The third internal electrode extends in a facing direction between the first end surface and the second end surface, and is narrower than widths of the first internal electrode and the second internal electrode. Including a central part having a shape and a uniform width narrower than the widths of both ends, wherein the central part overlaps a part of the first internal electrode and a part of the second internal electrode ;
The difference between the end position in the width direction of the first internal electrode and the second internal electrode and the end position in the width direction of the end of the third internal electrode is:
Larger than the difference between the end position in the extending direction of the first internal electrode or the second internal electrode and the end position on the center side in the extending direction of the end of the third internal electrode. , Multilayer capacitor. Among the plurality of the internal electrode layers, the internal electrode layer positioned on the outermost side in the stacking direction of the element body, located outside in the stacking direction of the intermediate said body than the internal electrode layer, according to claim 1 or 2. The multilayer capacitor according to 2 .

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