JPS6140034A - Chemical etching method for semiconductor device - Google Patents

Chemical etching method for semiconductor device

Info

Publication number
JPS6140034A
JPS6140034A JP16185584A JP16185584A JPS6140034A JP S6140034 A JPS6140034 A JP S6140034A JP 16185584 A JP16185584 A JP 16185584A JP 16185584 A JP16185584 A JP 16185584A JP S6140034 A JPS6140034 A JP S6140034A
Authority
JP
Japan
Prior art keywords
etching
layer
h2so4
gaas
etchant
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16185584A
Other languages
Japanese (ja)
Inventor
Takao Shibuya
隆夫 渋谷
Takeshi Hamada
健 浜田
Masaru Wada
優 和田
Yuichi Shimizu
裕一 清水
Kunio Ito
国雄 伊藤
Iwao Teramoto
寺本 巖
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP16185584A priority Critical patent/JPS6140034A/en
Publication of JPS6140034A publication Critical patent/JPS6140034A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • H01L21/30612Etching of AIIIBV compounds

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Weting (AREA)

Abstract

PURPOSE:To realize 3 flattened surface by a method wherein an epitaxial lamination wherein a layer built of GaAs is positioned just under the topmost layer built of GaAlAs is exposed to an etchant composed of H2SO4+H2O2+H2O. CONSTITUTION:On a GaAs substrate 1, an N type clad layer 2, activation layer 3 and P type clad layer 4 are formed in that order, all the three made of AlGaAs respectively composed as prescribed. A P type GaAs cap 5 is provided to cover the top surface. A mask 6 is provided and the GaAs cap 5 only is subjected to etching. The mask 6 is provided again. Etching is effected by using an etchant composed of H2SO4+H2O2+H2O until the GaAs substrate 1 is affected for the formation of flat mirror-like walls vertical to the P-N junction. The etchant should be composed of 10-96wt% of H2SO4 and 5-50wt% of H2O2+ H2O. The ratio in volume of H2SO4 against H2O2+H2O should be 10<-2>-10. With the etching rate being well under control within this range, etching results in a mirror surface. Such a product is of great use because it needs no cleavage when it is incorporated into a semiconductor laser device.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、G a A sとAI G a A sとか
ら成る半導体装置の化学エツチング方法に関するもやで
ある。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for chemically etching semiconductor devices comprising GaAs and AI GaAs.

従来例の構成とその問題点 半導体レーザーは一般に見開法によってキャビティー面
を形成しているが、光ICなどのように半導体レーザー
とディテクターや駆動回路などの素子とをモノリシック
に集積化しようとする場合、見開法は全く用いることは
できない。そのために、化学エツチング法によるウェッ
トエッチ法やりアクティブイオンエッチ(RIE)など
によるドライエッチ法が研究されている。量産化や信頼
性を考慮すると化学エツチング法が優れておシ、その容
易さから、いろいろな方法によるキャビティー面の作製
が試みられてきた。
Conventional configurations and their problems Semiconductor lasers generally have a cavity surface formed by the open method, but attempts are being made to monolithically integrate semiconductor lasers and elements such as detectors and drive circuits, such as in optical ICs. In this case, the spread method cannot be used at all. For this purpose, wet etching methods such as chemical etching methods and dry etching methods such as active ion etching (RIE) are being studied. Chemical etching is superior in terms of mass production and reliability, and because of its ease, various methods have been tried to fabricate the cavity surface.

以下、従来例について図−を参照しながら説明する。第
1図(a)に示すように、n型G aA s (100
)基板1上にn型Aj!0,4Ga0.6Asクラッド
層2、Ag002Gao、8As 活性層3、p型Ag
0.4Ga0.6Asクラッド層4及びp型G a A
 sキャン1層5を連続的に成長させた。
Hereinafter, a conventional example will be explained with reference to the drawings. As shown in FIG. 1(a), n-type GaA s (100
) n-type Aj on substrate 1! 0.4Ga0.6As cladding layer 2, Ag002Gao, 8As active layer 3, p-type Ag
0.4Ga0.6As cladding layer 4 and p-type Ga A
scan 1 layer 5 was grown continuously.

その後、第1図伽)に示すように、ストライプ状のフォ
トマスク6をく011〉方向に沿って形成し、このマス
クを通して基板までエツチングを行った。
Thereafter, as shown in FIG. 1, a striped photomask 6 was formed along the 011> direction, and the substrate was etched through this mask.

使用したエッチャントは64重量%の濃度の硫酸と30
重量%の濃度の過酸化水素水との体積比が30である。
The etchant used was sulfuric acid with a concentration of 64% by weight and 30% by weight.
The volume ratio with hydrogen peroxide solution having a concentration of 30% by weight.

上記のエッチャントを使用してエツチングを行うとキャ
ビティー面となる端面はわん曲しておシ、半導体レーザ
ーのキャビティー面としては極めて程度の低いものであ
る。エツチング面がわん曲するのは、エッチャントが拡
散律速糸として働くためである。
When etching is carried out using the above-mentioned etchant, the end face that becomes the cavity surface is curved, and the degree of bending is extremely low for a cavity surface of a semiconductor laser. The reason why the etched surface is curved is because the etchant acts as a diffusion rate-limiting thread.

従来の化学エツチング法によって作製されたレーザーで
はこのような問題のために、骨間法に比べてしきい値電
流密度が高く連続発振が極めて困難な状況にあった。
Due to these problems, lasers fabricated by conventional chemical etching methods have a higher threshold current density than the interosseous method, making continuous oscillation extremely difficult.

発明の目的 本発明は上記欠点に鑑み、最上層がALG a A m
層であシ、その下がG a A m層である多層のエピ
タキシャル成長層に平坦なエツチング面を形成すること
のできる半導体装置の化学エツチング方法を提供するも
のである。
Purpose of the Invention In view of the above-mentioned drawbacks, the present invention provides a structure in which the uppermost layer is ALG a Am
The present invention provides a method for chemically etching a semiconductor device, which can form a flat etched surface in a multilayer epitaxially grown layer with a GaAm layer underneath.

発明の構成 この目的を達成するために、本発明の半導体装置の化学
エツチング方法は、硫酸、過酸化水素水。
Structure of the Invention In order to achieve this object, the method of chemically etching a semiconductor device of the present invention uses sulfuric acid and hydrogen peroxide.

および水からなるエツチング液を用いて、G a A 
m層の上にAj!GaAs層を設けた半導体層をエツチ
ングすることから構成されている。
Using an etching solution consisting of G and water, G a A
Aj on top of m layer! It consists of etching a semiconductor layer provided with a GaAs layer.

実施例の説明 以下、本発明の一実施例について図面を参照しながら説
明する。第2図(a)に示すように、n型GaAs (
100)基板1上にn型Ajl。、 4Ga0.6As
クラッド層2、A11o 、2 Gao 、8As活性
層3、 p型jVo、4Gao、eA8 クラッド層4
及びp型G a A sキャップ層5を連続的に成長さ
せた。その後、第2図中)に示すように、ストライプ状
のフォトマスク6を<011)方向に沿って形成し、そ
のマスクを通してG a A !!キャップ層5のみを
選択的にエツチングした。さらに、第3図(C)に示し
たように7□ オドマスク6を除去した後、露出したp型A2o、4G
a0.6As  クラッド層4上にストライプ状のフォ
トマスク6を〈011〉方向に沿って形成し、このマス
クを通して基板までエツチングを行った。
DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. As shown in FIG. 2(a), n-type GaAs (
100) n-type Ajl on substrate 1; , 4Ga0.6As
Cladding layer 2, A11o, 2 Gao, 8As active layer 3, p-type jVo, 4Gao, eA8 cladding layer 4
and a p-type GaAs cap layer 5 were continuously grown. Thereafter, as shown in FIG. 2), a striped photomask 6 is formed along the <011) direction, and G a A ! is passed through the mask. ! Only the cap layer 5 was selectively etched. Furthermore, as shown in FIG. 3(C), after removing the 7□ odd mask 6, the exposed p-type A2o, 4G
A striped photomask 6 was formed on the a0.6As cladding layer 4 along the <011> direction, and etching was performed to the substrate through this mask.

使用したエッチャントは64重量%の硫酸と3゜重量%
の過酸化水素水との体積比が−である0上記のエッチャ
ントを使用してエツチングを行うと、キャビティー面と
なる端面はpn接合面に垂直でかつ平坦々鏡面が得られ
た。
The etchant used was 64% by weight of sulfuric acid and 3% by weight.
When etching was performed using the above-mentioned etchant having a -volume ratio of 0 to hydrogen peroxide, the end face serving as the cavity face was perpendicular to the pn junction surface and had a flat mirror surface.

第2図で得られたウエノ・−のキャップ層5上に正電極
7を形成し、基板側に負電極8を形成した後、エツチン
グを行った溝のところでブレイクして第3図に示すよう
な半導体レーザー素子を得た。
After forming a positive electrode 7 on the Ueno cap layer 5 obtained in FIG. 2 and forming a negative electrode 8 on the substrate side, it breaks at the etched groove, as shown in FIG. 3. A semiconductor laser device was obtained.

この半導体レーザー素子は連続発振で非常に高歩留で得
られており、典型的な発振しきい値は72mA(Jj9
開法では70mA)で、微分量子効率は片面当り29%
(骨間法では30%)と骨間法とほとんど差のない特性
が得られた。
This semiconductor laser device has been obtained with extremely high yield through continuous oscillation, and the typical oscillation threshold is 72 mA (Jj9
70mA in the open method), and the differential quantum efficiency is 29% per side.
(30% for the interosseous method), which was almost the same as the interosseous method.

なお、上記実施例ではエッチャントは64重量%の硫酸
と30重量%の過酸化水素水との体積比が−のものを使
用したがこれに限定されない。硫酸としては10〜96
重量%のものであれば良□く、また過酸化水素水として
は6〜50重量係のものであれば良く、また硫酸と過酸
化水素水との体積比は1o−2から10であれば良い。
In the above embodiments, the etchant used was one in which the volume ratio of 64% by weight sulfuric acid to 30% by weight hydrogen peroxide was -, but the present invention is not limited thereto. 10-96 as sulfuric acid
It is good if it is % by weight, and the hydrogen peroxide solution should be 6 to 50% by weight, and the volume ratio of sulfuric acid and hydrogen peroxide solution should be 10-2 to 10. good.

これらの範囲内で作製したエッチャントであれば、エツ
チングは反応律速か支配的とな勺、エツチング面は平坦
な鏡面が得られる。
If the etchant is prepared within these ranges, the etching will be rate-limiting or dominant, and the etched surface will have a flat mirror surface.

発明の効果 呆発明の半導体装置の化学エツチング方法は、最上層が
A RG a A m層であり、その下G a A m
層である多面のエピタキシャル成長層に化学エツチング
を行うことによって、平坦なエツチング面を形成するこ
とができるものである。半導体レーザー素子に利用した
場合には骨間法を必要とせず、光ICの実用化には不可
欠な技術であシ、その実用的効果には大なるものがある
Effects of the Invention Disappointing In the chemical etching method for semiconductor devices of the invention, the uppermost layer is an ARGaAm layer, and the lowermost layer is an ARGaAm layer.
By chemically etching a multifaceted epitaxially grown layer, a flat etched surface can be formed. When used in semiconductor laser devices, the interosseous method is not required, and it is an essential technology for the practical application of optical ICs, and its practical effects are significant.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のエツチングによるキャビティー面の製法
を示す図、第2図は本発明によるエツチングによるキャ
ビティー面の製法を示す図、第3図は本発明の製法によ
って作製された半導体レーザーの斜視図である。 1・・・・・・n型GaAs(100)基板、2・・・
・・・れ型fifll()、4 Gao 、 cs A
Bクラッド層、3・−・・−Al1o、2Ga0.8A
s活性層、4−・−−−−p型AItO,4”0.6”
クラッド層、5・・・・・・p型G a A sキャッ
プ層、6・・・・・・フォトマスク、7・・・・・・正
電極、8・・・・・・負電極。
FIG. 1 is a diagram showing a method for manufacturing a cavity surface by conventional etching, FIG. 2 is a diagram showing a method for manufacturing a cavity surface by etching according to the present invention, and FIG. 3 is a diagram showing a method for manufacturing a cavity surface by etching according to the present invention. FIG. 1... N-type GaAs (100) substrate, 2...
... type fill(), 4 Gao, cs A
B cladding layer, 3...-Al1o, 2Ga0.8A
s active layer, 4----p-type AItO, 4"0.6"
Cladding layer, 5...p-type Ga As cap layer, 6... photomask, 7... positive electrode, 8... negative electrode.

Claims (2)

【特許請求の範囲】[Claims] (1)最上層がAlGaAs層であり、前記AlGaA
s層の下の層がGaAs層である多層のエピタキシャル
成長層をエッチング液で化学エッチングするに際し、前
記エッチング液として硫酸、過酸化水素水および水の混
合液から成るものを用いることを特徴とする半導体装置
の化学エッチング方法。
(1) The top layer is an AlGaAs layer, and the AlGaAs
A semiconductor characterized in that when chemically etching a multilayer epitaxially grown layer in which the layer below the s-layer is a GaAs layer with an etching liquid, the etching liquid is a mixture of sulfuric acid, hydrogen peroxide, and water. Chemical etching method for equipment.
(2)10〜96重量%の濃度の硫酸と5〜50重量%
の濃度での過酸化水素水との体積比が10^−^2から
10までであるエッチング液を用いることを特徴とする
特許請求の範囲第1項記載の半導体装置の化学エッチン
グ方法。
(2) Sulfuric acid with a concentration of 10-96% by weight and 5-50% by weight
2. The method of chemically etching a semiconductor device according to claim 1, characterized in that an etching solution having a volume ratio of 10^-^2 to 10 with respect to a hydrogen peroxide solution at a concentration of 10 to 10 is used.
JP16185584A 1984-08-01 1984-08-01 Chemical etching method for semiconductor device Pending JPS6140034A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16185584A JPS6140034A (en) 1984-08-01 1984-08-01 Chemical etching method for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16185584A JPS6140034A (en) 1984-08-01 1984-08-01 Chemical etching method for semiconductor device

Publications (1)

Publication Number Publication Date
JPS6140034A true JPS6140034A (en) 1986-02-26

Family

ID=15743228

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16185584A Pending JPS6140034A (en) 1984-08-01 1984-08-01 Chemical etching method for semiconductor device

Country Status (1)

Country Link
JP (1) JPS6140034A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02207526A (en) * 1989-02-07 1990-08-17 Tokyo Electron Ltd Single wafer washing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02207526A (en) * 1989-02-07 1990-08-17 Tokyo Electron Ltd Single wafer washing method

Similar Documents

Publication Publication Date Title
JPS6140034A (en) Chemical etching method for semiconductor device
EP0076761A1 (en) Semiconductor lasers and method for producing the same
JP2771587B2 (en) Manufacturing method of semiconductor laser
JPH0584075B2 (en)
JP2940158B2 (en) Semiconductor laser device
JPH067622B2 (en) Method for manufacturing semiconductor laser device
JPS60223186A (en) Buried type semiconductor device
JPS6140078A (en) Manufacture of semiconductor laser device
KR950010242A (en) Semiconductor laser device and manufacturing method thereof
KR960027098A (en) Semiconductor laser diode and manufacturing method thereof
JPS62179790A (en) Semiconductor laser
KR940001499A (en) Manufacturing method and structure of semiconductor laser diode
JPS62108591A (en) Manufacture of semiconductor laser
KR970001895B1 (en) Laser diode of high power
JPS62217690A (en) Semiconductor light-emitting device and manufacture thereof
JPH084172B2 (en) Embedded quantum well semiconductor laser
JPS58192394A (en) Semiconductor laser device
JPS63233587A (en) Semiconductor laser device
JPH0247886A (en) Manufacture of surface emission type semiconductor laser
JPH1012975A (en) Fabrication of quantum box, semiconductor laser and fabrication thereof
JPS6212678B2 (en)
JPS6177327A (en) Etchant
JPH0244792A (en) Manufacture of semiconductor light emitting device
JPS59181083A (en) Manufacture of semiconductor element
JPS59119883A (en) Semiconductor light-emitting device