JPS6136281B2 - - Google Patents

Info

Publication number
JPS6136281B2
JPS6136281B2 JP52005841A JP584177A JPS6136281B2 JP S6136281 B2 JPS6136281 B2 JP S6136281B2 JP 52005841 A JP52005841 A JP 52005841A JP 584177 A JP584177 A JP 584177A JP S6136281 B2 JPS6136281 B2 JP S6136281B2
Authority
JP
Japan
Prior art keywords
synchronization
signal
output
phase
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP52005841A
Other languages
Japanese (ja)
Other versions
JPS5391519A (en
Inventor
Masakuni Tatsumi
Shoichi Matsuhashi
Yasushi Matani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Hitachi Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Nippon Telegraph and Telephone Corp filed Critical Hitachi Ltd
Priority to JP584177A priority Critical patent/JPS5391519A/en
Publication of JPS5391519A publication Critical patent/JPS5391519A/en
Publication of JPS6136281B2 publication Critical patent/JPS6136281B2/ja
Granted legal-status Critical Current

Links

Description

【発明の詳細な説明】 本発明は磁気ビデオデイスク装置の書込み制御
方式に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a write control method for a magnetic video disk device.

従来の磁気ビデオデイスク装置は動画の録画を
目的としているため書込開始時の瞬間的な同期の
乱れについては何等対策が為されていなかつた。
そのため、静止面を録画する場合には同期の乱れ
た期間も書込みが行われ、1フレーム書込みを行
うと映像の乱れやモアレが発生するなどの欠点が
あつた。
Since conventional magnetic video disk devices are intended for recording moving images, no countermeasures have been taken against instantaneous synchronization disturbances at the start of writing.
Therefore, when recording a still surface, writing is performed even during a period when the synchronization is disturbed, and when writing one frame, there are drawbacks such as image disturbance and moiré.

本発明は上述の従来技術の欠点に鑑み書込み開
始時の同期が乱れている期間に書込みを防止する
方式を提供するものである。
In view of the above-mentioned drawbacks of the prior art, the present invention provides a method for preventing writing during a period when the synchronization at the start of writing is disrupted.

本発明はデイスク駆動モータの回転同期位相を
監視し、該監視信号と偶奇フイールドを識別する
フイールド信号と書込指令信号とによつてヘツド
切替のタイミングを決定し、同期の乱れが解消し
安定状態が回復したのち書込を開始することを特
徴とするものである。以下添付図に従つて本発明
を詳細に説明する。
The present invention monitors the rotational synchronization phase of the disk drive motor, and determines the timing of head switching based on the monitoring signal, a field signal for identifying even/odd fields, and a write command signal, thereby eliminating synchronization disturbance and achieving a stable state. This feature is characterized in that writing starts after recovery. The present invention will be described in detail below with reference to the accompanying drawings.

添付図は本発明の一実施例を示すブロツク図で
あつて、図中1は書込み指令信号の入力端子で、
その書込み指令信号は書込み再生切替スイツチを
制御し、更にヘツド切替制御回路16にも導かれ
ている。2は映像入力信号の入力端子で、その映
像入力信号は緩衝増幅器4を介して書込み増幅器
5に導かれ、書込再成切替スイツチ8およびヘツ
ド切替スイツチ9を介して磁気ヘツド10又は1
1に導かれる。書込増幅器5の出力は更に切替ス
イツチ7に導かれており、その切替スイツチ7に
於て再生増幅器6の出力が書込増幅器5の出力の
いずれかが選択される。切替スイツチ7の出力は
水平同期分離回路12及び垂直同期分離回路22
に導かれる。水平同期分離回路12の出力端子1
3には水平同期パルスが得られる。垂直同期分離
回路22の出力端子は出力端子14および15と
なつており、出力端子14には垂直同期パルスが
得られ、出力端子15にはフイールドの偶奇を識
別するフイールド信号が得られる。水平同期パル
ス及び垂直同期パルスは位相比較器18に導か
れ、モータの回転速度に応じたパルスを発生する
回転検出装置21の出力信号と位相比較が行われ
る。位相比較器18からは同期信号とモータの回
転の位相差に比例した出力が得られ、その出力は
モータ駆動回路19及び位相同期監視回路17に
導かれる。位相同期監視回路17は位相比較器1
8の出力が規定の値の範囲内にあるか否かを監視
し、その可否を論理値の“0”又は“1”に変換
して出力する。位相同期監視回路17の出力はヘ
ツド切替制御回路16に導かれ、そのヘツド切替
制御回路16に於て入力端子1から来る書込み指
令信号と出力端子15から来るフイールド信号と
を論理処理し、同期が乱れたのち再び同期がとれ
た状態に達したとき始めてヘツド切替スイツチ9
に切替信号を送出する。
The attached figure is a block diagram showing one embodiment of the present invention, in which 1 is an input terminal for a write command signal;
The write command signal controls the write/reproduction changeover switch, and is also led to the head changeover control circuit 16. Reference numeral 2 denotes an input terminal for a video input signal, and the video input signal is led to a write amplifier 5 via a buffer amplifier 4, and then to a magnetic head 10 or 1 via a write regeneration switch 8 and a head switch 9.
I am guided by 1. The output of the write amplifier 5 is further led to a changeover switch 7, which selects either the output of the regenerative amplifier 6 or the output of the write amplifier 5. The output of the changeover switch 7 is the horizontal sync separation circuit 12 and the vertical sync separation circuit 22.
guided by. Output terminal 1 of horizontal synchronization separation circuit 12
3, a horizontal synchronization pulse is obtained. The output terminals of the vertical synchronization separation circuit 22 are output terminals 14 and 15. A vertical synchronization pulse is obtained at the output terminal 14, and a field signal for identifying whether the field is even or odd is obtained at the output terminal 15. The horizontal synchronization pulse and the vertical synchronization pulse are guided to a phase comparator 18, where the phases are compared with the output signal of a rotation detection device 21 that generates a pulse corresponding to the rotational speed of the motor. An output proportional to the phase difference between the synchronization signal and the rotation of the motor is obtained from the phase comparator 18, and the output is led to the motor drive circuit 19 and the phase synchronization monitoring circuit 17. The phase synchronization monitoring circuit 17 is the phase comparator 1
It monitors whether the output of No. 8 is within a specified value range, converts the result to a logical value of "0" or "1", and outputs the result. The output of the phase synchronization monitoring circuit 17 is led to the head switching control circuit 16, which logically processes the write command signal coming from the input terminal 1 and the field signal coming from the output terminal 15, to ensure synchronization. It is only when synchronization is reached again after the disturbance that the head changeover switch 9 is turned on.
Sends a switching signal to

上記実施例からも明らかなように本発明によれ
ば、同期の乱れた期間における書込みを防止でき
るので静止画の録画が非常に安定する。
As is clear from the above embodiments, according to the present invention, recording of still images is extremely stable because writing can be prevented during periods when synchronization is disrupted.

【図面の簡単な説明】[Brief explanation of the drawing]

添付図は本発明の一実施例を示すブロツク図で
ある。 1…割込信号入力端子、2…映像信号入力端
子、3…映像信号出力端子、4…緩衝増幅器、5
…書込増幅器、6…再生増幅器、7,8,9…切
替スイツチ、10,11…磁気ヘツド、12…水
平同期分離回路、13…水平同期信号出力端子、
14…垂直同期信号出力端子、15…フイールド
信号出力端子、16…ヘツド切替制御回路、17
…位相同期監視回路、18…位相比較器、19…
モータ駆動回路、20…デイスク駆動モータ、2
1…回転検出装置、22…垂直同期分離回路。
The accompanying drawing is a block diagram showing one embodiment of the present invention. 1... Interrupt signal input terminal, 2... Video signal input terminal, 3... Video signal output terminal, 4... Buffer amplifier, 5
...Write amplifier, 6...Regenerative amplifier, 7, 8, 9... Selector switch, 10, 11... Magnetic head, 12... Horizontal synchronization separation circuit, 13... Horizontal synchronization signal output terminal,
14... Vertical synchronization signal output terminal, 15... Field signal output terminal, 16... Head switching control circuit, 17
...Phase synchronization monitoring circuit, 18...Phase comparator, 19...
Motor drive circuit, 20... Disc drive motor, 2
1... Rotation detection device, 22... Vertical synchronization separation circuit.

Claims (1)

【特許請求の範囲】[Claims] 1 磁気ビデオデイスク制御方式において、デイ
スク駆動モータの回転速度を検出し、その速度に
応じたパルスを発生する回転検出手段と、該回転
検出手段の出力パルスと映像の水平同期パルス及
び垂直同期パルスとの位相比較を行う位相比較手
段と、該位相比較手段の出力が規定の値の範囲内
にあるか否かを監視し、それに応じた位相同期監
視信号を出力する位相同期監視手段と、書込み指
令信号とフイールドの偶奇を識別するフイールド
信号と前記位相同期監視信号との論理処理によ
り、同期が乱れたのち再び同期がとれた状態に達
したとき始めてヘツド切替スイツチに切替信号を
送出して書込みを行うヘツド切替制御手段を備え
たことを特徴とする書込タイミング制御方式。
1. In a magnetic video disk control system, a rotation detection means that detects the rotation speed of a disk drive motor and generates a pulse according to the speed, and an output pulse of the rotation detection means and a horizontal synchronization pulse and a vertical synchronization pulse of the video. a phase comparison means for performing a phase comparison, a phase synchronization monitoring means for monitoring whether the output of the phase comparison means is within a specified value range, and outputting a phase synchronization monitoring signal in accordance with the output, and a write command. By logically processing the field signal that identifies whether the signal is even or odd and the phase synchronization monitoring signal, a switching signal is sent to the head selector switch and writing is performed only when synchronization is achieved again after the synchronization has been disrupted. 1. A write timing control method characterized by comprising a head switching control means for controlling a write timing.
JP584177A 1977-01-24 1977-01-24 Write timing control system Granted JPS5391519A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP584177A JPS5391519A (en) 1977-01-24 1977-01-24 Write timing control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP584177A JPS5391519A (en) 1977-01-24 1977-01-24 Write timing control system

Publications (2)

Publication Number Publication Date
JPS5391519A JPS5391519A (en) 1978-08-11
JPS6136281B2 true JPS6136281B2 (en) 1986-08-18

Family

ID=11622233

Family Applications (1)

Application Number Title Priority Date Filing Date
JP584177A Granted JPS5391519A (en) 1977-01-24 1977-01-24 Write timing control system

Country Status (1)

Country Link
JP (1) JPS5391519A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5972880A (en) * 1982-10-19 1984-04-24 Nippon Kogaku Kk <Nikon> Electronic still camera

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3379828A (en) * 1965-03-29 1968-04-23 Ampex Programmed switching of servo error signals in tape apparatus synchronizing systems
JPS5174610A (en) * 1974-12-24 1976-06-28 Matsushita Electric Ind Co Ltd
JPS5241505A (en) * 1975-09-29 1977-03-31 Matsushita Electric Ind Co Ltd Recorder/player

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3379828A (en) * 1965-03-29 1968-04-23 Ampex Programmed switching of servo error signals in tape apparatus synchronizing systems
JPS5174610A (en) * 1974-12-24 1976-06-28 Matsushita Electric Ind Co Ltd
JPS5241505A (en) * 1975-09-29 1977-03-31 Matsushita Electric Ind Co Ltd Recorder/player

Also Published As

Publication number Publication date
JPS5391519A (en) 1978-08-11

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