JPS6136250B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an arithmetic processing device, and more particularly to an arithmetic processing device having a recipe check function for a multiplier.

Generally, arithmetic processing devices are equipped with various check functions from the viewpoint of improving reliability. One of them is the recipe check function. This predicts the multiplication result residue (generally, the remainder after dividing by 3) from the input multiplicand and multiplier values, and compares this with the actual multiplication result residue to determine the normality of the multiplier. This is a check.

FIG. 1 shows a conventional arithmetic processing device equipped with this type of recipe check function. In Figure 1, 1 is a multiplicand register that stores a multiplicand, 2 is a multiplier register that stores a multiplier, and both registers 1,
The contents of 2 are input to the multiplier 3 to perform multiplication, and the sum of products is stored in the sum (SUM) register 4 and the carry is stored in the carry (CARRY) register 5.
Adders 6 and 7 are circuits that add the contents of the SUM register and the CARRY register 5.
The output of the latter is stored in the calculation result register 8 as the final calculation result. Adder 7 is provided to check the normality of adder 6.
The outputs of both adders 6 and 7 are compared by a comparator 9 and the result is displayed on a check latch 11. On the other hand, SUM
The outputs of the register 4 and the CARRY register 5 are applied to a residue generator 10, and a residue value based on the multiplication result of the multiplier 3 is obtained. At this time, multiplicand register 1
and the output of the multiplication register 2 are directly sent to the recipe generator 1.
2 and predict the recipe value of the multiplication result. The comparator 13 compares the recipe values obtained by both recipe generators 10 and 12, and the result is sent to the check clutch 1.
Display on 4.

In this way, in a conventional arithmetic processing device equipped with a recipe check function, the normality of the adder is checked by having two identical adders in addition to the hardware required for the recipe check function. It takes twice as much hardware to make up the
The drawback was that the cost was high.

SUMMARY OF THE INVENTION An object of the present invention is to provide an arithmetic processing device that makes it possible to check an adder using less hardware by sharing a portion of the hardware required for the receipt check function.

Therefore, the features of the present invention include a recipe generator required for the recipe check function, a recipe correction circuit that corrects the recipe value obtained from this generator by an input carry to an adder and an output carry from the adder, etc. The purpose of this is to check the adder.

Next, one embodiment of the present invention will be described in detail using the drawings.

FIG. 2 is a block diagram of an embodiment of the present invention, in which the adder is divided into units of 1 byte, and the check of the adder is performed in units of 1 byte. The following explanation will focus on checking the i-th byte adder 27, but other (i-1)-th byte adders 26 and (i+1)-th byte adders 2 will be described.
The same applies to the 5th grade check. Furthermore, a similar check can be made even if the data width of the adder (i) 27 is expanded or reduced.

In Figure 2, SUM register (i) 21 and
CARRY register (i) 24 is adder (i) 27
The output of the adder (i) 27 is input to the recipe generator (i) 37. Also, SUM register (i) 21 and CARRY register (i) 24
is connected to the residue generator (i) 36, and the output 38 of the residue generator (i) 36 is connected to the adder (i+
1) Output carry (i+1)3 which is the output of 28
1 and the output carry (i) 29 which is the output of the adder (i) 27 as well as the recipe correction circuit (i).
39. Outputs from the residue generator (i) 37 and the residue value correction circuit (i) 39 are input to a comparator (i) 41, and the comparison result is stored in a check latch (i) 42. Note that the carry generator 35 is connected to each byte-cut adder and generates a carry to each adder.

Now, the contents of the SUM register (i) 21 and the CARRY register (i) 24 are transferred to the recipe generator (i) 3.
6 and outputs the recipe value based on the multiplication result. The residue value is the remainder when divided by 3, as shown in FIG. This is the recipe value (i) 38 before correction for the recipe correction circuit (i) 39.
becomes. On the other hand, SUM register (i) 21 and
The contents of the CARRY register (i) 24 are input to the adder (i) 27 and added, and the addition result is stored in the operation result register (i) 33 and input to the recipe generator (i) 37. The calculation result recipe value (i) 43 is output. This adder (i)
The addition result at 27 is stored in SUM register (i) 21
and the addition of CARRY register (i) 24,
In this case, the input carry (i) 30 output from the carry generator 35 is input to the adder (i) 27. This input carry (i) 30 is the same as the output carry (i+1) 31 output from the adder (i+1) 28 of the lower byte (i+1). Furthermore, an output carry (i) 29 is outputted by the addition in the adder (i) 27. Therefore, even if the calculation result recipe value (i) 43 and the pre-correction recipe value (i) 38 are compared, they do not match, and the adder (i)
It is not a 27 check. Therefore, the uncorrected recipe value (i) 38 obtained by the recipe generating circuit (i) 36 is converted into the output carry (i) 29 of the adder (i) 27 and the output carry (i+1) 31 of the adder (i+1) 28. Both are input to the residue correction circuit (i) 39 for correction, and the corrected residue value (i) 40 and the calculation result residue value (i) 43 obtained by the residue generation circuit (i) 37 are input to a comparator. (i) Compare with 41. FIG. 3 shows the correction logic in the recipe correction circuit (i) 39.
As a result, if the adder (i) 27 is normal, the corrected recipe value (i) 40 should match the operation result recipe value (i) 43, and the comparator (i) 41
It is possible to check the normality of the adder (i) 27 by the comparison output. Note that the ratio comparison result of comparator (i) 41 is
42.

The hardware necessary for checking the adder (i) 27 is a recipe correction circuit (i) 39, a recipe generator (i) 37, and a comparator (i) 41. The recipe generator (i) 36 is necessary for the original recipe check function and can be shared.

As is clear from the above description, according to the present invention, from the viewpoint of improving reliability, part of the hardware of the recipe check function for multipliers widely provided in arithmetic processing devices is shared, and a recipe correction circuit, etc. By adding a small amount of hardware, the adder can be checked with less hardware.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional arithmetic processing unit equipped with a recipe check function, FIG. 2 is a block diagram of an embodiment of the present invention, and FIG. 3 is a diagram showing an example of recipe correction logic used in the present invention. FIG. 4 is a diagram showing the expression of the recipe value. 20, 21, 22...SUM register, 23, 2
4, 25...CARRY register, 26, 27, 28
...Adder, 32, 33, 34...Arithmetic result register, 35...Carry generator, 36, 37...Recipe generator, 39...Recipe correction circuit, 41...Comparator, 42...Check clutch.

Claims (1)

[Scope of Claims] 1. An adder that adds an operand and an operation number, a first residue generator that inputs the operand and operation number and calculates a recipe value, and an adder that adds an operand and an operation number; a recipe correction circuit that corrects the recipe value by the input carry to the adder and the output carry from the adder; a second recipe generator that calculates the recipe value from the calculation result of the adder; and the recipe correction circuit. An arithmetic processing device comprising: a comparator that compares the obtained corrected residue value with the residue value obtained by the second residue generator. 2. The arithmetic processing device according to claim 1, wherein the recipe generator shares a circuit required for a recipe check function of a multiplier.