JPS6135593U - Inverter device - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of an embodiment of the present invention, Fig. 2 is an operation diagram of the main elements of the invention, Fig. 3 is a circuit diagram of another embodiment of the invention, and Fig. 4 is a conventional inverter device. FIG.

Claims (3)

[Scope of utility model registration request] (1) In an inverter device that drives a load by rectifying an AC power source with a rectifier circuit and inversely converting the DC output of the rectifier circuit with an inverse conversion circuit connected via a smoothing capacitor, the DC power source is connected in parallel to the smoothing capacitor. terminal voltage detection means connected to detect the terminal voltage of the smoothing capacitor;
An inverter device comprising: current suppressing means connected in series to the smoothing capacitor and operating to release in response to a signal from the terminal voltage detecting means. (2) The terminal voltage detection means includes a voltage dividing resistor provided in parallel with the smoothing capacitor, a series connection circuit of a Zener diode and a resistor connected in parallel to one of the voltage dividing resistors, and a circuit in which the Zener diode is connected to a Zener breakdown state. 2. The inverter device according to claim 1, wherein the inverter device comprises a transistor which outputs a signal to the current suppressing means when it becomes conductive. (3) The current suppressing means is formed by connecting in parallel an inrush current suppressing resistor and a semiconductor element whose gate is controlled by a signal from the terminal voltage detecting means. Claim 1 of the Utility Model Registration Claim: The inverter device described.