JPS6134688B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a current switching type high efficiency power amplifier circuit.

FIG. 1 shows a class C amplifier circuit as an example of a conventional power amplifier circuit. In Figure 1, 11 is a power supply terminal;
2 is an input terminal, and 13 is an output terminal. A signal input from the input terminal 12 drives the base of the transistor 17 with a sine wave through a π-type matching circuit comprising capacitors 14, 15 and a coil 16. At this time, a self-bias occurs due to the diode characteristics of the coupling capacitor 18 and the base, and a voltage is generated in the bias resistor 19 due to the bias current. The choke coil 20 and the capacitor 21 are connected so as not to affect the input high frequency signal.
Since the sinusoidal waveform that drives the base is shifted in the negative direction by the bias voltage, the time during which current flows through the base, that is, the period during which the transistor is conductive, is shorter than half a cycle. When a parallel resonant circuit consisting of the coil 22 and the variable capacitor 23 is connected to the output, the collector voltage has a sinusoidal waveform, and the collector current flows only in the vicinity where the collector voltage is minimum, resulting in high efficiency. The choke coil 24 supplies power to the collector, and the capacitor 25 acts as a coupling capacitor to block direct current and couple it to the parallel resonant circuit. The capacitor 26 is for the bypass of the power supply circuit.

Regarding the operation of a class C amplifier, as is generally known, the fundamental frequency component of the collector current becomes the output current. Since the collector current waveform changes depending on the base current and transistor characteristics, it is difficult to analyze the relationship between the transistor's conduction period (half of this period is called the operating angle), maximum output, and efficiency, but the relationship is It is known that the relationship between operating angle vs. maximum output and efficiency is as shown in the figure.

In FIG. 2, the horizontal axis represents the operating angle, and the vertical axis represents the maximum output and efficiency, where A represents the efficiency and B represents the maximum output.

Operation with an operating angle of 90° or less is called class C amplification.
As shown in FIG. 2, the efficiency increases as the operating angle becomes smaller, but the disadvantage is that the maximum output decreases.

Therefore, the present invention aims to improve the above-mentioned drawbacks of the conventional technology.The purpose of the present invention is to provide a power amplifier circuit that has a theoretical efficiency of 100% and can arbitrarily set the output power.The basic principle thereof is the switching In addition, like a class C amplifier circuit, a matching circuit (C, L, C π-type circuit, etc.) including parallel resonance or parallel capacitance is driven with a single-end output.

The power amplifier circuit according to the present invention includes two switching elements connected in series that alternately switch, a means for grounding one end of the switching elements, an output terminal connected to the other end, and a connection between the output terminal and the ground point. It has a tank circuit to be inserted, a power source that supplies power to the connection point of the two switching elements via a chain coil, and means for driving each of the switching elements so as to alternately perform a switching operation in accordance with an input signal. Examples will be described below with reference to the drawings.

FIG. 3 shows a first embodiment of the present invention, in which 31
is a positive polarity power supply, 32 is an input terminal, and 33 is an output terminal. A square wave excitation is input from the input terminal 32, and the pulse transformer 34 converts the two power
In order to drive the gates of MOS-FETs 35 and 36 with opposite polarities, power MOS-FETs 35 and 36 are driven alternately.
Performs ON/OFF switching operation. Power MOS
-FETs 35 and 36 have their drains connected to each other, and the connection point thereof is connected to the power source 31 through a high frequency choke coil 37. The source of power MOS-FET 36 is grounded, and the source of power MOS-FET 35 is output terminal 3.
3 is connected to a parallel resonant circuit constituted by a variable coil 38 and a capacitor 39 inserted in parallel with each other. The operation of this circuit will be explained using the equivalent circuit shown in FIG.

In Figure 4, power MOS-FET35,3
6 is a switch 45, 46 that turns ON and OFF alternately.
(hereinafter referred to as Q ₁ and Q ₂ ) is the same as in Fig. 3 except that

In FIG. 4, during the period when Q ₂ is ON (conducting), the current from the power source 41 flows through the choke coil 47 (hereinafter referred to as CH), and its energy is stored in CH. Next, during the period when Q ₂ is OFF (cut off) and Q ₁ is ON (conducted), point C (its potential is e ₁ ) and point D have the same potential as the hot end side of the parallel resonant circuit, and the CH Since the flowing current satisfies the property that it does not change suddenly (continuity of the current flowing through the coil), that is, the energy stored during the period when Q ₂ is ON is a continuous current, and it is configured by 48 and 49 at the same time as the current from the power source 41. excites the parallel resonant circuit. That is, assuming that the periods in which Q ₁ and Q ₂ are alternately turned on are the same length, the current that excites the parallel resonant circuit will be an intermittent current that flows for only half a period as shown at 51 in FIG. During the period when _Q1 is OFF, the potential at point C becomes a negative half-cycle sine wave due to the flywheel effect of the parallel resonant circuit, but the N-channel power MOS-FET 35 is in the OFF state and its source potential is lower than the drain potential. It does not affect the resonant circuit. Even during the OFF period of _Q2 , there is no influence because the potential of _Q2 , that is, the drain of the N-channel power MOS-FET is always higher than the potential of the grounded source. The current flowing during the period _Q1 when _Q1 is ON does not reverse from the drain to the source of the N-channel power MOS-FET 45. The current that flows while _Q2 is ON also flows only from the drain to the source of the N-channel power MOS-FET 46. This means that the power MOS-FET does not need to have bidirectional characteristics, and a normal unidirectional switch element having diode characteristics between the drain and source can be used.

Next, we will analyze the DC input and output power of this circuit. The voltage and current waveforms at each part are shown in Figure 5, and as mentioned above, 51 is the current at point C, i.e.
52 is the waveform of the current at Q ₁ (i ₁ ), 53 is the waveform of the voltage at point C (e ₁ ), and 53 is the waveform of the load resistance 50 (R _L
Ω). 54 is a continuous current (i ₃ ) flowing through CH.

In FIG. 4, since the load resistor 50 (R _L Ω) is connected in parallel to the parallel resonant circuit, e ₁ =i ₂ R _L (1) holds true. Also, assuming that Q ₁ and Q ₂ are ideal switches and ignoring the saturation ON voltage and leakage current, i ₃ is a continuous current whose magnitude is equal to i ₁ (peak value of i ₁ ), and the input power P ₁ , P ₁ = Ei ₃ ......(2) holds true.

Next, the power P ₂ due to i ₁ that excites the parallel resonant circuit including the load is e ₁ = e ₀ sinω ₀ t and P ₂ = 1/2π∫ ² 〓 ₀ e ₁ i ₁ dωt = 1/2π∫〓 ₀ ( e ₀ sinωt)・i ₃ dωt = e ₀ i ₃ /2π[−cosωt] 〓 ₀ = e ₀ i ₃ /π ………(3) Also, since Q ₁ and Q ₂ are ideal switches and do not cause loss, P ₁ = P ₂ ......(4) holds true.

From (4), Ei ₃ = e ₀ / πi ₃ e ₀ = πE (5). In other words, the relationship between the output voltage (e ₁ ) and the power supply voltage is e ₁ =πEsinω ₀ t (6). The relationship between load resistance 50 and output P ₃ is P ₃ = P ₂
Therefore, It is.

As explained above, this circuit has an output format that excites a parallel resonant circuit in a single end similar to a class C power amplifier circuit, but it is also capable of highly efficient power amplification, and in experiments, it has a 1.5MHz A high efficiency of over 90% was obtained at the frequency.

As explained above, the first embodiment provides the following advantages.

(1) Extremely high efficiency can be achieved because the amplification element performs switching operation.

(2) Since the switching current flows uniformly during the ON period, the switching element (amplification element) is
If loss due to resistance can be reduced, the switch element has a high withstand voltage, and there is a margin in terms of withstand voltage, it is more advantageous than a voltage switching type D class amplifier or the like.

(3) Compatible with conventional class C amplifiers due to the single-ended current-driven output format.

(4) Unlike the case of class C amplification, the input signal does not need to be a sine wave, no tuning circuit is required, and a wide band can be achieved.

(5) Since the amplification element performs switching operation, a neutralization circuit is not required.

(6) Since the amplification element performs switching operation, the linearity of the power supply voltage to the output voltage is good, and when used as a modulated amplifier, AM modulation with good linearity is possible.

(7) Since a coupling capacitor is not required and the power supply current changes little, the bypass capacitor only needs to have a small current rating, and the number of parts is small.

In the first embodiment, an N-channel MOS-FET was used as the amplification element, but the circuit of the present invention can be constructed with any switch element, and an example of a combination other than that of the first embodiment is shown in FIG.

In Figure 6, 61 is an example of negative power supply operation with two N-channel FETs, 62 is an example of positive power supply operation with a combination of N-channel and P-channel FETs, and 6
3 is an example of negative power supply operation in combination of N channel and P channel, 64 is an example of two positive power supply operation of P channel, and 65 is an example of two negative power supply operation of P channel. Six types are possible, including combinations of examples, and have exactly the same effect.

Further, FIG. 7 shows a method of replacing the MOS-FET with a bipolar transistor. In this case as well, there are six types of combinations, all of which have the same operation and effect.

Further, as shown in FIG. 8, the output tank circuit is not limited to a simple parallel resonant circuit, and various examples that also serve as impedance matching can have similar effects. 81 is an example of link coupling, 82 is an example of obtaining an output from a tap, and 83 is an example of π match type matching. Further, even if the device is excited by tapping as shown in 84, essentially the same operation and effect will occur.

Since the present invention provides a highly efficient power amplifier circuit, it can be used in power amplifiers for high-power transmitters, inverters, ultrasonic generators, etc., and is useful for miniaturization, weight reduction, and energy saving.

[Brief explanation of the drawing]

Figure 1 shows a conventional C-class power amplifier circuit, Figure 2 shows a C-class power amplifier circuit.
FIG. 3 is a diagram showing the relationship between the operating angle, efficiency, and maximum output of a class power amplifier circuit, and FIG.
The figure shows an equivalent circuit of the embodiment shown in Fig. 3, Fig. 5 shows voltage and current waveforms of various parts explaining the operation of the embodiment shown in Fig. 3, and Figs. 6 A to E show other configuration examples of the circuit of the present invention. ,
7A and 7B are diagrams showing a method of using bipolar transistors as switching elements;
Figures A to D show other examples of output tank circuits. 11, 31, 41...Power supply (terminal), 12, 3
2, 42... Input terminal, 13, 33, 43... Output terminal, 14, 15, 18, 21, 25, 26,
39, 49... Capacitor, 16, 22, 38,
48...Coil, 20,24,37,47...Chiyoke coil, 17...Transistor, 19...
Resistor, 23... Variable capacitor, 34... Pulse transformer, 35, 36... FET, 45, 46...
...Switch, 50...Load resistance, 51...Current waveform at point C, 52...Voltage waveform at point C, 53...Current waveform flowing through load resistor, 54...Current waveform flowing through choke coil, 61...N channel
Example of negative power supply operation of two FETs, 62...Example of positive power supply operation of N channel and P channel FETs, 63
...Example of negative power supply operation of N channel and P channel FET, 64...Example of positive power supply operation of two P channel FETs, 65...Example of negative power supply operation of two P channel FETs, 81...Example of link coupling , 82...
...Example of tap coupling, 83...Example of π match matching,
84...Example of tap excitation.

Claims (1)

[Claims] 1 2 connected in series with alternating switching operation
a switching element, a means for grounding one end of the switching element, an output terminal connected to the other end, a tank circuit inserted between the output terminal and the grounding point, and a connection point between the two switching elements. 1. A power amplification circuit comprising: a power source for supplying power to the switching element via a chain coil; and means for driving each of the switching elements to alternately perform a switching operation in accordance with an input signal.