JPS6133100A - Time slot alotting method - Google Patents

Time slot alotting method

Info

Publication number
JPS6133100A
JPS6133100A JP15500684A JP15500684A JPS6133100A JP S6133100 A JPS6133100 A JP S6133100A JP 15500684 A JP15500684 A JP 15500684A JP 15500684 A JP15500684 A JP 15500684A JP S6133100 A JPS6133100 A JP S6133100A
Authority
JP
Japan
Prior art keywords
time slot
control
channel
devices
channels
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15500684A
Other languages
Japanese (ja)
Inventor
Hirofumi Ookata
大片　宏文
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP15500684A priority Critical patent/JPS6133100A/en
Publication of JPS6133100A publication Critical patent/JPS6133100A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Abstract

PURPOSE:To simplify switch control by contriving a method in alloting n pieces of channels of the ith (i means integral numbers from 1-m) line housing device to a series of the 1st - nth time slots. CONSTITUTION:In terms of n-line housing devices 1-m having the same scale and same function, each channel of the devices 1-m is alloted in accordance with each time slot by allotment of a time slot and a multi control circuit 100. For example, the 1st channel through the nth channel of the 1st device are alloted in order to the 1st - the nth time slots mutually in succession, and control lasts only in accordance with length of n-time slot against the device 1. After lapse of the period thereof, n-time slot period control lasts likewise against the device 2 in succession. Such control condition gradually moves to the devices 3-m. Thus, m-times of switch control is good enough for allotment of time slot to all the lines.

Description

【発明の詳細な説明】 技術分野 本発明はタイムスロット割当て方式に関し、特にディジ
タル交換器において多重チャンネルをタイムスロツＩ・
に割当てる方式に関する。TECHNICAL FIELD The present invention relates to a time slot allocation scheme, and more particularly to a time slot allocation method for assigning multiple channels to a time slot I/O in a digital switch.
Regarding the method of allocating.

従来技術 従来のタイムスロット割当て方式について第１図に示す
システムを例に説明するに、同−規模及び同一機能を有
する゛ｎ回線収容装置１〜ｍがあり、これ等装置１〜ｍ
の各ｎチャンネルがタイムスロット割当て及び多重制御
回路１００によってタイムスロット毎に割当てられる。PRIOR ART To explain the conventional time slot allocation method using the system shown in FIG.
Each of the n channels is allocated for each time slot by the time slot allocation and multiplexing control circuit 100.

各装置１〜ｍに収容される各チャンネルは第２図に示す
様にｍタイムスロットの周期毎に順次割当てられる。第
２図において＊は１〜ｍを示す。そして、第３図に示す
様に各装冒毎に第２図で示したタイムスロット割当てを
１タイムスロツトずつずらして多重化している。Each channel accommodated in each device 1 to m is sequentially allocated every m time slot period as shown in FIG. In FIG. 2, * indicates 1 to m. As shown in FIG. 3, the time slot allocation shown in FIG. 2 is shifted by one time slot for each adventure and multiplexed.

従って、各装置ごとの割当てのタイムスロットは互いに
不連続となっているので、第４図に示す様に多重化時に
１タイムスロツト毎に装置内で制御が切替わることにな
り、この切替え制御が複雑化する欠点がある。Therefore, since the time slots assigned to each device are discontinuous with each other, control is switched within the device for each time slot during multiplexing, as shown in Figure 4, and this switching control is It has the disadvantage of complicating things.

発明の目的 本発明はかかる従来の欠点を排除すべくなされたもので
あって、その目的とするところは、各装置の各チャンネ
ルにタイムスロットを割当てるに際してその方法を工夫
することによって切替え制御を簡単化したタイムスロッ
ト割当て方式を提供することにある。OBJECT OF THE INVENTION The present invention has been made to eliminate such conventional drawbacks, and its purpose is to simplify switching control by devising a method for allocating time slots to each channel of each device. The purpose of this invention is to provide a time slot allocation method that is flexible.

各々がｎチャンネル（ｎは正の整数）を収容可能なｍ個
（ｍは正の整数）の回線収容装置の各チャンネルをタイ
ムスロットに割当てるディジタル交換器におけるタイム
スロット割当て方式であって、連続する第１〜第ｎのタ
イムスロットに第ｉ（ｉは１〜ｍまでの整数）の回線収
容装置のｎ個のチャンネルを夫々割当てるようにしたこ
とを特徴とする。A time slot assignment method in a digital exchange in which each channel of m (m is a positive integer) line accommodation devices each capable of accommodating n channels (n is a positive integer) is assigned to a time slot, and the channels are consecutive. The present invention is characterized in that the n channels of the i-th (i is an integer from 1 to m) line accommodation device are allocated to the first to n-th time slots, respectively.

火■１ 以下、図面を用いて本発明の詳細な説明する。Fire■1 Hereinafter, the present invention will be explained in detail using the drawings.

第５図〜第７図は本発明の詳細な説明する図であり、第
５図に示す様に連続するｎ個のタイムスロツ１−に各装
置の各チャンネルを順次割当てるようにしたものであり
、例えば、第１の装置１（第１図参照）の第１チヤンネ
ル〜第ｎチヤンネルを互いに連続する第１〜第ｎのタイ
ムスロットに順次割当てる・、す？′ある。そして、第
６図に示す様に各装置単位に第５図で示したととぎタイ
ムスロワ１〜割当てを多重化するものである。5 to 7 are diagrams for explaining the present invention in detail, in which each channel of each device is sequentially allocated to n consecutive time slots 1- as shown in FIG. For example, how to sequentially allocate the first to nth channels of the first device 1 (see FIG. 1) to the first to nth time slots that are consecutive to each other? 'be. Then, as shown in FIG. 6, the assignments of the time thrower 1 shown in FIG. 5 are multiplexed for each device.

その結果、各装置に対する制御の切替えタイミングは第
７図に示す様に行われる。すなわら、装置１に対しては
ｎタイムスロットの長さだけ制御が続行しこの期間が経
過すると続いて装置２に対して同様にｎタイムスロット
期間制御が続行して、順次かかる制御状態が装置３〜ｍ
へと移行していくことになる。よって、全回線にタイム
スロットを割当てるためには、ｍ回の切替え制御がなさ
れるだけで充分となる。As a result, the control switching timing for each device is performed as shown in FIG. In other words, control continues for device 1 for the length of n time slots, and after this period elapses, control continues for device 2 for a period of n time slots, and such control states are sequentially changed. Device 3~m
It will move to. Therefore, in order to allocate time slots to all lines, it is sufficient to perform switching control m times.

発明の効宋 本発明によれば、各装置の各チャンネルに連続的にタイ
ムスロットを割当でるものであるから、多重化のための
装置間の制御切替え回数が従来のｍｎ回から第７図に示
したにうにｍ回に減少するので、結果的に多重制御が簡
単化される利点がある。Effects of the Invention According to the present invention, since time slots can be continuously assigned to each channel of each device, the number of control switching between devices for multiplexing can be reduced from the conventional mn times to the number shown in FIG. As shown, the number of times is reduced to m, which has the advantage of simplifying multiple control.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図はディジタル交換器の概略構成図、第２図〜第４
図は従来のタイムスロット割当て方式を説明するタイム
ヂャート、第５図〜第７図は本発明の詳細な説明するタ
イムヂャードである。 主要部分の符号の説明 １〜ｍ・・・・・・ｎ回線収容装置 １００・・・・・・タイムスロット割当て及び多重制御
回路Figure 1 is a schematic diagram of the digital exchanger, Figures 2 to 4
The figure is a time chart explaining the conventional time slot allocation method, and FIGS. 5 to 7 are time charts explaining the present invention in detail. Explanation of symbols of main parts 1 to m...n line accommodation device 100...time slot allocation and multiplex control circuit

Claims (1)

【特許請求の範囲】[Claims] 各々がｎチャンネル（ｎは正の整数）を収容可能なｍ個
（ｍは正の整数）の回線収容装置の各チャンネルをタイ
ムスロットに割当てるディジタル交換器におけるタイム
スロット割当て方式であって、連続する第１〜第ｎのタ
イムスロットに第ｉ（ｉは１〜ｍまでの整数）の回線収
容装置のｎ個のチャンネルを夫々割当てるようにしたこ
とを特徴とするタイムスロット割当て方式。A time slot assignment method in a digital exchange in which each channel of m (m is a positive integer) line accommodation devices each capable of accommodating n channels (n is a positive integer) is assigned to a time slot, and the channels are consecutive. A time slot allocation method characterized in that n channels of an i-th (i is an integer from 1 to m) line accommodation device are allocated to the first to n-th time slots, respectively.
JP15500684A 1984-07-25 1984-07-25 Time slot alotting method Pending JPS6133100A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15500684A JPS6133100A (en) 1984-07-25 1984-07-25 Time slot alotting method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15500684A JPS6133100A (en) 1984-07-25 1984-07-25 Time slot alotting method

Publications (1)

Publication Number Publication Date
JPS6133100A true JPS6133100A (en) 1986-02-15

Family

ID=15596631

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15500684A Pending JPS6133100A (en) 1984-07-25 1984-07-25 Time slot alotting method

Country Status (1)

Country Link
JP (1) JPS6133100A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6398903U (en) * 1986-12-18 1988-06-27
JPH01166685A (en) * 1987-11-20 1989-06-30 General Instr Corp Automatic reporting apparatus of data obtained at remote site

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54146517A (en) * 1978-05-09 1979-11-15 Fujitsu Ltd Digital multiplication transmission system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54146517A (en) * 1978-05-09 1979-11-15 Fujitsu Ltd Digital multiplication transmission system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6398903U (en) * 1986-12-18 1988-06-27
JPH0547205Y2 (en) * 1986-12-18 1993-12-13
JPH01166685A (en) * 1987-11-20 1989-06-30 General Instr Corp Automatic reporting apparatus of data obtained at remote site
JPH0666799B2 (en) * 1987-11-20 1994-08-24 ジェネラル・インストルメント・コーポレーション Automatic reporting device for data generated in remote areas

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