JPS6132737B2 - - Google Patents

Info

Publication number
JPS6132737B2
JPS6132737B2 JP55098903A JP9890380A JPS6132737B2 JP S6132737 B2 JPS6132737 B2 JP S6132737B2 JP 55098903 A JP55098903 A JP 55098903A JP 9890380 A JP9890380 A JP 9890380A JP S6132737 B2 JPS6132737 B2 JP S6132737B2
Authority
JP
Japan
Prior art keywords
circuit
output
detection circuit
capacitor
recording
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP55098903A
Other languages
Japanese (ja)
Other versions
JPS5724053A (en
Inventor
Kikuo Kato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP9890380A priority Critical patent/JPS5724053A/en
Publication of JPS5724053A publication Critical patent/JPS5724053A/en
Publication of JPS6132737B2 publication Critical patent/JPS6132737B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B27/00Editing; Indexing; Addressing; Timing or synchronising; Monitoring; Measuring tape travel
    • G11B27/10Indexing; Addressing; Timing or synchronising; Measuring tape travel
    • G11B27/19Indexing; Addressing; Timing or synchronising; Measuring tape travel by using information detectable on the record carrier
    • G11B27/22Means responsive to presence or absence of recorded information signals

Description

【発明の詳細な説明】 本発明は、録音テープの曲間(無録音部)を検
出する回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit for detecting gaps between songs (unrecorded portions) on a recording tape.

第1図は、従来の曲間検出回路の構成を示すブ
ロツク図である。
FIG. 1 is a block diagram showing the configuration of a conventional song interval detection circuit.

図において1は、録音テープから磁気ヘツドを
介して電気信号に変換された入力信号が印加され
る入力端子、2は入力信号が規定の録音レベル以
上か否かで、録音、無録音の判定をおこなう回
路、3は、無録音部の時間を検出する回路、4は
録音部の時間を検出する回路、5はフリツプフロ
ツプ回路、6は、選曲機能の動作を制御するリセ
ツト信号が印加される端子、7は、検出回路3の
出力をうけて、一定時間、出力端子8に検出信号
出力を発生させるためのワンシヨツトマルチバイ
ブレータである。選曲機能は、リセツト信号を端
子6に一つ送り、フリツプフロツプを、リセツト
状態にすることにより開始される。入力信号レベ
ル判定回路2によつて、録音レベルと判定されれ
ば、検出回路3と4へ信号が送られる。検出回路
4が録音時間を規定値以上と検出し、フリツプフ
ロツプ回路5をセツトすれば、検出回路3の停止
入力In2が解除される。停止入力In2が解除される
までは、たとえ、入力信号レベル判定回路2が、
無録音と判定しても、検出回路3は、動作しな
い。停止入力In2が、解除された後、入力信号レ
ベル判定回路2が、無録音レベルと判定すれば、
停止入力In1が解除され、検出回路3が動作す
る。無録音部が規定時間以上あれば、ワンシヨツ
トマルチバイブレータ7を働かせ、検出信号出力
が得られる。これで、曲間検出がおこなわれたこ
とになる。
In the figure, 1 is an input terminal to which an input signal converted from a recording tape to an electrical signal via a magnetic head is applied, and 2 is a terminal that determines recording or non-recording based on whether the input signal is above a specified recording level. 3 is a circuit for detecting the time of the non-recording section; 4 is a circuit for detecting the time of the recording section; 5 is a flip-flop circuit; 6 is a terminal to which a reset signal for controlling the operation of the song selection function is applied; 7 is a one-shot multivibrator for receiving the output of the detection circuit 3 and generating a detection signal output at the output terminal 8 for a certain period of time. The music selection function is started by sending one reset signal to terminal 6, placing the flip-flop in the reset state. If the input signal level determination circuit 2 determines that the input signal level is at the recording level, a signal is sent to the detection circuits 3 and 4. When the detection circuit 4 detects that the recording time is greater than the specified value and sets the flip-flop circuit 5, the stop input In2 of the detection circuit 3 is released. Until the stop input In 2 is released, even if the input signal level determination circuit 2
Even if it is determined that there is no recording, the detection circuit 3 does not operate. After the stop input In 2 is released, if the input signal level determination circuit 2 determines that it is at the non-recording level,
The stop input In 1 is released and the detection circuit 3 is activated. If the unrecorded portion is longer than the specified time, the one-shot multivibrator 7 is activated and a detection signal output is obtained. This means that the song interval detection has been performed.

第2図は、検出回路3の具体的な例を示す回路
図である。第2図において、In1に入力レベル判
定回路2の出力が接続され、In2にフリツプフロ
ツプ回路5の出力が接続される。Out1は、検出
回路3の出力に相当する。停止入力In1,In2の一
方もしくは両方が解除されていなければトランジ
スタQ1,Q2の一方もしくは、両方が導通状態で
あり、容量C1は放電状態にあり、Out1は“L0
である。
FIG. 2 is a circuit diagram showing a specific example of the detection circuit 3. In FIG. 2, the output of the input level determination circuit 2 is connected to In 1 , and the output of the flip-flop circuit 5 is connected to In 2 . Out1 corresponds to the output of the detection circuit 3. If one or both of the stop inputs In 1 and In 2 are not released, one or both of the transistors Q 1 and Q 2 is in a conductive state, the capacitor C 1 is in a discharge state, and Out 1 is “L 0 ”.
It is.

In1,In2がともに解除され、トランジスタQ1
Q2が非導通状態となれば、容量C1に充電がおこ
なわれる。この充電電圧が、比較器9の基準電圧
に達するまでの間In1,In2が解除され続ければ
(すなわち、無録音期間が続けば)Out1は
“Hi”となり、無録音部が検出されたことにな
る。
Both In 1 and In 2 are released, and transistors Q 1 ,
When Q 2 becomes non-conductive, capacitor C 1 is charged. If In 1 and In 2 continue to be released until this charging voltage reaches the reference voltage of comparator 9 (that is, if the non-recording period continues), Out 1 becomes "Hi" and a non-recording section is detected. It turns out.

第3図は、録音部検出回路4の具体例を示す回
路図である。In3に入力信号レベル判定回路2の
出力が接続される。Out2は、検出回路4の出力
に相当する。いま入力信号レベル判定回路2によ
つて録音レベルと判定された信号がIn3に加えら
れると、トランジスタQ3が導通し、容量C2はト
ランジスタQ5のコレクタ電流I1によつて充電がお
こなわれる。充電電圧が比較器10の基準電圧
V2に達するまでの間、トランジスタQ3が導通を
続ける(すなわち、録音部が続く)と、比較器1
0の出力Out2が、“L0”から“Hi”に反転し、
録音部(曲)の検出がおこなわれたことになる。
FIG. 3 is a circuit diagram showing a specific example of the recording section detection circuit 4. As shown in FIG. The output of the input signal level determination circuit 2 is connected to In 3 . Out2 corresponds to the output of the detection circuit 4. When the signal that has now been determined to be at the recording level by the input signal level determination circuit 2 is applied to In 3 , the transistor Q 3 becomes conductive, and the capacitor C 2 is charged by the collector current I 1 of the transistor Q 5 . It can be done. The charging voltage is the reference voltage of the comparator 10
If transistor Q 3 continues to conduct (i.e. the recording section continues) until V 2 is reached, comparator 1
0 output Out2 is inverted from “L 0 ” to “Hi”,
This means that the recording section (song) has been detected.

この録音検出回路4は、ノイズ等が大きなレベ
ルで誤録音されたものと、曲(通常録音部)とを
見分けるために、必要とされる機能を有する。
This recording detection circuit 4 has a function required to distinguish between a piece of music (normally recorded part) and a piece of music recorded erroneously with a large level of noise or the like.

以上の説明は1曲が選曲される場合の動作につ
いて述べたが、検出信号出力をカウンターに接続
し、曲数のカウント等をおこなおうとする場合、
1曲選曲毎に、フリツプフロツプ回路5をリセツ
トする必要が生じる。リセツトされなければ、2
曲目以降、録音部検出機能が動作しないためであ
る。このための手段としては、検出信号出力のワ
ンシヨツト出力が完了した時に、フリツプフロツ
プ回路5をリセツトするように、出力端子8とリ
セツト入力端子6を接続すれば良い。しかしなが
ら、これだけでは、録音部検出回路4に使用して
いる容量C2に電荷が蓄積されているため、再び
フリツプフロツプ回路5はセツトされ、上記リセ
ツト動作は、正しくおこなわれない。これを防ぐ
ために下記2つの対策が考えられるが、いずれも
最適な効果は得られない。
The above explanation describes the operation when one song is selected, but if you connect the detection signal output to a counter and try to count the number of songs, etc.
It is necessary to reset the flip-flop circuit 5 every time a song is selected. If not reset, 2
This is because the recording section detection function does not operate after the song. As a means for this purpose, the output terminal 8 and the reset input terminal 6 may be connected so that the flip-flop circuit 5 is reset when the one-shot output of the detection signal is completed. However, if this is done alone, charge is accumulated in the capacitor C2 used in the recording section detection circuit 4, so the flip-flop circuit 5 is set again, and the above-mentioned reset operation is not performed correctly. In order to prevent this, the following two countermeasures can be considered, but neither of them provides the optimal effect.

(1) 比較器10の入力抵抗を下げておき、ある程
度容量C2の電荷を放電させる。ただし、録音
部検出の時間誤差を大きくしないため、あまり
入力抵抗は下げられず、放電時間が長くなる。
したがつて、選曲周期が速くなる(短かい曲部
が続く様な場合)と、検出時間誤差が非常に大
きくなり、正しく機能しない。
(1) Lower the input resistance of the comparator 10 and discharge the charge in the capacitor C 2 to some extent. However, since the time error in detecting the recording section is not increased, the input resistance cannot be lowered much and the discharge time becomes longer.
Therefore, if the song selection cycle becomes faster (in the case of a series of short song sections), the detection time error becomes very large and the device does not function properly.

(2) 検出信号出力によつて、フリツプフロツプ回
路5をリセツトするときと同時に、容量C2
放電をおこなう。
(2) At the same time as resetting the flip-flop circuit 5 by outputting the detection signal, the capacitor C2 is discharged.

ただし、フリツプフロツプ回路5のリセツト
は、出力端子8のワンシヨツト出力が完了した
時点(例えば、出力が“Hi”から“L0”へ立
ち下がる信号)でなければならない。そうでな
いと、検出回路3の出力が途中で切られること
になり、出力のワンシヨツト時間が変わつてし
まう。
However, the flip-flop circuit 5 must be reset at the time when the one-shot output from the output terminal 8 is completed (for example, when the output falls from "Hi" to "L 0 "). Otherwise, the output of the detection circuit 3 will be cut off midway, and the one shot time of the output will change.

したがつて、非常に短かい時間のパルス入力
で、容量C2を放電させねばならず、非常に困
難である。
Therefore, it is necessary to discharge the capacitor C 2 by inputting a pulse for a very short time, which is extremely difficult.

また、出力が完了時点より、一定時間容量
C2の放電を行こなう等が考えられるが、回路
が複雑となり実用的でない。
In addition, the capacity will be increased for a certain period of time after the output is completed.
It is conceivable to discharge C2 , but the circuit would be complicated and would be impractical.

本発明は以上の点に鑑みてなされたものであ
る。第4図に本発明の構成例を示す。第4図にお
いて、符号1〜8は、第1図と同一のもので、同
じ働きをする。なお、録音部検出回路4は、説明
をわかりやすくするため、第3図で示した、具体
例を適用したものを示している。検出信号出力
は、ワンシヨツトマルチバイブレータ7が、働い
たとき、一定時間“Hi”を出力するものとして
以下説明する。(定常は、“L0”である。)11
は、検出信号出力の立ち下り部分を検出して、フ
リツプフロツプ回路5のリセツト信号を得る出力
立下り検出回路である。12は、選曲開始用のリ
セツト信号と、出力立下り検出回路11からのリ
セツト信号とを、フリツプフロツプ回路5に与え
るためのOR回路である。ワンシヨツトマルチバ
イブレータ7の出力が、“L0”から“Hi”へ変化
した時点で、すでに、検出回路4の動作は完了し
ているから、容量C2の充電電荷は無用となつて
いる。
The present invention has been made in view of the above points. FIG. 4 shows a configuration example of the present invention. In FIG. 4, numerals 1 to 8 are the same as in FIG. 1, and have the same functions. Note that, in order to make the explanation easier to understand, the recording section detection circuit 4 is shown using the specific example shown in FIG. 3. The detection signal output will be explained below assuming that the one-shot multivibrator 7 outputs "Hi" for a certain period of time when it is activated. (Steady is "L 0 ".) 11
is an output fall detection circuit which detects the fall portion of the detection signal output and obtains a reset signal for the flip-flop circuit 5. Reference numeral 12 denotes an OR circuit for applying a reset signal for starting music selection and a reset signal from the output fall detection circuit 11 to the flip-flop circuit 5. By the time the output of the one-shot multivibrator 7 changes from "L 0 " to "Hi", the operation of the detection circuit 4 has already been completed, so the charge in the capacitor C 2 has become useless.

したがつて、検出信号出力が一定時間“Hi”
にある期間を利用して、容量C2の電荷を放電し
てやればよい。
Therefore, the detection signal output is “Hi” for a certain period of time.
The charge in the capacitor C 2 can be discharged using a certain period of time.

ここでは、バツフア回路13を通して、トラン
ジスタQ6を導通状態として、容量C2の電荷を強
制放電している。
Here, the transistor Q 6 is turned on through the buffer circuit 13, and the charge in the capacitor C 2 is forcibly discharged.

以上述べたように本発明によれば、検出信号出
力を利用して、容量の電荷を放電する手段を設け
たので、くり返しての選曲動作を確実に行うこと
ができる。
As described above, according to the present invention, since a means for discharging the charge of the capacitor using the detection signal output is provided, it is possible to reliably perform the music selection operation repeatedly.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、従来の選曲回路の構成を示すブロツ
ク図、第2図は、検出回路の具体例を示す回路
図、第3図は、録音部検出回路の具体例を示す回
路図、第4図は、本発明の一実施例を示す回路図
である。 図において、3は第2の検出回路、4は第1の
検出回路、7はワンシヨツトマルチバイブレータ
ー、C2は容量である。なお、図中同一符号は、
同一又は相当する部分を示す。
FIG. 1 is a block diagram showing the configuration of a conventional music selection circuit, FIG. 2 is a circuit diagram showing a specific example of a detection circuit, FIG. 3 is a circuit diagram showing a specific example of a recording section detection circuit, and FIG. The figure is a circuit diagram showing one embodiment of the present invention. In the figure, 3 is a second detection circuit, 4 is a first detection circuit, 7 is a one-shot multivibrator, and C2 is a capacitor. In addition, the same symbols in the figure are
Indicates the same or equivalent part.

Claims (1)

【特許請求の範囲】 1 録音テープの走行が、無録音部から録音部へ
移つたことを容量の充電電圧によつて検出する第
1の検出回路と、録音部から無録音部へ移つたこ
とを検出する第2の検出回路と、上記第1及び第
2の検出回路からの制御信号によつて、曲間であ
れば、一定時間出力を出すワンシヨツトマルチバ
イブレータ回路と、上記マルチバイブレータ回路
が出力を出している期間に、上記容量の充電電荷
を放電させる手段とを備えたことを特徴とする録
音テープの曲間検出回路。 2 容量の充電電荷を放電させる手段は、上記容
量に並列にトランジスタを接続し、ワンシヨツト
マルチバイブレーター回路の出力信号により上記
トランジスタを導通させるようにしたことを特徴
とする特許請求の範囲第1項記載の録音テープの
曲間検出回路。
[Scope of Claims] 1. A first detection circuit that detects the transition of the running of the recording tape from the non-recording section to the recording section using the charging voltage of the capacitor; A second detection circuit detects the sound, and a control signal from the first and second detection circuits causes a one-shot multivibrator circuit that outputs an output for a certain period of time between songs, and a one-shot multivibrator circuit that outputs an output for a certain period of time between songs. A recording tape track interval detection circuit comprising means for discharging the charge in the capacitance during a period of output. 2. Claim 1, characterized in that the means for discharging the charge in the capacitor is a transistor connected in parallel to the capacitor, and the transistor is made conductive by an output signal of a one-shot multivibrator circuit. The inter-track detection circuit for the recording tape described.
JP9890380A 1980-07-18 1980-07-18 Intermusic detecting circuit of sound recording tape Granted JPS5724053A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9890380A JPS5724053A (en) 1980-07-18 1980-07-18 Intermusic detecting circuit of sound recording tape

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9890380A JPS5724053A (en) 1980-07-18 1980-07-18 Intermusic detecting circuit of sound recording tape

Publications (2)

Publication Number Publication Date
JPS5724053A JPS5724053A (en) 1982-02-08
JPS6132737B2 true JPS6132737B2 (en) 1986-07-29

Family

ID=14232083

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9890380A Granted JPS5724053A (en) 1980-07-18 1980-07-18 Intermusic detecting circuit of sound recording tape

Country Status (1)

Country Link
JP (1) JPS5724053A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0450570Y2 (en) * 1984-09-12 1992-11-30

Also Published As

Publication number Publication date
JPS5724053A (en) 1982-02-08

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