JPS6132604A - Temperature compensation type electronic timepiece - Google Patents

Abstract

PURPOSE:To perform stable, wide-range temperature compensation by composing the electronic timepiece of a storage circuit which supplies a corrected value to a temperature information correcting circuit, a logical circuit which generates a primary and a secondary coefficient, etc., for the output data of the temperature information correcting circuit and temperature, and an oscillation circuit and a frequency dividing circuit which performs logical speeding-up and slowing-down operation. CONSTITUTION:The analog output of a temperature detecting circuit 207 is converted into digital information by an A-D converting circuit. An error of the temperature detecting circuit and an error of the A-D converting circuit are added to said information, so it is corrected into digital data as to each integrated circuit chip. This corrected value is written in the storage circuit 202 composed of an EPROM temporarily and the corrected data is stored in a primary and secondary correcting circuit 203 and converted on axial symmetry basis about the peak temperature of crystal, thereby making primary and secondary corrections. The primary correction substitutes the tertiary correction. The high-order 3-4 bits of the obtained biary data are led to the frequency dividing circuit 205 as they are to perform speeding-up and slowing-down operation.

Description

[Detailed Description of the Invention] [Technical Field] The present invention corrects the frequency deviation caused by the temperature of a crystal oscillator to realize a highly accurate electronic timepiece. A block diagram of a compensated high-precision clock circuit is shown. Analog information proportional to temperature is converted by a temperature detection circuit 103 into digital information by an A-D conversion circuit 104. After that, since the temperature detection circuit has individual variations,
32K for 0 clock that corrects variations with temperature information correction circuit
Since the Hz crystal resonator has a dominant quadratic coefficient with respect to temperature, the pulse width modulation circuit 106 constitutes a square circuit to change the oscillation frequency of the crystal oscillation circuit. Since large capacitance switching is performed by feedback to the circuit, the oscillation circuit becomes unstable and compensation over a wide temperature range is difficult. Even if this is done, the frequency deviation will become large at room temperature ±20° C. or higher.

〔the purpose〕

The present invention eliminates these drawbacks and provides more stability over a wide range of temperatures! [Overview] Figure 2 is a block diagram according to the present invention. The analog output from the temperature detection circuit 207 is converted into digital information by the A-D conversion circuit 206. This information is Since the errors of the detection circuit and the errors of the A and 7D conversion circuits are added, the digital data is corrected for each integrated circuit chip. This correction value is one EPROM (Erasabi!, a Pr
ofratntnabλg ReadOrl,y Me
The data written to the storage circuit 202 and made up of a memory circuit 202, etc., is stored in the primary and secondary correction circuits 206. After being converted to line symmetry with respect to the peak temperature of the crystal, -order and quadratic corrections are performed. −Order correction is a substitute for cubic correction 0 The top 6 of the binary data obtained here
The 4 bits are directly led to the frequency divider circuit 205 to perform logic adjustment. The lower several bits are converted to pulse dsty,
Constants such as the capacitance and feedback resistance of the oscillation circuit 204 are switched. These temperature compensation systems change the frequency over time (
For example, when observed as an average value over a period of 10 seconds), high accuracy is maintained over a wide temperature range. [Embodiment] FIG. 3 shows an embodiment of the present invention. Block 301 is the second
It corresponds to block 201 in the figure and is a temperature information correction circuit. 2, 302 (=202) is a memory circuit, 303 (=203) is a crystal oscillator-order, secondary correction circuit, 304 (=204) is an oscillation circuit, and 505 (
=205) is a frequency dividing circuit. The period of the output from the AD converter is proportional to the temperature as shown in FIG.

This output is sent to the presettable down counter 306, 3.
07, a signal having a pulse width proportional to the numerical code set by IPROM=312 is obtained. Here, by changing the numerical code, the slope with respect to temperature can be varied.
The signal of KI(z) and the pulse width signal of the (warm button

This signal is further guided to a presettable down counter composed of 309 to 311 to count the number of pulses.

When down-counting here, the E'PROM 512 is adjusted so that the number of pulses becomes 0 at the peak temperature (temperature at the peak of the secondary characteristics of the crystal). Furthermore, as shown in FIG. 5, adjustments are made so that the same temperature information is obtained when the temperature is the same distance from the peak flow rate.

Next, assuming that this information is 9, in the crystal oscillator-order secondary correction circuit 303, as described below, at a temperature higher than the peak temperature, s(n + &), and at a temperature lower than the peak temperature, n(
n-'&).

315 and 316 are program frequency dividing circuits. When the temperature information is n, it works as an n frequency divider circuit. 319 performs addition and subtraction according to the output of the counter 311.

Therefore, 317 and 318 operate as (n0k) (s-k) frequency divider circuits, and when viewed comprehensively, 9 (%10k) 1% (n
−”, k). This operation performs squaring, so if the original data is constant bits, the length becomes 2m bits. Therefore, the lower previous bits are truncated and the upper bits are A' as if taking out the chikubit.
An ND gate 620 is provided. The final data will be as shown in Figure 6, with up counters 321 to 324 in binary code.
is accumulated in The middle and lower several bits of these data control the feedback resistors 325 and 326 of the crystal oscillation circuit 304 to change the gain and adjust the output frequency. Also top 3-4
The bits are led to a frequency divider circuit 305 for logical adjustment.

The frequency-temperature characteristic of this temperature compensation system is given by the following equation.

f=β(T-θwhx)2+r(T-θMAI)3
A: Here, β: Crystal oscillator secondary temperature coefficient γ: 3NI: Upper bit value of final captured value N2: Lower m bit value θMAW: Vertex temperature [Effect] The effects of this system are as follows. Things are mentioned. One is by actively using the memory circuit, *u
There is no increase in area versus using the sv method. Xi A M OS (Fl
loatint-2ate Avaλanchetnj
traction Metαn Oxide E3emi
The internal frequency divider circuit was used to access these addresses. Therefore, when writing data to FAMO3, if the last terminal is also used for address setting, only one high voltage application terminal is required.
).

The second method is to perform a simple correction of the third-order temperature coefficient of the crystal resonator using the first order. The third-order coefficient is not a problem in the temperature range of oMAX ± 10℃, but θMAX
When the temperature exceeds ±20°C, the frequency deviation due to the third-order coefficient suddenly increases. The system maintains high accuracy over a wide range of temperatures.

The third method is to correct the frequency using a crystal oscillation circuit and a frequency dividing circuit. If frequency correction is performed using only the crystal oscillator circuit, large capacitance switching is required, resulting in increased current consumption of the oscillation circuit, introduction of switching noise, and other instability in the circuit. Furthermore, if frequency correction is performed by logical slowing and slowing only in the branch part, the correction timing will be longer than 2 to 5 minutes, making it impossible to use a normal quartz tester when used as a watch body. By correcting both, this system achieves a more stable oscillation circuit, higher accuracy over a wide temperature range, and easier maintenance.

[Brief explanation of drawings]

Figure 1: Block diagram of a conventional high-precision electronic timepiece circuit Figure 2: Block diagram according to the present invention Figure 3: Circuit diagram showing an embodiment according to the present invention Figure 4: Figure 5 showing the characteristics of a temperature sensor 6th fork showing the output characteristics of the two-temperature information correction circuit: Figures 101, 204, 304, and 304 showing the output characteristics of the primary and secondary correction circuits of the crystal oscillator 102.2
05,505... Frequency division circuit 103.2'07... Temperature detection circuit 104.206... A-D conversion circuit 105.201.301... Temperature information correction circuit 106
...Path width modulation circuit 202.502...Memory circuit 203.303...Crystal oscillator-order secondary correction circuit 30
6.307.3097311,313°314~318
,321~324.330.331...
Flip-flop 308, 320...AND circuit 612...FAMO5 325,326-MOS transistor 327...Inverter 628...Crystal oscillator 329...Resistance or higher

Claims (1)

[Claims] In a high-precision electronic watch that includes a temperature detection circuit, an A-D converter that converts analog temperature information into digital, and a temperature information correction for correcting variations in digital information, a correction value is provided to the temperature information correction circuit. A memory circuit, a logic circuit that generates linear, quadratic, etc. coefficients for temperature based on the output data of the temperature information correction circuit, an oscillation circuit whose frequency changes according to the output data of the logic circuit, and another of the logic circuits. A temperature-compensated electronic timepiece characterized by comprising a frequency dividing circuit that performs logical adjustment according to data.