JPS613244A - Data comparison system - Google Patents

Abstract

PURPOSE:To compare input data with a reference value of an optional numer or length simultaneously by looking up a table repeatedly on the basis of code numbers and state numbers. CONSTITUTION:The indication of the execution start of retrieving operation is sent to a decision circuit 11 and then the starting one byte of data read out of a file is applied to an input terminal 4. This data is set to the low-order 8 bits of a memory address register 7 and an address decoder 8 selects 9-bit information stored in the corresponding address of a random access memory 9. The low- order 8 bits of information stored in a memory data register 10 are stored in the high-order 8 bits of the address register 7 and the decision circuit 11 decides whether the high-order 1 bit is on or not. The 2nd byte of the data is processed similarly and the output of the decision circuit 11 corresponding to the one tail byte is the final comparison result.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field to which the invention pertains) The present invention is a method for determining whether a data value is within a predetermined reference value when the data size relationship is determined by the bit code size relationship. This relates to a data comparison method.

(Prior Art) In the field of data processing systems, it is often necessary to select only data whose values are within a range of reference values specified as search conditions from among a large amount of data stored in a file. Become. Generally, data is transferred from a file to the computer's main memory in 1 byte (8 bits).
Since the data value and reference value are transferred serially,
If it is possible to compare byte by byte, it is theoretically possible to complete selection at the same time as data transfer.

Figure 1 is an explanatory diagram of a conventional method for realizing such a data comparison function, in which 1 is a register that stores a reference value in advance, 2 is a 1-byte wide comparison calculator, and 3 is a search condition. 4 is a data input terminal, and 5 is a judgment result output terminal.

The operation will be explained below.

First, prior to execution of a search operation, a reference value is stored in register 1, and control information for determining whether the search conditions are true or false with respect to the combination of outputs of comparator 2 is stored in determination circuit 3. put.

For example, '31' displayed in register 1 in FIG.

'30', '30', '30', etc. are reference values stored for sequentially comparing each byte of input data starting from the first byte.

After instructing the comparator 2 and the determination circuit 3 to start executing the search operation, the first byte of the data read from the file is added to the input terminal 4.

Comparison unit 2 takes out the first byte of the register,
Compare with 1 byte added to input terminal 4. Next, when the second byte of data is added to the input terminal 4, the comparator 2
Now compare it with the second byte of the register. When this operation is repeated until the last 1 byte of data, the comparator 2
outputs the magnitude relationship between the data and the reference value to the determination circuit 3, and the determination circuit 3 determines whether the search condition is true or false based on the output of each comparator.

The search conditions used at this time are, for example, X=10000RX≧2500 AND X≦3500
It is given as follows: 0RX=5000 (x: input data). Here, each digit of the four-digit number indicates a search condition number corresponding to the fourth 14 bytes from the first byte.

The conventional method described above has the following two drawbacks.

- It is necessary to prepare as many registers and comparators as there are reference values, and if a comparison using a large number of reference values is attempted, the scale of the circuit becomes large.

■ The conditions for comparison with the standard value are equal sign (=), inequality sign (>,
The logic of the determination circuit must be dynamically set according to either < ) or inequality with equal bands (≧, ≦), which makes control complicated.

(Objective of the Invention) In order to solve these drawbacks, the present invention realizes the comparison by repeatedly indexing a table using the state number and code number, instead of comparing the reference value and input data with a comparison calculator. The object of the present invention is to provide a data comparison method that can compare any number of reference values and data values with a simple and small-scale circuit configuration. One drawing will be explained in detail below.

(Structure and operation of the invention) FIG. 2 is an explanatory diagram of an embodiment showing the structure of a circuit for realizing a data comparison function according to the method of the present invention, in which 4 is a data input terminal, 5 is a judgment result output terminal, 6 is an input data latch, 7 is a memory address register, 8 is an address decoder, 9 is a random access memory, 10 is a memory data register, and 11 is a determination circuit.

FIG. 3 is a diagram showing the structure of the table stored in the random access memory 9 shown in FIG. 2, where 13 is the upper 8 bits of the table address, 14 is the lower 8 bits of the table address, and 12 is the table address. top 8
This is 9-bit length information stored in the table address represented by bit 13 and lower 8 bits 14. Note that the table address and the bit length of the information can be freely changed depending on the length and number of reference values.

Hereinafter, a method for realizing the comparison function will be explained using FIG. 2, and then the structure of the table in FIG. 3 will be explained.

First, before executing the search operation, a table as shown in FIG. 3 is stored in the random access memory 9, and the upper 8 bits of the memory address register 7 are set to
X is a hexadecimal number).

After instructing the determination circuit 11 to start executing the search operation, the first byte of the data read from the file is sent to the input terminal 4.
Add to. The data applied to the input terminal 4 is set to the lower 8 bits of the memory address register 7 via the input data latch 6, and the 9-bit information I2 stored at the corresponding address is selected from the random access memory 9 by the address decoder 8. and memory data register 10
is stored in Of the information stored in the memory data register 10, the lower 8 bits 1 to 1 are stored in the upper 8 bits of the address register 7, and a determination circuit 11 determines whether the upper 1 bit is on.

The second and subsequent bytes of data are processed in exactly the same manner as described above, and the output of the determination circuit 11 for the last byte of data becomes the final comparison result.

Next, the structure of the table will be explained. Of the 9-bit information 12 stored in the table, the upper 1 bit indicates the truth or falsity of the search condition at the time the information was selected during the execution of the comparison process, and the lower 8 bits excluding this bit
The bits display the upper 8 bits of the address on the table of information to be selected next.

In order to represent two special states, the table contains constant information f and t, regardless of the reference value for comparison.
For example, the states expressed by the state numbers 'oo' and FF' in FIG. State number ``'009'' is a state in which it is determined that the input data value is not within the standard value range, and all information whose upper 8 bits of the table address are stored in 'oo' is stored in the table address. Regardless of the value of the lower 8 bits, the bit pattern is the same 'ooo'.The state number 'FF' indicates the state where it is determined that the input data value is within the standard value range. All information stored in the upper 8 bits of the table address 'FF' has the same bit pattern 'IFF' regardless of the value of the lower 8 bits of the table address. Once the information corresponding to these two special states is selected from the table, the information whose upper address is stored in the same location will continue to be selected.
The value of the upper 1 bit remains constant.

Therefore, the operation of the 1 judgment circuit 11 judges only the top 1 bit of the unconditionally selected information, regardless of whether it is determined during the search whether the input data is within the reference value range or not. Therefore, the logic of the determination circuit 11 becomes simple. Furthermore, when creating a table,
If it is determined midway through the input data whether or not it is within the reference value range, the state number should be changed to 'FF' or 'oo'.

There is also the advantage that there is no need to consider subsequent state transitions, and the size of the table can be reduced.

Figure 4 is a flowchart showing the table creation algorithm, which is divided into two parts, Figure 4 (A) and Figure 4 (B), due to space constraints. , X indicates the lower 8 bits of the address, y indicates the upper 8 bits of the address, t□ indicates the value of the upper 1 bit of the table, and t2 indicates the value of the lower 1 bit of the table. The table shown in Fig. 3 can be created using a relatively simple algorithm as shown in Fig. 4 according to pre-given reference values, and the table's physical capacity Any number of reference values with any length can be handled within the range of .

(Effects) As explained above, the present invention does not compare the reference value and input data using a comparator, but instead realizes the comparison by repeatedly indexing a table using code numbers and status numbers. Therefore, within the capacity of the table, comparisons can be made against any number of reference values having any length at the same time, and the circuit configuration for this purpose is also advantageously simple. In addition, if it is determined whether the input data is within the reference value range during the comparison operation, the comparison condition including the inequality sign is changed to a special state corresponding to each state to keep the table index result constant. Therefore, it is possible to reduce the table size and simplify the determination circuit. Furthermore, the number and length of reference values that can be handled can be increased simply by increasing the capacity of the table and the bit width of the register, which has the advantage of being highly extensible and flexible.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of a conventional method for realizing a data comparison function, FIG. 2 is an explanatory diagram of an embodiment showing the configuration of a circuit for realizing a data comparison function according to the method of the present invention, and FIG. FIG. 4 is a flowchart showing the table creation algorithm. 1. Register, 2. Comparison calculator, 3...
Judgment circuit, 4...Input terminal, 5...Output terminal, 6...Input data latch, 7...Memory address register, 8...Address decoder, 9
... Random access memory, 10... Memory data register, 11... Judgment circuit, 12... 9-bit information stored in table, 13... Upper 8 bits of table address I~, 14...・Lower 8 bits of table address・Figure 1Figure 2ρ 4-X

Claims (1)

[Claims] Fixed-length code number and state number are used as entry numbers 2
Equipped with a random access memory for storing a dimensional state transition table and a mechanism for writing and reading data into the memory, first, a code is generated for an entry whose entry number is the state number (f) in the state transition table. Regardless of the number, the state number of the transition destination is f, and information that makes the comparison judgment result false is written, and for entries whose entry number is another state number (t), the transition destination regardless of the code number. Let the state number of t be
Write information that makes the comparison judgment result true, then write information indicating the state number of the transition destination and the comparison judgment result in the state transition table based on the multiple reference values that should be set, and then write the information that indicates the judgment result of the comparison. Each time data is input, the data is broken down into a series of fixed-length code numbers, and the table is indexed by the code number and state number repeatedly.
A data comparison method characterized by determining whether the value of input data is within a range of a plurality of preset reference values based on the index result of a table using the last code number in a series. .