JPS6130796B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to image data compression, and more particularly to digital data compression.

An image signal obtained by raster scanning an original such as a document image usually has a large capacity, but its width includes a considerable amount of redundant information (for example, a ground color portion of the original without an image). Therefore, if such a read image signal were to be stored as is, it would occupy a large area on the memory. Furthermore, if the data is to be transmitted within a predetermined time, a wide bandwidth is required.

In the past, various so-called data compression and decompression techniques have been devised in order to remove or reproduce such redundant information, but these techniques do not transmit or store the entire document as one unit. It is based on that. For example, data compressed using the run-length method is coded line by line, so if you want to extract a specific part of a document, you need to expand the data once and then reproduce the original image. be.

On the other hand, the data read using the raster scan method is (1) divided into multiple sections in the main scanning direction, and (2) if there is a signal for each section, the image signal and the position of the section are indicated. A data compression method has also been proposed in which the block number is transmitted (see Japanese Patent Application Laid-Open No. 1415-1983).

However, in this method, a block number indicating the position must be added to each section of the signal, so the signal of the block number to be added increases in proportion to the increase in the image signal. The disadvantage is that a large compression ratio cannot be obtained.

The present invention reduces the area occupied by the image data and additional data for compression when storing digitized image data on a magnetic disk, IC memory, etc. In addition, when transmitting digitized image data, the required bandwidth is reduced so that a specific area within one image data is not compressed. It is an object of the present invention to provide a method for compressing image data so that it can be easily extracted while remaining in the same state.

The principle of the present invention will be explained with reference to FIG. In FIG. 1, numeral 1 indicates a state in which an original image is scanned and decomposed into pixels. 2, 3, 4, and 5 indicate compressed data, and with these data 2, 3, 4, and 5, the original image can be reproduced as described later. 2 is called a line gate signal and indicates whether or not there is information (hereinafter referred to as "1") in the N-bit pixels constituting one scanning line. 3 is called a block gate signal and indicates whether or not there is a "1" among the N×m bit pixels constituting m scanning lines. 4 is called a block signal, which divides the original image into N/n×M/m blocks each consisting of n×m bit pixels, and indicates whether or not there is a “1” in each block. Each signal 2-4 is represented by "1" or "0".

5 is called a data signal, and line gate signals 2,
The data is collected by sequentially extracting in the main scanning direction (N direction) the continuous n-bit pixels on the same scanning line at the position where the block gate signal 3 and the block signal 4 are all "1". show.
When block gate signal 3 is "0", m bits of line gate signal 2 and N/n bits of block signal 4 corresponding to that position are deleted.

The data signal of the original image 1 obtained as described above is as shown by reference numeral 5. FIG. 2 shows the state of data compression. That is, original image 1 in FIG.
The read image signal of N×M bits is compressed into the information within the bold line frame in FIG.

Using the data compressed as described above,
To reproduce the original image, first refer to the first bit of block gate signal 3, and if it is "0", N
All xm bit pixels are set to "0" and the second bit of the block gate signal 3 is referred to.

If the second bit of the block gate signal 3 is "1", the first bit of the corresponding line gate signal 2 is referred to, and if it is "0", the first bit is
N-bit pixels corresponding to the line are set to "0" and the second bit of the line gate signal 2 is referred to. If this is "1", the first bit of the block signal 4 is referred to, and if it is "0", the n-bit pixel is set to "0". If the first bit of the block signal is "1", the first n bits of the data signal 5 are extracted and used as data. Next, refer to the second bit of block signal 4 and repeat the above operation.

When the N/n bits of the block signal 4 have been referenced, the second bit of the line gate signal 2 is referenced, and if it is "0", the N bits for that one line are set to "0". If it is "1", the first bit of block signal 4 is referred to and the above operation is repeated. As is clear, the bits of block signal 4 referred to at this time are the same bits for line gate signal 2 until m bits have been referred to.

After referring to m bits of line gate signal 2, the next bit of block gate 3 is referred to. If it is "0", the N×m bit is set to "0". If it is 1, refer to the (m+1)th bit of line gate signal 2, and if it is “0”, it is 1.
The N bits for the line are set to "0", and if it is "1", the (N/n+1)th bit of the block signal 4 is referred to. If this bit is "0", n bits are set to "0", and if this bit is "1", the Pth n bit of the data signal is set to data.

Thereafter, the above-mentioned operation is repeated, and the M/mth bit of the block gate signal 3 is referred to. When the operation is completed, the original image is completely reproduced.

An example of a data compression device according to the present invention is shown in FIG. In the figure, numeral 11 denotes a serial-parallel converter, which converts serial data input for each scan into an n-bit parallel signal. 12 is a shift register having a capacity of N×m bits, and the data inputted first is outputted first. 15 indicates a black detector;
It consists of an OR circuit with n-bit inputs. is line gate detection circuit, is block signal detection circuit,
indicates a block gate signal detection circuit. In the figure, C1 to C11 are clock signals, and G1 to G4 are gate signals.

The line gate detection circuit includes an OR16, a flip-flop 17, an m-bit shift register 18,
It is composed of AND22. The output of the black detector 15 passes through the OR 16 and is stored in the FF 17. When the output of the black detector 15 is data for the first n bits of one scan, the output of the FF 17 is AND22.
G1 input. Therefore FF17
new data is stored every scan. For the subsequent output of the black detector 5, FF
17 output and OR16 are performed, and the result is stored in FF17. After performing the above operations for one scan of N bits, the output of the FF 17 is stored in the shift register 18.

The block signal detection circuit is OR23, N/n
It consists of bit shift registers 24 and 26, a switch 25, and an AND 29. The output of the black detector 15 passes through the OR 23 and is stored in the shift register 24. As mentioned above, when the output of the black detector 15 is the first one scan (N bits), AND29
The output of the shift register 24 is blocked by the G2 input. Therefore, the shift register 24 has m
New data is stored with each scan. After black detection is performed for all bits included in the m scan, they are sequentially transferred to the shift register 26 through the SW 25.
The SW 25 passes the output of the shift register 24 to the shift register 26 during one scan. During the subsequent (m-1) scans, the SW 25 passes the output of the shift register 24 to the shift register 26. Therefore, the data in the shift register 26 is (m-1)
It will be rotated several times.

Block gate signal detection circuit is OR30,FF
It is composed of 31, 32 and AND34. The output of the shift register 24 is input to the block gate signal and detection circuit. When the first n-bit black detection data of the m-th scan is output from the shift register 24, it is stored in the FF 31 through the OR 30. At this time, the output of FF31 is blocked by input G4 of AND34. When the last n-bit black detection data of the m-th scan is stored in the FF 31 and output, the data is stored in the FF 32.

At the time when data is output from the block gate signal detection circuit, the first n-bit image signal of the first scan of original image data is output from the shift register 12, the first line gate signal 2 is output from the shift register 18, The first block signal 4 is output from the shift register 24 through the SW 25. Each of the line gate signal and block signal is ANDed with the block gate signal in AND20 and 27, respectively, and if block gate signal 3 is "1", each signal 2 and 4 is stored in memories 21 and 28, respectively. be done. On the other hand, the block gate signal is stored in the memory 33 as it is. Further, the n-bit original image data is stored in the memory 14 via the AND 13 when all of the line gate signal 2, block gate signal 3, and block signal 4 are "1".

Data compression is achieved by repeating the above-described operations for all N×M bit image data. After the compressed data has been processed for all images, it is read out from the memory 14, 21, 28, 33 and sent to another storage device or a receiving end.

FIG. 4 shows an example of an apparatus for decompressing data compressed as described above.

The block gate signal 3 is stored in the memory 42, the line gate signal 2 is stored in the memory 45, the block signal 4 is stored in the memory 48, and the compressed data signal 5 is stored in the memory 51 before data decompression processing is performed. It is assumed that there is Here, the memories 42, 45, 48 and 51 are the memories 14, 2 used in the data compression device described above, respectively.
It may be the same as 1, 28, and 33, or it may be another one.

At the timing determined by the output pulse of the circuit 41 that divides the clock C1 by 1/Nm, the memory 4
The first bit of 2 is read. If this signal is "0", ANDs 44, 46, 47, and 50 are closed and no addressing is performed, so no data is read from memories 45, 48, and 51. Therefore, Nm bits of "0" are input to the parallel-serial converter 53 by the AND 52, and this is output as an expanded signal.

If the block gate signal read from the memory 42 is "1", the first bit of the memory 45 is read at a timing determined by the 1/N frequency divider 43 output. If this signal (line gate signal) is “0”, AND46, 47, 5
Since 0 is closed, no data is read from memories 48 and 51, and N-bit "0" is input to parallel-serial converter 53. If the line gate signal read from the memory 45 is "1", the block signal at address Y=0, X=0 is read from the memory 48. If this signal is “0”, memory 5
No data is read from 1, and n-bit “0”
is input to the parallel-to-serial converter 53. If this block signal is "1", the data signal is read out from the memory 51 and input to the parallel to serial converter 53.

Next, the block signal at address Y=0, X=1 is read out from the memory 48, and the above-described operation is repeated. Y
=0, processing is performed. When the mth bit is read out from the memory 45 and similar processing is completed, the second bit of the block gate signal 3 is read out from the memory 42. If the read bit of the block gate signal 3 is "1", the (n+1)th bit of the line gate signal 2 is read from the memory 45. If it is "1", the bit at address Y=1, X=0 is read out from the memory 48, and the same processing as described above is performed. In this way, the original image is reproduced by repeatedly performing the above-described processing on the M/m bit data read from the memory 42.

As is clear from the above description, according to the present invention, when digitized image data is stored in a magnetic disk, IC memory, etc., the area occupied by the image data and additional data for compression can be reduced, and , it is possible to obtain a sufficiently large compression ratio by preventing the additional data from increasing even if the image data increases, and furthermore, because it has a block gate signal, If there is no signal at all (bit),
This makes it possible to determine this easily and quickly.
Playback speed can be improved.

[Brief explanation of the drawing]

1 and 2 are diagrams showing the principle of the present invention,
FIG. 3 shows an embodiment of the present invention, and FIG. 4 shows a block diagram of an apparatus for decompressing data compressed by the present invention. 1...Original image, 2...Line gate signal, 3...
...Block gate signal, 4...Block signal, 5
...Data signal.

Claims (1)

[Claims] 1 A compression method for serial pixel format data obtained by raster scanning with M scanning lines each consisting of N pixels, and that there is one or more pixels indicating information among the N pixels included in one scanning line. line gate signal shown and m× included in m adjacent scanning lines
A block gate signal indicating that there is one or more pixels indicating information among N pixels, and each m× obtained by dividing m×N pixels in the adjacent m scanning lines by N/n in the scanning line direction. 1 pixel showing information in n pixels
The data of consecutive n pixels on the same scanning line in the part where the block gate signal, line gate signal, and block signal are all detected is detected.
A data compression method that extracts one unit and skips the others.