JPS61292191A - Cursor pattern generator - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a cursor/9 turn generation device for generating mother turn data when displaying a cursor on a character display gray or a graphic display. .

[Technical background of the invention]

In recent years, image display systems have been developed that display characters and figures on a color display in accordance with data transmitted over a telephone line, for example.

Such image display systems are generally equipped with a cursor display function for displaying the display position of characters or geometric figures using a cursor.

The shape of the cursor used in the cursor display above (
There are four types of cursor styles (hereinafter referred to as cursor styles) as shown in FIGS. 6 to 9, for example. These cursor styles are called underscore (Figure 6), block (Figure 7), crosshair (Figure 8), and custom (Figure 9), respectively.

Conventionally, 79 turn data for displaying such a cursor is generated by software of a microprocessor.

[Problems with background technology]

However, in the case of a configuration in which the cursor's arm turn data is generated by the software of the microno processor, there is a problem in that the cursor styles that can be displayed are limited.

This will be explained below. That is, in the image display system as described above, it is generally possible to change the size of the area for displaying individual characters (hereinafter referred to as character size). Typical examples of this character size are shown in FIGS. 10 to 15. Here, for example, the example shown in FIG. 12 is called a small-sized character S-e 8SZ, and the width in the horizontal direction is 8 dots and the width in the vertical direction is 12 dots. Note that one dot corresponds to one logical pixel.

Here, the size of the cursor display area (hereinafter referred to as cursor size) and the character size must match. Therefore, if the font size changes, the cursor size must also change accordingly.

From the above explanation, the micro processor is the cursor's
When generating turn data, in addition to the process of changing the turn data according to various cursor styles, it is also necessary to perform the process of changing the pattern data according to the character size.As a result, This places a heavy burden on the microprocessor and makes it impossible to use certain cursor styles.

In addition, in the above-mentioned image display system, in addition to generating the cursor /l turn data, the cursor is also displayed using micro! Processing is done by Rosetsu software. For example, when displaying a cursor in a flashing manner, the microprocessor alternately displays character data and 4-turn data of the cursor at an address on the image memory where character data for which the cursor should be displayed is stored. I have to do a process to replace it.

In this way, since the display of the cursor is also processed by the software of the microprocessor, the generation of parable turn data by software is considerably restricted from this point of view as well.

[Purpose of the invention]

The present invention has been made to address the above-mentioned circumstances, and its purpose is to provide a cursor 4-turn generator that can be easily converted into a 1-domain device, thereby making it possible to display a variety of cursor styles. It is in.

[Summary of the invention]

According to the present invention, cursor pattern data that is partially output within a scanning period in the horizontal and vertical directions of a character display area is obtained by using a carry signal output operation of a resettable counter means. It is.

That is, the carry signal is repeatedly output from the counter in accordance with the image scanning of divided areas set on the character display area so as to equally divide the character size in the horizontal and vertical directions.

An initial value set according to the character size is repeatedly set in the counter, and the cursor main turn data is obtained from the carry signal.

[Embodiments of the invention]

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a circuit diagram showing the configuration of one embodiment.

Before going into the explanation of Fig. 1, let's use the previous Figs. An outline of the generation of turn data will be explained.

The cursor's I-plane data is in the horizontal direction.

It can be obtained by creating pattern data corresponding to the cursor style in each vertical direction Y and combining these data. That is, in order to obtain /f turn data for the underscore, as shown in FIG. 6, for the horizontal component, the image scanning period in the horizontal direction No 4 Lus width 79
Create turn data H1, and for the vertical component, set the area R
For example, it is sufficient to create /f turn data (1) with a /base pulse width corresponding to the image scanning period in the vertical direction Y for one dot, and to complete the logical product of these.

To obtain the arm turn data of the block, as shown in FIG.
' and then take the AND of these.

To obtain the crosshair pattern data, as shown in FIG. 8, for each direction
Turn data H snow.

All you have to do is create vs and take the logical OR of these.

To obtain the custom No. 4 turn data, as shown in Figure 9, the No. 9 turn data Hs, which is the same as in the case of cross hair.
+Vs' and logical product of these.

In FIG. 1, the Q output XQ of the first R8 frizzo and flop circuit 11 is used as the z4 turn data H1 in the horizontal direction X, and the first The carry signal PX of the derissetter puller counter 20 is used. Further, as the vertical direction Y turn data v3, the Q output YQ of the second 88 Frino Frozzo circuit 26 is used, and as the vertical direction turn data V1sVS, the carry signal PY of the second presettable counter 27 is used. used.

The above-mentioned 4-turn data in each direction X and Y is the first. After being selectively selected according to the cursor style in the second selection circuit 24, 30, the synthesis circuit 35 performs logical synthesis according to the cursor style to obtain the final 74/turn data PD.

If so, please return to Figure 1 and refer to the timing charts in Figures 2 and 3 for the detailed configuration! I will clarify. Note that %#I2 and FIG. 3 show timing charts when the character size is the small character size SSz shown in FIG. 12 above.

In FIG. 1, latch circuits 11 and 13 are, respectively,
Data MK, &ff'6 indicating the horizontal and vertical coordinates of the cursor display position M are held. Here, the cursor display position M is set at the upper left end of the cursor display area R, as shown in FIG. 6 mentioned above.

The latch circuits 14 and 18 each contain data D1 . D2 is latched.

Note that the data to be latched in these latch circuits 12 to 15 is transferred from the micro processor 11 to the data path DBt-
The signal is applied to each latch circuit 12-15 via the signal.

The latch data of the latch circuit 12 is given to a comparison circuit 16 and compared with data CX indicating the horizontal coordinate of the image scanning position. The comparison circuit 16 outputs a match signal XAG (see FIG. 2) -10- when both coordinates match.

The above-mentioned -U no.

As a result, the Q output XQ of this R8 frizzo-frozzo circuit 17 rises as shown in FIG.

The timing T8 of this rising edge 9 coincides with the scanning start timing in the horizontal direction X of the character display area.

□, coincidence/9rus
r-) using Q, and R only during the scanning period of the character display area.
It is designed to be given to SS Fritznoflorahu Road 17.

R8 flip flop! The Q output XQ of the circuit 17 is passed through the exclusive shift OR circuit 19t to the load pulse XLD.
(see FIG. 2) is applied to the first glissetter pull counter 20. At the timing of the rise of this 0-to-no pulse LDP, a predetermined initial value Pl ((see FIG. 2) is loaded from the initial value generation circuit 21 to the counter 20, and after this, the counter 20 is loaded into the first clock generation circuit. 22
The first clock XCK (see FIG. 2) from 1 is counted. The count output Ql is shown in FIG.

This clock XCK of N1 is a display clock CP indicating the scanning timing of each dot in the horizontal direction X.

The counter 20 outputs the first carry signal PX (see FIG. 2) at the scanning timing of the fourth dot counted from the horizontal scanning start point of the character display area. Then, at the timing of the fall of this carry output PX,
The above initial value PH is again! It is reset and starts counting the first clock XCK. As a result, the second carry signal PX is output at the scanning timing of the 8th dot counted from the scanning start point in the horizontal direction X. In other words, like now, the size in the horizontal direction
For the small dot character size, e ssz, the counter 20 divides the size in the horizontal direction X into two by 4 dots each, so that the counter 20 divides the character display area into two divided areas set in the area in the horizontal direction X of the character display area. A carry signal PX is generated in accordance with the scanning timing.

The number of stages of the counter 20 is basically set to one half of the maximum character size in the horizontal direction X.

In other words, the font size handled by the circuit in Figure 1 is
Assuming that the characters are as shown in FIGS. 0 to 15, the counter 20 is set to hexadecimal even though the half size of the maximum character size in the horizontal direction X is 16 dots. Therefore, when the character size is small character size 882, the initial value PH is set to "09H)' to satisfy the output condition of the carry signal px. In addition, for example, when the character size is double size rDBs, , the initial value PH is set to ``00 (H Bi).

The relationship between character size and initial value PR is as shown in the following table. In addition, optical high-density quadruple terminals, standard terminals and PVK
This will be explained later.

Note that the initial value generation circuit 21 generates the initial value PI(
'l Output.

The number of times the carry signal PX is output from the counter 20 is counted by a first under counter 23.

In this case, the counter 23 counts the number of outputs with a delay of one cycle of the clock XCK from the output timing of the carry signal PX.The first stage output QAJ and second stage output QAj of the counter 23 are shown in FIG. Shown below. Due to the above operation of the counter 23, the timing at which scanning in the horizontal direction X in the one character display area ends is detected as the rising timing of the second stage output QBJ of the counter 23. Therefore, by resetting the R8 fritsuno flop circuit 11t with this second stage output QBJ, 9
．． Q output XQ of R8 flip-flop circuit 17 (second
(see figure) can be made to match the armpit 7 data H1 shown in FIG. 6 and the like.

R8 fritsuno flop direction path 11 obtained in this way
The Q output XQ of the counter 20 and the carry signal PX of the counter 20 are given to the first selection circuit 24 as input data. The selection circuit 24 is supplied with the output of the latch circuit 15 holding the cursor style data D2f as control data.

In such a configuration, the selection circuit 24 selects the Q output XQ t- when the cursor style is underscore or block, and selects the first carry signal px when the cursor style is crosshair or custom. . In this case, the selection circuit 24 outputs the carry signal PX with a delay of one period of the clock XCK. As a result, the 9th turn data i+2 is displayed as an image at the 5th dot.

The amount turn data Hl, H in the horizontal direction X.

Although the generation of /f amount turn data la vl a vl in the vertical direction Y is generated in almost the same way.

That is, when the data group indicating the vertical coordinate of the image scanning position matches the data CY indicating the vertical coordinate of the cursor display position M, the second comparison circuit 25 determines that there is a match a4rus YAG.
(see Figure 3) and outputs the second RS frigflo!
The circuit 26 is set.

At the rising timing of the Q output YQ (see FIG. 3) of the RSS free lag terminal 26, the initial value Pv (see FIG. 3) is reset to the second glissetter register 21. Thereafter, the counter 21 receives the second clock YCK output from the second clock generation circuit 28.
'i is counted, and the count output QV (see Fig. 3) is counted up by 1. Here, the second clock YCK is horizontal drive/#rus HD.

Since the number of dots in the horizontal direction X of the small-sized character essz, which is currently being focused on, is 12, the first carry output PY (see FIG. 3) is generated at the scan timing of the 16th dot of the counter 2FV. As a result, the load /f of the counter 21 output from the exclusive OR circuit 29
As shown in FIG. 3, the counter 27 is reset to the 177th period value 2v at the timing of the first fall of the carry signal PY.

i+turn data vs. crosshair and custom
Similar to the processing in the horizontal direction
is obtained with a delay of one period. However, if the 4-turn data v1 for an underscore is obtained through the same process, this 4-turn data v1 will be out of the character display area.

Therefore, the first carry signal PY is sent to the delay circuit 31.
It is delayed by two periods of the clock YCK, and this delayed output is sent to the D flip-flop! which forms the counter 21. By supplying the reset manual power PR (see FIG. 3) to the circuit 211, the count output QV (see FIG. 3) of the counter 21 is forcibly reset by one power count. As a result, the second carry signal PY (see Figure 3) is 1
It is output at the scanning timing of the first dot. Then, in the selection circuit 30, similarly to the first carry signal PY, this signal is delayed by one period of the clock YCK to obtain the desired gloss pattern that is output at the scanning timing of the 12th dot. Data Vs t- can be obtained.

The second Hatsu! counts the number of times the carry signal PY is output. Kakunta 33 is the up counter 2 in the horizontal direction
3, the carry signal PY is counted in one cycle of the clock YCK, and the second stage output QBJ (see FIG. 3) is used as the R8 flip-flop! Reset circuit 26. However, in this case, since the second carry signal PYH is phase advanced by one period of the clock YCK17) as described above, the second stage output QB2 of the counter 33 is D-Fri-no-Flo! In the circuit 34, the R8 flip-flop is delayed by one cycle of the clock YCK! is applied to circuit 26. As a result, the Q output YQ of the R8 frig frozzo circuit 26 is the scan end time i in the vertical direction Y of the character display area.
The target gloss turn data v3 is obtained.

The selection circuit 30 uses the output of the latch circuit 15 as control data, and selects the second carry signal PY in the case of an underscore, and selects the second carry signal PY in the case of a block. The Q output YQ't- of the circuit 26 is selected, and in other cases, the first carry signal PY is selected.

The pattern data output from the selection circuit 24.30 is
A logical sum and a logical product are performed in the synthesis circuit 35. Then, this synthesis circuit 35 selects only the AND output in cases other than the cross direction, and in the case of the cross direction, synthesizes the current outputs of both wheels to obtain gloss turn data PD.

Incidentally, in image display systems, systems that handle an amount of information four times as much as the conventional image information amount have been developed in recent years. Here, in the above system, if the receiving terminal that handles the conventional amount of information is the standard terminal, and the receiving terminal that handles four times the amount of information is the high-density quadruple terminal, then the latter is allowed to receive data for the standard terminal. It is being

When receiving standard terminal data on a high-density quadruple terminal, the character size ff must be doubled in each direction x and y, and the cursor size must also be doubled in each direction accordingly. A fish.

The circuit shown in FIG. 1 has a configuration in which the cursor size is doubled in each direction X and Y when standard terminal data is received in a high-density quadruple terminal.

That is, the above-mentioned 1. Second clock generation circuit 22
, 211, when receiving high-density quadruple terminal data, the display clock CP for high-density quadruple terminal data reception and the horizontal drive delta pulse book are set to the first.., 211, respectively. Second clock XCK
, output as YCK. On the other hand, when receiving data for a standard terminal, the high-density quadruple terminal data reception clock CP and the horizontal drive/JI reference clock are each divided by two and used as the first and second clocks XCK and YCK. Output.

As a result, when receiving data for a standard terminal, the cursor size is expanded twice in each direction, X and Y.

In addition, the above-mentioned 1. Second clock generation time 97522
．． 211 is controlled by the outputs of the two reception modes 'f: data for identification 5Ht-holding latch circuit M and 9g. In addition, each clock generation circuit 22.
In order to prevent the synchronization from being disrupted due to the switching of the output frequency of the p.c. 211, the switching operation of the four frequency numbers of the p-tock generating circuits 22 and 28 is controlled by the coincidence/reference pulses XAG and YAG output from the comparator circuits 16 and 25. ing. This synchronization process is shown in FIGS. 4 and 5.

As described in detail above, in the embodiment, the 74 turn data H2, v, 1v3 of X% in the horizontal direction and V in the vertical direction are obtained by using the carry signal output operation of the counters 110 and 2fl.

On the other hand, in order to obtain the pattern data a, , v, sum, other configurations may be considered in which the count output of the counter is used. However, with this configuration, there is a problem that the counter becomes larger as the character size increases.

Such problems hardly occur in this embodiment. This is because the number of stages of the counter in this embodiment is only half the maximum character size.

Therefore, the cursor 74 in this embodiment? The turn generator can be easily made into hardware, and it is possible to eliminate the problem of restrictions on the cursor style used.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to provide a cursor/turn generating device that can be easily implemented in hardware.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing the configuration of an embodiment of the present invention, and FIG.
Figures 6 to 5 are tying charts for explaining the operation of Figure 1, Figures 6 to 9 are diagrams showing cursor styles, and Figures 10 to 15 are diagrams showing character sizes. . 11...Microprocessor, 12-15.36...
・Latch circuit, 16.25...Comparison circuit, 17°34
...RS fritsunofrog circuit, zo, 23°xv,
ss...Counter, 21...Initial value generation circuit, 22
．． 28...Clock generation circuit %24.30...Selection circuit, 34...D fritsunofrotsu! Circuit, 35...
Synthetic circuit. Applicant's agent Patent attorney Takehiko Suzue> 111-1 "-111ta NSZ MSZ Figure 10 Figure 11 Cause DBHDBA/sZ Figure 12 BS Figure 13 Figure 14 all Figure 15m

Claims (1)

[Scope of Claims] First and second comparing means for comparing the coordinates of the cursor display position and the coordinates of the image scanning position and detecting coincidence of the two coordinates in each of the horizontal and vertical directions; Presettable first and second counter means start counting clocks of a predetermined frequency in each horizontal and vertical direction according to each coincidence detection output of the second comparison means; According to the character size, the carry signal is repeatedly obtained from the first and second counter means in accordance with the image scanning of the divided area set on the character display area so that the character size is divided into equal parts. first and second counter means for setting preset initial values in the first and second counter means for each of the horizontal and vertical directions in accordance with the image scanning of the divided area;
counter control means; third and fourth counter means for counting carry signals outputted from the first and second counter means, respectively, in the horizontal and vertical directions; A pulse signal having a pulse width corresponding to the image scanning period of the character display area is generated in each horizontal and vertical direction according to the coincidence detection outputs of the comparison means and the count outputs of the third and fourth counter means. carry signals outputted from the first and second counter means and the first and second pulse signals in the horizontal and vertical directions;
The pulse signal output from the pulse signal generating means of
The first and second are selectively selected according to the font size, respectively.
A cursor pattern generation device comprising: a selection means; and a synthesis means for synthesizing selection outputs in each direction of the first and second selection means according to a cursor style and outputting cursor pattern data.