JPS61291489A - Method of heteroepitaxial crystal growth of semiconductor - Google Patents

Method of heteroepitaxial crystal growth of semiconductor

Info

Publication number
JPS61291489A
JPS61291489A JP13126185A JP13126185A JPS61291489A JP S61291489 A JPS61291489 A JP S61291489A JP 13126185 A JP13126185 A JP 13126185A JP 13126185 A JP13126185 A JP 13126185A JP S61291489 A JPS61291489 A JP S61291489A
Authority
JP
Japan
Prior art keywords
single crystal
semiconductor layer
growth
layer
crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13126185A
Other languages
Japanese (ja)
Inventor
Yukio Fukuda
幸夫 福田
Tagahiko Ohara
大原 多賀彦
Yoshiaki Kadota
門田 好晃
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP13126185A priority Critical patent/JPS61291489A/en
Publication of JPS61291489A publication Critical patent/JPS61291489A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To grow and to form a high-quality single crystal semiconductor layer on a different substrate in a short time, by growing and forming a semiconductor layer on the different substrate under conditions of growth temperature and growth speed to show binary single crystal growth mode. CONSTITUTION:A first layer single crystal semiconductor layer is grown and formed on different single crystal substrates under conditions of growth temperature and growth speed to show a binary single crystal growth mode in such a way that lattice unconformity between the different single crystal substrate and the first layer single crystal semiconductor layer is larger than critical thickness which can be relaxed by dislocation to occur newly in the first layer single crystal semiconductor layer. Then, a second layer single crystal semiconductor layer, which is of the same kind as that of the first layer single crystal semiconductor layer, is grown and formed on the first layer single crystal semiconductor layer under conditions of growth temperature and growth speed to show a binary single crystal growth mode. Mass productivity and economic efficiency can be raised by the above-mentioned crystal growth method.

Description

【発明の詳細な説明】 〔発明の技術分野〕 本発明は半導体のヘテロエピタキシャル結晶成長方法に
関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for growing semiconductor heteroepitaxial crystals.

従来、異種基板上に半導体層を形成する方法として、気
相成長法、真空蒸着法、ス・母ツタ法等が用いられてい
る。これらの方法によって異種基板上に形成された半導
体層は、基板との結晶構造や格子定数の差異に起因して
、転位に代表される電気的、光学的に活性な多数の結晶
欠陥を含んでおり、この半導体層を用いて炸裂されたデ
バイスの特性は同種基板上に形成された半導体層を用い
て炸裂された物に比べて極めて劣ったものとなってしま
う。このため、異種基板上に形成された半導体層を用い
て特性の優れた半導体デバイスを実現するためには、高
品位半導体層の形成が不可欠とされている。
Conventionally, as a method for forming a semiconductor layer on a heterogeneous substrate, a vapor phase epitaxy method, a vacuum evaporation method, a sputtering method, etc. have been used. Semiconductor layers formed on foreign substrates by these methods contain many electrically and optically active crystal defects such as dislocations due to differences in crystal structure and lattice constant from the substrate. Therefore, the characteristics of a device developed using this semiconductor layer are extremely inferior to those developed using a semiconductor layer formed on the same type of substrate. Therefore, in order to realize a semiconductor device with excellent characteristics using a semiconductor layer formed on a different type of substrate, it is essential to form a high-quality semiconductor layer.

一般に、異種基板上に形成される半導体層の結晶性は厚
さと共に改善されていくことが知られておシ、このため
十分に厚い半導体層を短時間の内に成長形成する目的で
、高い成長速度が期待できる高温度下での異種基板上へ
の半導体層の形成が試みられている。しかしながら、こ
の方法によると半導体層が三次元的な結晶成長様式を呈
し、得られた半導体層は表面の平滑度が極めて悪く、デ
バイス形成に不適なものとなってしまう。一方、二次元
的な結晶成長様式が期待できる低温度下での異種基板上
への半導体層の形成では、表面平滑度の優れ九半導体層
が容易に得られるものの、結晶欠陥の少ない十分に厚い
半導体層を形成するには長時間を要し、実用的な方法と
はなっていない。
Generally, it is known that the crystallinity of a semiconductor layer formed on a different substrate improves with the thickness. Attempts have been made to form semiconductor layers on heterogeneous substrates at high temperatures where growth rates can be expected. However, according to this method, the semiconductor layer exhibits a three-dimensional crystal growth pattern, and the resulting semiconductor layer has extremely poor surface smoothness, making it unsuitable for device formation. On the other hand, when forming a semiconductor layer on a heterogeneous substrate at low temperatures where a two-dimensional crystal growth pattern can be expected, it is easy to obtain a semiconductor layer with excellent surface smoothness, but it is difficult to obtain a sufficiently thick layer with few crystal defects. It takes a long time to form a semiconductor layer and is not a practical method.

〔発明の目的〕[Purpose of the invention]

本発明は上述した問題点を解決するためになされたもの
であり、その目的は異種基板上に高品位の単結晶半導体
層を短時間に成長形成せしめる半導体のヘテロエピタキ
シャル結晶成長方法を提供することにある。
The present invention has been made to solve the above-mentioned problems, and its purpose is to provide a semiconductor heteroepitaxial crystal growth method that allows a high-quality single-crystal semiconductor layer to be grown on a heterogeneous substrate in a short time. It is in.

〔発明の概要〕[Summary of the invention]

上記目的全達成するために本発明者等は種々実験をなし
た結果、異種基板上に二次元的単結晶成長様式を呈する
成長温度且つ成長速度の条件下で半導体層の成長形成を
行なえば成長表面の極めて平滑な半導体層が得られるこ
と、また得られた半導体層の結晶性は膜厚と共に徐々に
改善されていき、そして前記異種基板との格子不整合が
新たに発生する転位によって緩和され得る臨界的厚さの
5倍程度以上になると、結晶性の膜厚による改善効果が
飽和すること、さらに、この様にして異種基板上に得ら
れた半導体層の表面上にこれと同種の半導体層を二次元
的結晶成長様式を呈する成長温度且つ成長速度の条件下
で成長形成すれば、成長表面が極めて平滑で且つ高品位
の半導体層が短時間の内に実現できることを発見した。
In order to achieve all of the above objectives, the present inventors have conducted various experiments and found that if a semiconductor layer is grown on a different type of substrate under conditions of growth temperature and growth rate that exhibit a two-dimensional single crystal growth pattern, A semiconductor layer with an extremely smooth surface can be obtained, and the crystallinity of the obtained semiconductor layer gradually improves with increasing film thickness, and the lattice mismatch with the foreign substrate is alleviated by newly generated dislocations. When the critical thickness to be obtained is about five times or more, the improvement effect by the crystalline film thickness becomes saturated. It has been discovered that if the layer is grown under conditions of growth temperature and growth rate exhibiting a two-dimensional crystal growth pattern, a high-quality semiconductor layer with an extremely smooth growth surface can be realized in a short period of time.

この発見にもとすき、異種単結晶基板上に第一層単結晶
半導体層を二次元的単結晶成長様式を呈する成長温度且
つ成長速度の条件下で、前記異種単結晶基板との格子不
整合が新九に発生する転位により緩和され得る臨界的厚
さよりも厚く成長形成する工程と、前記第一層単結晶半
導体層の表面上に前記第一層単結晶半導体層と同糧の第
二層単結晶半導体層を二次元的単結晶成長様式を呈する
成長温度且つ成長速度の条件下で成長形成する工程とか
らなることを特徴とする半導体のヘテロエピタキシャル
結晶成長方法を提案するものである。
This discovery is based on the fact that when a first single-crystal semiconductor layer is grown on a heterogeneous single-crystal substrate at a growth temperature and growth rate that exhibits a two-dimensional single-crystal growth mode, the lattice mismatch with the heterogeneous single-crystal substrate a second layer having the same composition as the first single crystal semiconductor layer on the surface of the first single crystal semiconductor layer; The present invention proposes a method for growing a semiconductor heteroepitaxial crystal, which comprises a step of growing a single crystal semiconductor layer under growth temperature and growth rate conditions exhibiting a two-dimensional single crystal growth pattern.

〔発明の実施例〕[Embodiments of the invention]

以下に、結晶成長装置として真空蒸着装置を用いてシリ
コン基板上にダルマニウム半導体層を成長形成する場合
を例に、本発明の実施例について説明する。なお、本実
施例は一つの例示であって、本発明の精神を逸脱しない
範囲内で、他の結晶成長装置及び他の材料系の結晶成長
にも適用できることは言うまでもない。
Embodiments of the present invention will be described below, taking as an example a case where a darmanium semiconductor layer is grown and formed on a silicon substrate using a vacuum evaporation apparatus as a crystal growth apparatus. It should be noted that this embodiment is merely an illustration, and it goes without saying that the present invention can be applied to other crystal growth apparatuses and crystal growth using other materials without departing from the spirit of the present invention.

第1図は面方位[100]のシリコン基板上に形成され
たダルマニウム半導体層の断面を表わしている。1は異
種単結晶基板の一例としてのシリコン基板、2は二次元
的単結晶成長様式を呈する成長温度且つ成長速度の条件
下で成長形成した第一層単結晶半導体層の一例としての
第一層ゲルマニウム層、3は二次元的単結晶成長様式を
呈する成長温度且つ成長速度の条件下で成長形成した第
二層単結晶半導体層の一例としての第二層ゲルマニウム
層であシ、以下に述べる条件で形成した。まず、シリコ
ン基板1を洗浄した後前述した真空蒸着装置に装填する
FIG. 1 shows a cross section of a dalmanium semiconductor layer formed on a silicon substrate with a plane orientation of [100]. 1 is a silicon substrate as an example of a heterogeneous single crystal substrate; 2 is a first layer as an example of a first layer single crystal semiconductor layer grown under conditions of growth temperature and growth rate exhibiting a two-dimensional single crystal growth pattern; The germanium layer 3 is a second-layer germanium layer as an example of a second-layer single-crystal semiconductor layer grown under conditions of growth temperature and growth rate exhibiting a two-dimensional single-crystal growth mode, and under the conditions described below. It was formed with. First, the silicon substrate 1 is cleaned and then loaded into the vacuum evaporation apparatus described above.

次に、10Torr以下の高真空条件下でシリコン基板
1を800℃から900℃の温度範囲で加熱処理し、シ
リコン基板1の表面に形成されている自然酸化膜を除去
する。次に、電子ビーム蒸発源を用いてダルマニウムソ
ースヲ蒸発させて第一層ゲルマニウム層2をシリコン基
板1上に成長形成させる。この時、シリコン基板1の温
度を400℃から850℃の範囲で、ゲルマニウムの成
長速度を毎秒IXから毎秒100にの範囲で変化させて
実験を行なった。その結果、シリコン基板1の温度が5
50℃以下で成長速度が毎秒5X以下の条件であればダ
ルマニウム層2は二次元的単結晶成長様式を呈し、成長
表面の極めて平滑な単結晶ゲルマニウム層が得られた0
さらに、得られたダルマニウム層2の結晶性と膜厚との
関係2X線回折、TEM等を用いて調べた結果、ダルマ
ニウム層2の膜厚が、シリコン基板1とゲルマニウム層
2との格子不整合がダルマニウム層2内に新たに発生す
る転位により緩和され得る臨界的厚さである100OX
よりも厚くなると、ダルマニウム層2の格子定数が固有
の値である5、658Xに近すいて結晶性が次第に改善
されていき、前記臨界的厚さの5倍程度を越えると膜厚
による改善効果が飽和してしまうことが明らかとなった
。従って、異種単結晶基板上に形成する第一層単結晶半
導体層の厚さは異種単結晶基板と第一層単結晶半導体層
の格子不整合によって決定される前記臨界的厚さ以上で
あることが望ましい。次に、このようにして得られた成
長平面が極めて平滑な第一層ゲルマニウム層2の表面上
に第二層ゲルマニウム層3を成長形成させたところ成長
温度が800℃以下で成長速度が毎秒501以下の条件
であればゲルマニウム層3は二次元的単結晶成長様式を
呈し、成長表面の極めて平滑な単結晶ゲルマニウム層が
得られた。また、このようにして得られた第二層ゲルマ
ニウム層3の結晶性を評価したところ第一層ゲルマニウ
ム層2に比べて高品位となっていることが明らかとなり
た。これよシ、第二層ゲルマニウム層3は第一層ゲルマ
ニウム層2に比べて高い成長温度、高い成長速度の条件
下で成長形成させても高品位の結晶性が得られることが
明らかとなった。
Next, the silicon substrate 1 is heat-treated in a temperature range of 800° C. to 900° C. under a high vacuum condition of 10 Torr or less to remove the natural oxide film formed on the surface of the silicon substrate 1. Next, a first germanium layer 2 is grown on the silicon substrate 1 by evaporating the dalmanium source using an electron beam evaporation source. At this time, the experiment was conducted while changing the temperature of the silicon substrate 1 in the range of 400° C. to 850° C. and the growth rate of germanium in the range of IX/sec to 100° C./sec. As a result, the temperature of the silicon substrate 1 is 5
When the growth rate is 5X or less per second at 50°C or lower, the dahmanium layer 2 exhibits a two-dimensional single-crystal growth mode, and a single-crystal germanium layer with an extremely smooth growth surface is obtained.
Furthermore, as a result of investigating the relationship between the crystallinity and film thickness of the obtained dalmanium layer 2 using X-ray diffraction, TEM, etc., it was found that the thickness of the dalmanium layer 2 is 100 OX, which is the critical thickness at which the mismatch can be relaxed by newly generated dislocations in the dalmanium layer 2
When the thickness becomes thicker than , the lattice constant of the dalmanium layer 2 approaches the intrinsic value of 5,658X, and the crystallinity gradually improves, and when it exceeds about 5 times the critical thickness, the improvement due to film thickness increases. It became clear that the effect was saturated. Therefore, the thickness of the first single crystal semiconductor layer formed on the heterogeneous single crystal substrate should be equal to or greater than the critical thickness determined by the lattice mismatch between the heterogeneous single crystal substrate and the first single crystal semiconductor layer. is desirable. Next, a second germanium layer 3 was grown on the surface of the first germanium layer 2, which had an extremely smooth growth plane, and the growth temperature was 800°C or less and the growth rate was 501°C/sec. Under the following conditions, the germanium layer 3 exhibited a two-dimensional single crystal growth pattern, and a single crystal germanium layer with an extremely smooth growth surface was obtained. Furthermore, when the crystallinity of the second germanium layer 3 thus obtained was evaluated, it was found that the quality was higher than that of the first germanium layer 2. From this, it has become clear that even when the second germanium layer 3 is grown under conditions of higher growth temperature and higher growth rate than the first germanium layer 2, high-quality crystallinity can be obtained. .

以上の実施例では第一層ゲルマニウム層及び第二層ゲル
マニウム層共に真空蒸着装置を用いて成長形成している
が、例えば第一層ダルマニウム層の形成には真空蒸着装
置を用い、第二層ゲルマニウム層の形成にはよシ高い成
長速度と量産性が期待できるCVD装置を用いることも
可能である。
In the above examples, both the first germanium layer and the second germanium layer are grown using a vacuum evaporation device. For forming the germanium layer, it is also possible to use a CVD apparatus that can be expected to have a high growth rate and mass productivity.

また、以上の実施例ではシリコン基板上へのゲルマニウ
ム半導体層の成長形成の実験結果を例に述べたが、シリ
コン基板上へのシリコンダルマニウム混晶半導体層の成
長形成及びガリウムひ素等m−v族化合物半導体層の成
長形成を試み、前記実施例と同様の効果を得た。
In addition, in the above embodiments, the experimental results of the growth and formation of a germanium semiconductor layer on a silicon substrate were described as an example, but the growth and formation of a silicon darmanium mixed crystal semiconductor layer on a silicon substrate and the m-v of gallium arsenide, etc. An attempt was made to grow a group compound semiconductor layer, and the same effects as in the previous example were obtained.

〔発明の効果〕〔Effect of the invention〕

以上に説明したように1本発明による半導体のヘテロエ
ピタキシャル結晶成長方法によれば、異種単結晶基板上
に高品位の半導体層を短時間の内に成長形成することが
可能になるため、大きな量産性、経済性をもたらすもの
である。
As explained above, according to the semiconductor heteroepitaxial crystal growth method according to the present invention, it is possible to grow a high-quality semiconductor layer on a heterogeneous single crystal substrate in a short period of time. This brings about both sex and economy.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は面方位[100]のシリコン基板上に形成され
たゲルマニウム半導体層の断面を表わす図である。図に
おいて、1はシリコン基板、2はシリコンの表面上に成
長形成された第一層ダルマニウム層、3ハlK一層ff
ゲルマニウム層表面上に成長形成された第二層ゲルマニ
ウム層である。 出願人代理人 弁理士 鈴 江 武 彦第1図
FIG. 1 is a diagram showing a cross section of a germanium semiconductor layer formed on a silicon substrate with a plane orientation of [100]. In the figure, 1 is a silicon substrate, 2 is a first layer of dalmanium grown on the surface of silicon, and 3 is a layer of 1K.
This is a second germanium layer grown on the surface of the germanium layer. Applicant's agent Patent attorney Takehiko Suzue Figure 1

Claims (1)

【特許請求の範囲】[Claims]  異種単結晶基板上に第一層単結晶半導体層を二次元的
単結晶成長様式を呈する成長温度且つ成長速度の条件下
で前記異種単結晶基板との格子不整合が新たに発生する
転位により緩和され得る臨界的厚さよりも厚く成長形成
する工程と、前記第一層単結晶半導体層の表面上に前記
第一層単結晶半導体層と同種の第二層単結晶半導体層を
二次元的単結晶成長様式を呈する成長温度且つ成長速度
の条件下で成長形成する工程とからなることを特徴とす
る半導体のヘテロエピタキシャル結晶成長方法。
A first single-crystal semiconductor layer is grown on a heterogeneous single-crystal substrate at a growth temperature and growth rate that exhibits a two-dimensional single-crystal growth mode, and the lattice mismatch with the heterogeneous single-crystal substrate is relaxed by newly generated dislocations. a step of forming a second single crystal semiconductor layer of the same type as the first single crystal semiconductor layer on the surface of the first single crystal semiconductor layer in a two-dimensional single crystal structure; 1. A method for growing a semiconductor heteroepitaxial crystal, comprising a step of growing under conditions of a growth temperature and growth rate that exhibit a growth pattern.
JP13126185A 1985-06-17 1985-06-17 Method of heteroepitaxial crystal growth of semiconductor Pending JPS61291489A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13126185A JPS61291489A (en) 1985-06-17 1985-06-17 Method of heteroepitaxial crystal growth of semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13126185A JPS61291489A (en) 1985-06-17 1985-06-17 Method of heteroepitaxial crystal growth of semiconductor

Publications (1)

Publication Number Publication Date
JPS61291489A true JPS61291489A (en) 1986-12-22

Family

ID=15053786

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13126185A Pending JPS61291489A (en) 1985-06-17 1985-06-17 Method of heteroepitaxial crystal growth of semiconductor

Country Status (1)

Country Link
JP (1) JPS61291489A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004057631A2 (en) * 2002-08-30 2004-07-08 Amberwave Systems Corporation Reduction of dislocation pile-up formation during relaxed lattice-mismatched epitaxy

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004057631A2 (en) * 2002-08-30 2004-07-08 Amberwave Systems Corporation Reduction of dislocation pile-up formation during relaxed lattice-mismatched epitaxy
WO2004057631A3 (en) * 2002-08-30 2005-03-10 Amberwave Systems Corp Reduction of dislocation pile-up formation during relaxed lattice-mismatched epitaxy

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