JPS61287093A - Sense amplifier - Google Patents

Abstract

PURPOSE:To remarkably improve charge up speed by adding a MIS-FET for charging up to a conventional sense amplifier. CONSTITUTION:To a conventional circuit, an N channel type MIT-FET Q5 for charging up is added. If a load circuit 2 is conductive, through a MIS-FET Q3 and a MIS-FET Q1, a commercial current flows and to a MIS-FET Q4 as well, the current corresponding to the FET Q3 flows and a high level is outputted to an output terminal 9. If an input terminal 1 is low level, the output of a two-input NOR circuit 5 goes to a high level, an FET Q1 is turned on, the electric potential of the input of a current mirror circuit 3 is lowered and through the FET Q3, a charging up current is supplied, the FET Q5 is also turned on and from the FET Q5 as well, the charging up current is supplied to rapidly perform the charging up.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a semiconductor integrated circuit, and particularly to a complementary type old 5-FE
The present invention relates to a sense amplifier composed of T.

(Prior Art) In recent years, with the advancement of electronic computers and the like, there has been a demand for high-speed and highly stable sense amplifiers.

Figure 2 shows the sense amplifier (patent application 1982-1) of the present applicant.
79810) is a circuit diagram.

This sense amplifier uses a P-channel type Nl5-FET QsO,l:
A two-input NOR circuit 5 has a first input connected to the input terminal 1 and a control signal 4 applied to the second input, and a source electrode connected to the input terminal 1. However, two people are connected to the first N-channel type MIs-FET Qs whose gate electrode is connected to the output of the circuit 5 and whose drain electrode is connected to the input 6 of the current mirror circuit 3, and to the output cuff of the current mirror circuit 3. The drain electrode is connected to the reference voltage source 8, the gate electrode is connected to the second voltage supply terminal GND, and the source electrode is connected to the second voltage supply terminal GND. The output terminal 9 was connected.

[Problem that the invention seeks to solve]

In the conventional sense amplifier described above, one of the N15-FETs constituting the current mirror circuit 3, that is, the drain electrode and the gate electrode are connected to the input of the current mirror circuit 3.
Since it is necessary to supply electric charge to charge up the parasitic capacitance attached to the load circuit 2 only by the MIS-FE Q3 whose source electrodes are respectively connected to the voltage supply terminal Vcc of the As the capacity increases, the disadvantage is that the charge-up speed becomes slower.

[Means for solving problems]

The present invention provides a first MIS in the conventional sense amplifier described above, in which a drain electrode is connected to a first voltage supply terminal, a gate electrode is connected to an output of a two-input NOR circuit, and a source electrode is connected to an input of a current mirror circuit. - A third old 5-FET of the same conductivity type as the FET is provided.

If the input terminal is low level, the output of the two-input NOR circuit becomes high level, the MIS-FET of w41 is turned on, the potential of the input of the current mirror circuit decreases, and a charge-up current flows through one MIS-FET of the current mirror circuit. is supplied, the third MIJ-FET is also turned on, a charge-up current is also supplied from the third MIS-FET, and charge-up is quickly performed. Then, when the potential of the input terminal rises almost to the logical threshold voltage of the two-input NOR circuit and enters the sense state, the potential of the input of the current mirror circuit becomes .

(Vcc - Threshold voltage of one MIS-FET of the current mirror circuit: VteP), or slightly lower than this potential, and since the potential of the input terminal is the potential of the input of the current mirror circuit, Third Nl5-Fl! T is turned off and has no effect on sensing the current flowing through the load circuit.

〔Example〕

Embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment of the sense amplifier circuit of the present invention.

On the wood flow side, the conventional circuit shown in FIG. A third MIS-FET Qs with N channels for charge-up connected to each other is added.

Next, the 0-wire sense amplifier, which will briefly explain the operation, is connected to the third M15-FET when the load circuit 2 is in a conductive state.
A current flows through the MIS-FET Qs and the first MIS-FET Qt, and a current corresponding to the Hls-FET Qa also flows through the MIS-FET Q4, and a high level is output to the output terminal 9. The current corresponding to MIS-FIT Qa is M
A reference voltage source 8 that outputs a reference voltage that outputs a high level to the output terminal 9 when it flows to the IS-FET Q4.
is connected to the gate electrode of the second MISt-FET Q2. On the other hand, if the load circuit 2 is in a non-conducting state.

No current flows through the old 5-FET Q3 and the first MIS-FET Qt, no current flows through the MIS-FET Qa (off state), and a low level is output to the output terminal 9. However, in order to perform such an operation, it is necessary to charge up the potential of the input terminal 1 almost to the logic threshold voltage of the two-input NOR circuit 5, and if the parasitic capacitance associated with the load circuit 2 increases, , MIS
- Since it takes a considerable amount of time to charge up using only the FET Qs, a third MIS-FET Qs with an N channel for charge up is added to greatly improve the charge up speed. The operation of the third MIS-FE Qs for charge-up will be explained below. First, when the input terminal 1 is at a low level, the output of the 2-input 7 circuit 5 becomes a high level, the first MIS-FET QI is turned on, and the potential of the input 6 of the current mirror circuit 3 decreases, causing the MIS-FET to turn on.
A charge-up current is supplied through the S-FET QS, and the third MIS-FET Qs is also turned on, and a charge-up current is also supplied from the third llllS-FET QS, so that charge-up is quickly performed.

Then, when the potential of the input terminal 1 rises almost to the logical threshold voltage of the two-input NOR circuit 5 and enters the sense state, the potential of the input 6 of the current mirror circuit 3 becomes (Vcc - MIS - F
The third MIS-
The FET Qs is turned off and has no effect on sensing the current flowing through the load circuit 2.

〔Effect of the invention〕

As explained above, the present invention adds a charge-up MIS-FET to a conventional sense amplifier.
It has the effect of significantly improving charge-up speed.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a sense amplifier according to the present invention, and FIG. 2 is a circuit diagram showing a conventional example of a sense amplifier. 1...Input terminal, 2...Load circuit. 3... Current mirror circuit, 4... Control signal, 5...
・7 circuits for 2 people. 6... Input of current mirror circuit 3, 7... Output of current mirror circuit 3, 8... Reference voltage source, 9... Output terminal, Ql,
Q2. QS...N channel type MIS-FET, Q
S, QI...P channel MIS-FET. Kabuto 1st Figure 2

Claims (1)

[Claims] 1. A load circuit connected to an input terminal is an input current source,
a current mirror circuit using a first voltage supply terminal as a reference voltage source; a two-input NOR circuit having a first input connected to the input terminal and a control signal connected to the second input; a first MIS-FET of one conductivity type, in which a source electrode is connected to a terminal, a gate electrode is connected to an output of the two-input NOR circuit, and a drain electrode is connected to an input of the current mirror circuit;
and a second MIS-FET of the same conductivity type as the first MIS-FET, whose drain electrode is connected to the output of the current mirror circuit, whose gate electrode is connected to the reference voltage source, and whose source electrode is connected to the second voltage supply terminal. In a sense amplifier configured with an MIS-FET and having an output terminal connected to the output of the current mirror circuit, a drain electrode is connected to the first voltage supply terminal, a gate electrode is connected to the output of the two-input NOR circuit, and the current mirror circuit has a drain electrode connected to the output of the current mirror circuit. the first MI whose source electrodes are respectively connected to the inputs of the mirror circuit;
A sense amplifier comprising a third MIS-FET of the same conductivity type as the S-FET. 2. The current mirror circuit has a drain electrode and a gate electrode connected to the input of the current mirror circuit, and a source electrode connected to the first voltage supply terminal.
A fourth MIS-FET of a conductivity type opposite to the IS-FET, a drain electrode at the output of the current mirror circuit, a gate electrode at the input of the current mirror circuit, and a source electrode at the first voltage supply terminal. the first MIS connected
-FET and a fifth MIS-FET of a conductivity type opposite to the sense amplifier according to claim 1.