JPS61282908A - Repeat control system - Google Patents

Abstract

PURPOSE:To reduce the burden of a CPU in the computer body side by providing a keyboard with a keyboard controller which discriminates key input information from a key matrix circuit at intervals of a certain time and adds repeat information to key input information to send it. CONSTITUTION:A keyboard-side keyboard controller 2 discriminates key input information from a key matrix circuit 1 at intervals of a certain time to discriminate the presence/absence of key input and operation of the same key or not. While a key is operated, repeat information indicating whether the same key is operated or not is added to key input information of the operated key and is sent to the computer body side at intervals of a certain time. A CPU 4 is interrupted by key input from the keyboard controller and discriminates inputted repeat information in this interrupt processing and performs the repeat control on a basis of numerical information designating a repeat interval and an interval to the repeat start.

Description

DETAILED DESCRIPTION OF THE INVENTION (A) Field of Industrial Application The present invention relates to a key repeat control method in a keyboard, and particularly to the same method in which the repeat interval is variable.

(4) Conventional technology Japanese Unexamined Patent Publication No. 149530/1983 uses a table in which numerical information specifying the repeat interval is registered corresponding to key input information for various keys that can be repeated. A technique for changing each key is disclosed.

In this prior art, a keyboard controller performs key scanning at predetermined time intervals and stores the key code of the detected key in a key register. Then, the central processing unit (hereinafter referred to as CPU) reads the contents of the key register at predetermined interrupt timing from the timer. If it is detected through this reading that a repeat operation regarding the same key is required, the key input information is displayed on the key at a time interval corresponding to the above numerical information in the above table corresponding to the read key input information. Store in buffer.

(c) Problems to be solved by the invention Normally, the keyboard controller is located on the keyboard side, and the CPU is located on the computer main body side.In addition to keyboard-related processing, this CPU also performs a variety of processing such as display and memory control. must be carried out. However, in the above-mentioned conventional technology, the CPU on the computer main body side must read the contents of the key register sequentially at fixed time intervals such as 10m5, regardless of whether there is a key input from the keyboard. , there was a problem that the load on the CPU was heavy.

B) Means for Solving the Problems The present invention includes a key matrix circuit on the keyboard side, and a system that determines key input information from the key matrix circuit at regular intervals to determine whether or not the same key is being operated. The computer has a keyboard controller that sends out repeat information that is added to the key input information, and has a central processing unit and a memory that stores numerical information that specifies the repeat interval and the interval until the start of the repeat on the computer main body side. The central processing unit is interrupted by a key input from the keyboard controller, and in the interrupt processing, determines the repeat information and performs repeat control based on the numerical information.

(E) Function In the present invention, the keyboard controller on the keyboard side determines key input information from the key matrix circuit at regular intervals, and determines whether there is a key input or not and whether the same key is being operated. While a key is being operated, repeat information indicating whether the same key is being operated is added to the key input information of the operating key and sent to the combiator main body at regular time intervals. When no key is operated, key input information is not sent.

The CPU on the Combiator main body side is interrupted by a key input from the keyboard controller, and in this interrupt processing, the CPU judges the input reheat information and based on the numerical information specifying the repeat interval and the interval until the start of the repeat. to perform repeat control. Therefore, the CPU
The repeat control process is performed only while the key is being operated, and other processes can be executed while the key is not being operated.

(F) Embodiment FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, which includes a key matrix circuit (1), a keyboard controller (2), and a timer (3) on the keyboard side.
The main body of the combiator includes a CPU (4), a conversion table (5) for converting an input key address into key data such as a corresponding character code, a key buffer (6) for storing the converted key data, and a key For all keys of the matrix circuit (1), a first initial value and a second value specifying the interval until the start of repeat and the repeat interval, respectively.
A repeat table that stores initial values (with power).

As shown in FIG. 2, the key code sent from the keyboard controller (2) to the CPU (41) consists of a 7-bit key address and a 1-bit repeat flag, and this key code is transferred serially. , repeat table (7) C, is composed of a rewritable memory such as RAM.

Next, the operation of this embodiment will be explained.

An interrupt is generated by the keyboard controller (2) and the timer (3) at fixed time intervals, for example, every 10 ffls, and in the interrupt routine, the processing shown in the flowchart of FIG. 3 is performed.

That is, the key matrix circuit 11) is scanned, and first,
Determine whether there is a key input, that is, whether any key is being operated. When there is a key input, it is determined whether the input key address is the same as the contents of the key register (8), thereby determining whether the same key is being operated. If the keys are not the same, the key address is set in the key register (8), the repeat flag is turned off, the repeat flag is added to the key address, and the key address is sent to the combiator main body. If it is the same key, the repeat flag is turned on and the same key code is sent out. During key scanning, if there is no key input, the key code is not sent out.In this way, the keyboard controller (2) is turned on while the keys are being operated, and the key code is sent out at fixed time intervals.

The CPU (4141, key code input KJ) on the computer main body side is configured to be interrupted, and this interrupt routine performs the processing shown in the flowchart of FIG.

That is, the state of the serially transferred repeat flag is determined, and if it is on, the first initial value corresponding to the input key address is loaded with reference to the repeat table (7);
Set the repeat counter (9) inside the CPU (4). Then convert the key address to the tape LL/(5)
is used to convert it into key data and store it in the key buffer (6).

On the other hand, if the repeat flag is off, first it is determined whether the content of the repeat counter (9) is "0" or not, and if it is "0", the repeat counter (9) is decremented.

If it is not "0", load the second initial value corresponding to the input key address by referring to the repeat table (force),
Similarly, the repeat counter (9) converts the key address into key data and stores it in the key buffer (6).

Through the above processing, repeat control is performed at time intervals corresponding to the first and second initial values.

For keys that you do not want to repeat, if you register "0" as the second initial value, as shown in the 70-chart in FIG. ”, and if it is “0”, the key data is not stored in the key buffer (6), so no repeat is performed.

As explained above, the CPU (
4) performs input and repeat control only when a key code is input, that is, while a key is being operated, and does not perform any repeat-related processing when no key is operated.

By the way, the first and second initial values can be registered in the repeat table (7) by inserting the disk Q1 storing the program into the disk drive device αυ and using this program via the CPU (4). .

In the above-described embodiment, the first initial value is stored for each key, but if the first initial value is common to each key, only one value may be stored. Further, it is not necessary to register initial values for all keys, but it is also possible to register input initial values for specific keys such as cursor keys, and use a common initial value for other keys.

Furthermore, if it is not necessary to change the repeat interval for each key, but it is sufficient to change it for each program or key matrix used, use the repeat table (7).
To do so, it is only necessary to register one initial value each of °C, first and second initial values as common initial values for each key. For example, in a word processor program, "60" and "6" are set as the first and second initial values, and in a graphics processing program, the same "6" is set as the first and second initial values. , it is sufficient to register different initial values depending on the program to be executed.

Also, different initial values may be registered for each key matrix used.

(G) Effects of the Invention According to the present invention, the repeat interval can be made variable and the load on the CPU on the combiner main body side can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a flowchart showing the contents of a blog showing the configuration of an embodiment of the present invention. Explanation of main drawing numbers (1)...Key matrix circuit, (2)...Keyboard controller, (4)...CPU, +61
...Key buffer, (7)...Repeat table,
(9)...Repeat counter. Applicant Sanyo Electric Co., Ltd. and 1 other representative Patent attorney Masao Sano Figure 3 Figure 2 Figure 44

Claims (1)

[Claims] (1) On the keyboard side, a key matrix circuit judges the key input information from the key matrix circuit at regular intervals and adds repeat information to the key input information indicating whether or not the same key is being operated. The computer main body side includes a memory that stores numerical information specifying a repeat interval and an interval until the start of repeat, and a central processing unit, and the central processing unit A repeat control method characterized in that an interrupt is generated by a key input from a controller, the repeat information is determined in the interrupt processing, and repeat control is performed based on the numerical information.