JPS61281352A - Starting system for multi-processor system - Google Patents

Abstract

PURPOSE:To complete exactly initialization even when the time required for the initialization of each system is different, by providing a synchronizing device between a main system processor and a sub-system processor. CONSTITUTION:When a power source is turned on, a main system processor 10 and a sub-system processor 20 are initialized by a program of a common ROM 4. Thereafter, the processor 10 starts a processor 10 use iPL of a built-in ROM 12, reads a processor 20 use iPL from a magnetic disk 2, and stores it in a main storage 3. Next, starting is applied to the processor 20 through a synchronizing device 5. On the other hand, the processor 20 is initialized, and thereafter, waits for the time when a start is applied, by informing it to the synchronizing device 5. The synchronizing device 5 waits for a notice from the processor 10, and after the processor 20 has been initialized, the iPL of the processor 20 is started by a notice sent from the processor 20. On the contrary, when the notice from the processor 20 has been received first, the processor 20 is awaited until the processing of the processor 10 is completed.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a multiprocessor system with reduced hardware, and is particularly suitable for starting a multiprocessor system when a main processor and a slave processor have different processing capabilities. Regarding the method.

[Background of the invention]

Conventionally, the startup method for multiprocessors was %-open/
As described in Japanese Patent No. 58-166478, the hardware of the slave processor system can be saved by loading the startup program for the slave processor from the master processor. However, no consideration was given to the time required to initialize the main processor and slave processor. Therefore, there was a problem in that the initial setting of the slave processor had to be completed quickly. 4 [Object of the Invention] The object of the present invention is to start up a multiprocessor system when the time required for initial settings differs due to differences in the processing capabilities of the main and slave processors or differences in the configuration of each system. The goal is to provide improved reliability during startup without failures.

[Summary of the invention]

That is, in the startup method of a multiprocessor in which a plurality of processors are connected to a common bus, the present invention conventionally provides a notification to the main processor from the processor A when the initial settings of the slave processor are completed, and the main processor notifies the main processor of this fact. For,
A program for activating a slave processor is stored, and conversely, if the main processor becomes able to start first, initial startup of each processor is performed by waiting until the initial settings of the slave processor are completed. .

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. 1 is a common bus, and 10 and 20 are a main processor and a slave processor connected to the common bus.

Connected to the common bus 1 are a main memory 3 and a common ROM 4 containing a program for initializing each processor. Furthermore, a magnetic disk 2 is also connected. Connected to 10 and 20 are local memories 11 and 21, each of which can only be used independently.

Furthermore, the main processor 10 has a built-in boot ROM 12. A synchronizer 5 is used as an intermediary to synchronize the devices 10 and 20.

When the power is turned on, the processors 10 and 20.

Initial settings are performed by the program No. 4.

After the main processor 10 tests the local memory 11 with initial settings, it starts the built-in ROM 120 program, that is, the iPL for 10. With this iPL,
Read the iPL for the processor 20 from the magnetic disk,
This is stored in 3 and activated 20)'C via the synchronizer 5.

On the other hand, when the power is turned on, the slave processor 20 performs initial settings according to the program 4, and notifies 5 of the completion of the initial settings.
Wait for it to start up.

The synchronizer 5 waits for notification from the main processor 10, and after the initial setting of the slave processor 20 is completed.

The iPL of 20 is activated by the notification from 20.

Conversely, if the notification of completion is received from 20 first, then 20 is made to wait until the processing of 10 is completed.

With the above, the main processor 10 and the slave processor 2
iPL 0 is activated, and both are activated.

According to this embodiment, the local storage 21 of the slave processor 20
Even if the capacity changes, there is no need to change the initial setting program or iPL, and the initial startup is completed reliably. Also, since both processors operate in parallel, startup time can be shortened.

〔Effect of the invention〕

According to the present invention, even if the configuration of the slave processor system is changed and the time required for initial settings changes, there is no need to change the iPL of the main processor.
You can freely expand the slave processor system individually without knowing the details of the startup method.

Furthermore, if a failure occurs in the main processor system, this can be recognized within the synchronization device and appropriate countermeasures can be taken to prevent the occurrence of the failure, thereby improving performance at startup.

The synchronization device can also be achieved by a program as a common ROM in the main memory.

In this embodiment, only the case between two processors has been described, but by providing the synchronization device with a determination as to which processor starts, the present invention can be easily applied to a method for starting a multiprocessor system.

[Brief explanation of drawings]

The figure is a block diagram showing an embodiment of a multiprocessor system according to the present invention.

Claims (1)

[Claims] In a multiprocessor system in which multiple processors are connected to a common bus, and in a startup method in which a startup program for the slave processor is stored from the master processor to the memory of the slave processor, a synchronization device is provided between the master processor and the slave processor. A startup method for a multiprocessor system characterized by: