JPS61280582A - Method for measuring mos semiconductive apparatus - Google Patents

Abstract

PURPOSE:To eliminate the erroneous measurement of a function test while making it possible to remove the pellet inferior to pressure resistance of a gate oxide film in a wafer check stage and to enhance yield, by irradiating a MOS semiconductive apparatus with light after a voltage stress test and performing the function test of each specification. CONSTITUTION:Voltage of about 10V is applied from the input and output terminals of a MOS semiconductive apparatus, for example, a dynamic RAM to impart voltage stress to the MOS transistor and capacitor of each memory cell and the pressure inferiority of a gate oxide film is inspected. Next, the irradiation of light is performed, for example, by lighting the lamp 2 of a tester for 2-3sec and the charge charged by a voltage stress test is discharged to the capacitor of the boot strap circuit of the dynamic RAM. Thereafter, light is turned OFF and the function test of each specification of the dynamic RAM is performed by a tester. Because the voltage stress test is performed at first, the chip inferior to pressure resistance of the gate oxide film can be removed in a wafer state and, therefore, assembling yield is enhanced.

Description

DETAILED DESCRIPTION OF THE INVENTION A) Field of Industrial Application The present invention relates to a method for measuring a MOS semiconductor device, particularly a MOS semiconductor device containing a built-in MOS capacitor.

(b) In conventional MOS semiconductor devices, a voltage stress test is performed to test the withstand voltage of the gate oxide film. In the voltage stress test, a voltage of about 10 V is applied to the gate electrode of a MOS semiconductor device or the capacitor electrode of a memory cell to test the withstand voltage of the gate oxide film. But after this voltage stress test K
When power is supplied to each chip of a MOS semiconductor device and a functional test of each specification is performed, an electric charge is charged to the MOS capacitor, which is often used in a putot strap circuit, etc. in a voltage stress test. There was a risk that the value would be measured incorrectly. Therefore, a method was adopted in which the voltage stress test was performed after the functional test of each specification, and GO or NG of each element was not determined after the voltage stress test.

It should be noted that no suitable publication could be found as such prior art.

(/1 Problems to be Solved by the Invention However, in the above measurement method, a voltage stress test is performed after the functional test of each specification. However, since these defective pellets are removed during measurement after assembly is completed, the assembly yield is reduced.

B) Means for solving the problem The present invention was made in view of the problem, and after the voltage stress test, it is possible to perform a functional test of each specification by irradiating light to discharge the charge remaining in the MO3 capacitor. The present invention provides a method for measuring a MOS semiconductor device.

(E) Function According to the present invention, since the MOS semiconductor device is subjected to a voltage stress test and then irradiated with light to perform a functional test for each specification, the accumulated charge can be immediately discharged and the functional test can be performed without erroneous measurements. Bullets with poor breakdown voltage of the gate oxide film can be removed at the wafer check stage.

(F) Embodiment An embodiment of the present invention will be described in detail using a dynamic RAM constructed of MOS transistors as a MOS semiconductor device.

As shown in Figure 2, the dynamic RAM consists of a memory cell, a column decoder, a row decoder, a sense amplifier, a circuit 10, etc. The column decoder and row decoder receive address input via a column address circuit and a row address circuit. is applied to select a memory cell at a predetermined address. Data input/output is applied to Ilo. In such a dynamic RAM, a bootstrap circuit is inserted into a clock generator or a word line to boost the signal level in order to improve soft error resistance.

In the present invention, a voltage stress test is performed as shown in FIG. A voltage of approximately 10 V is applied from the input/output terminal of the dynamic RAM to the MOS transistor and capacitor tK'y! of each memory cell. Pressure stress is applied to inspect the gate oxide film for pressure suppression failure.

Next, light irradiation, which is a feature of the present invention, is performed. In this step, the lamp attached to the prober of the tester is turned on for 2 to 3 seconds to discharge the charge that has been charged in the capacitance of the aforementioned Pootstrap circuit of the dynamic RAM during the voltage stress test.

Minority carriers are generated in the semiconductor substrate by light irradiation,
The charge is discharged by recombining with majority carriers in the charged diffusion region in the semiconductor substrate forming a capacitor.

After that, the light is turned off and a tester is used to perform a functional test of each specification of the dynamic RAM. As a functional test, electrical characteristics listed as specifications in a catalog or the like are measured, and GO or NG is determined. Specifically, there are access Φ time, refresh time, precharge time, setup time of each address, data input hold time, etc. (g) Effect of the invention According to the present invention, voltage stress test can be performed. Since it can be carried out first, it has the advantage that chips with poor breakdown voltage of gate oxide films can be removed in wafer state. As a result, assembly yield can be improved.

Furthermore, the present invention has the advantage that the light irradiation can be performed in a very short time and the charge can be discharged to perform a functional test, so that it can be immediately incorporated into the conventional measurement method, and the measurement time is almost unchanged.

[Brief explanation of the drawing]

FIG. 1 is a block diagram explaining the MOSO8 semiconductor device determination method according to the present invention, and FIG. 2 is a general dynamic RA
It is a block diagram explaining M.

Claims (1)

[Claims] (1) After voltage stress test on MOS semiconductor device,
A method for measuring a MOS semiconductor device, comprising: irradiating light to discharge charges accumulated during the voltage stress test; extinguishing the light; and performing a functional test of each specification of the MOS semiconductor device.