JPS6127633A - Plasma etching device - Google Patents

Plasma etching device

Info

Publication number
JPS6127633A
JPS6127633A JP14811184A JP14811184A JPS6127633A JP S6127633 A JPS6127633 A JP S6127633A JP 14811184 A JP14811184 A JP 14811184A JP 14811184 A JP14811184 A JP 14811184A JP S6127633 A JPS6127633 A JP S6127633A
Authority
JP
Japan
Prior art keywords
substrate
plasma
semiconductor substrate
supporter
carrier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14811184A
Other languages
Japanese (ja)
Inventor
Fumihide Satou
佐藤 史英
Toshio Wada
和田 俊男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP14811184A priority Critical patent/JPS6127633A/en
Publication of JPS6127633A publication Critical patent/JPS6127633A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/34Gas-filled discharge tubes operating with cathodic sputtering
    • H01J37/3411Constructional aspects of the reactor
    • H01J37/3435Target holders (includes backing plates and endblocks)

Abstract

PURPOSE:To make it feasible to perform precise etching process by a method wherein a carrier is provided to carry a supporter to support a substrate into or out of plasma produced between flat electrodes in parallel with each other. CONSTITUTION:A substrate 1 is arranged on a supporter 4a by means of a substrate carrier. The substrate 1 is preliminarily supplied with power so that reaction gas led from a reaction gas leading tube may produce stable plasma 8 between flat plate made cathode 6 and anode 7. Firstly the supporter 4a loaded with the substrate 1 is placed on the cathode 7 in the plasma 8 by means of a carrier and the substrate 1 is etched as it is for specified time. Secondly the supporter 4a after finishing the etching process is carrier out of the plasma 8 and the semiconductor substrate 1 on the supporter 4a is carried out by the substrate carrier. Through these procedures, the semiconductor substrate 1 on the supporter 4a may not be supplied with any unstable high voltage generated in case plasma is produced or discharged since the substrate 1 may be etched within the plasma 8 in stable status with power preliminarily supplied.

Description

【発明の詳細な説明】 〔技術分野〕 本発明は半導体装置の製造に使用するプラズマエツチン
グ装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a plasma etching apparatus used for manufacturing semiconductor devices.

〔従来技術〕[Prior art]

従来のプラズマエツチング装置においては、電力投入時
と電力遮断時に異常電圧が発生することが知られている
It is known that in conventional plasma etching apparatuses, abnormal voltages occur when power is turned on and when power is turned off.

すなわち、電力投入時には電極間の気体がプラズマ状態
になっていないため、電気抵抗が高く。
That is, when power is turned on, the gas between the electrodes is not in a plasma state, so the electrical resistance is high.

そのため第1図に示す、ように、電力投入時の微少時間
t1において、電極間に不安定な高電圧v1が印加され
る。電極間の気体がプラズマ状態になると電極間インピ
ーダンスが減少し、電圧も低く、時間t2 に示すよう
に一定となる。また、電力を遮断しプラズマが消滅する
時には1時間t3 に示すような高電圧v2が発生する
Therefore, as shown in FIG. 1, an unstable high voltage v1 is applied between the electrodes during a short time t1 when power is turned on. When the gas between the electrodes enters a plasma state, the impedance between the electrodes decreases and the voltage becomes low and constant as shown at time t2. Furthermore, when the power is cut off and the plasma is extinguished, a high voltage v2 as shown at 1 hour t3 is generated.

このように従来のプラズマエツチング装置においては、
異常電圧が半導体基板に印加されるため、半導体基板に
形成される素子はジャンクシヨン等に損傷を受け、素子
性能を劣化させるという欠点があった。
In this way, in conventional plasma etching equipment,
Since an abnormal voltage is applied to the semiconductor substrate, the elements formed on the semiconductor substrate are damaged by junctions and the like, resulting in deterioration of element performance.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、上記欠点を除去し、高品質のエツチン
グ処理を可能とするプラズマエツチング装置を提供する
ことにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a plasma etching apparatus that eliminates the above-mentioned drawbacks and enables high-quality etching processing.

本発明によれば、半導体基板は安定したプラズマが発生
している電極間に搬入され、かつ搬出されるため、電力
の投入時および遮断時に発生する異常電圧が印加される
ことがない。
According to the present invention, since the semiconductor substrate is carried in between the electrodes where stable plasma is generated and carried out, the abnormal voltage that occurs when power is turned on and off is not applied.

〔発明の構成〕[Structure of the invention]

本発明のプラズマエツチング装置は、半導体基板を保持
する保持板と、該保持板に半導体基板を載置する基板搬
入手段と、前記保持板を平行平板電極間に発生している
プラズマ中に搬入しかつ搬出する搬送出段と、エツチン
グ終了後の半導体基板を前記保持板より取り出す基板搬
出手段とを含んで構成される。か\る構成において、基
板搬入手段と平行平板電極とは常に同一真空系内に有り
、且つ平行平板電極とエツチング処理前後の保持板との
間には、保持板への電界印加を回避するためのシールド
電極が設けられている。シールド電極は後述する実施例
の如くウヱーハ支持体側にaF源を供給するカソード結
合型であるときにはアノードと同電位のGND電位に固
定されるが、アノード側にRF源を供給するエツチング
装置では浮遊電極である。
The plasma etching apparatus of the present invention includes a holding plate for holding a semiconductor substrate, a substrate carrying means for placing the semiconductor substrate on the holding plate, and a substrate carrying means for carrying the holding plate into plasma generated between parallel plate electrodes. The apparatus also includes a transport stage for transporting the semiconductor substrate, and a substrate transport means for taking out the semiconductor substrate after etching from the holding plate. In such a configuration, the substrate carrying means and the parallel plate electrode are always in the same vacuum system, and there is a space between the parallel plate electrode and the holding plate before and after the etching process to avoid applying an electric field to the holding plate. A shield electrode is provided. When the shield electrode is a cathode-coupled type that supplies an aF source to the wafer support side as in the embodiment described later, it is fixed to the GND potential, which is the same potential as the anode, but in an etching device that supplies an RF source to the anode side, it is a floating electrode. It is.

〔実施例の説明〕[Explanation of Examples]

次に本発明を実施例を用い1図面を参照して説明する。 Next, the present invention will be explained using an example and with reference to one drawing.

第2図(a)〜(C)は、本発明の一実施例における半
導体基板と保持板との動きを説明するための模式的断面
図である。
FIGS. 2(a) to 2(C) are schematic cross-sectional views for explaining the movement of the semiconductor substrate and the holding plate in one embodiment of the present invention.

第2図(a)に示すように、プラズマエツチング装置の
真空容器1内には、複数枚の半導体基板2が収納された
供給カセット2が置かれている。この供給カセット2よ
り1枚の半導体基板1を、例えば搬送ベルトや搬送フォ
ーク等からなる基板搬入手段(図示せず)により、セラ
ミックや石英等からなる保持板4aに載置する。この時
までに、反応気体導入管5より導入された反応ガスが平
板の陽極6と陰極7の間で安定したプラズマ8を形成す
るようにあらかじめ電、力を投入しておく。な ゛お1
2はシールド電極であり、プラズマをエツチング処理前
後の半導体基板から遮蔽する。
As shown in FIG. 2(a), a supply cassette 2 containing a plurality of semiconductor substrates 2 is placed in a vacuum container 1 of a plasma etching apparatus. One semiconductor substrate 1 is placed from the supply cassette 2 on a holding plate 4a made of ceramic, quartz, or the like by means of substrate carrying means (not shown) made of, for example, a conveyor belt or a conveyor fork. By this time, electricity and force have been applied in advance so that the reaction gas introduced from the reaction gas introduction tube 5 forms a stable plasma 8 between the flat anode 6 and the cathode 7. Na゛O1
A shield electrode 2 shields plasma from the semiconductor substrate before and after etching.

次に第2図(b)に示すように、半導体基板1を載置し
た保持板4aは、搬送ベルトまたは回転機構等からなる
搬送手段(図示せず)によりプラズマ8中の陰極7上に
置かれる。そしてこの状態で保持板4a上の半導体基板
1は規定時間エツチングされる。この間、次の半導体基
板lは保持板4b上に載置される。
Next, as shown in FIG. 2(b), the holding plate 4a on which the semiconductor substrate 1 is placed is placed on the cathode 7 in the plasma 8 by a conveying means (not shown) consisting of a conveying belt or a rotating mechanism. It will be destroyed. In this state, the semiconductor substrate 1 on the holding plate 4a is etched for a prescribed period of time. During this time, the next semiconductor substrate l is placed on the holding plate 4b.

次に第2図(りに示すように、エツチング終了後の保持
板4aは搬送手段によりプラズマ8より搬出され、続い
て保持板4a上の半導体基板1は、搬送フォークや搬送
ベルトよりなる基板搬出手段(図示せず)により取り出
され、収納カセット9に収納される。この間、保持板4
bは搬送手段によりプラズマ8中に置かれ、更に次の保
持板4C上には、半導体基板1が供給カセット1から取
り出されて載置される。尚、図においてlOは排気管、
11は高周波電源である。
Next, as shown in FIG. 2, the holding plate 4a after etching is carried out from the plasma 8 by a conveying means, and then the semiconductor substrate 1 on the holding plate 4a is carried out by a substrate carrying means such as a conveying fork or a conveying belt. It is taken out by means (not shown) and stored in the storage cassette 9. During this time, the holding plate 4
b is placed in the plasma 8 by the transport means, and the semiconductor substrate 1 is taken out from the supply cassette 1 and placed on the next holding plate 4C. In the figure, lO is the exhaust pipe,
11 is a high frequency power source.

このように本発明の一実施例によれば、保持板に載置さ
れた半導体基板1は、電力投入後の安定な状態にあるプ
ラズマ8中に置かれてエツチングされるために、プラズ
マの発生・消滅時に発生する不安定な高電圧にさらされ
ることはない。従って、半導体基板lに形成される素子
は損傷を受けることはなくなる。
According to one embodiment of the present invention, the semiconductor substrate 1 placed on the holding plate is etched by being placed in the plasma 8 which is in a stable state after power is turned on.・You will not be exposed to the unstable high voltage that occurs during extinction. Therefore, the elements formed on the semiconductor substrate l will not be damaged.

第3図は1本発明の池の実施例の一部切欠き要部斜視図
である。
FIG. 3 is a partially cutaway perspective view of an important part of an embodiment of a pond according to the present invention.

第3図において、供給カセツ)107Aに収納された半
導体基板101は、カセット支持台108の上下動と搬
送ベルト109/Vとにより取り出され、搬送フォーク
ll0Aに移される。
In FIG. 3, the semiconductor substrate 101 housed in the supply cassette 107A is taken out by the vertical movement of the cassette support 108 and the conveyor belt 109/V, and is transferred to the conveyor fork 110A.

搬送7オーク110Aは、半導体基板101を載置し、
平行移動して半導体基板101を保持板1020基板保
持部112A上に移動させる。この時、基板保持部11
2Nの下部よりピストン111が上昇し半導体基板10
1を押し上げる。そして。
The transport 7 oak 110A places the semiconductor substrate 101,
The semiconductor substrate 101 is moved in parallel onto the holding plate 1020 and the substrate holding portion 112A. At this time, the substrate holding part 11
The piston 111 rises from the bottom of the 2N, and the semiconductor substrate 10
Push up 1. and.

搬送7オーク11ONかもとの位置に移動するとピスト
ン111が下降し、半導体基板101を基板保持部11
24に載置する。基板保持部112Nはテーパを有する
円形の凹部からなり、半導体基板101を正確に載置し
保持するように構成されている。
When the transport 7 oak 11ON moves to its original position, the piston 111 descends and the semiconductor substrate 101 is moved to the substrate holding part 11.
Place it on 24. The substrate holding portion 112N is formed of a circular concave portion with a taper, and is configured to accurately place and hold the semiconductor substrate 101.

セラミックや石英板等からなる保持板102は、回転軸
106全中心にした正三角形状に形成されており、その
正三角形の頂点の部分に3つの基板保持部112 (1
12A、112B、112C)が形成されている。
The holding plate 102 made of ceramic, quartz plate, etc. is formed in the shape of an equilateral triangle centered on the rotating shaft 106, and three substrate holding parts 112 (1
12A, 112B, 112C) are formed.

基板保持部112Aに半導体基板101が載置されると
、保持板102は回転軸106を中心に120° 回転
し、基板保持部112人をプラズマが安定状態に発生し
ている平板陽極104と陰極105間に移動させる。な
おこの時、プラズマはシールド1tM113により、エ
ツチング処理前後の半導体基板から分離される。そして
、半導体基板101が現定時間エツチングされると、保
持板102は再び回転し、陽・陰極104,103間に
は次の半導体基板を載置した基板保持部112Bが移動
してくる。
When the semiconductor substrate 101 is placed on the substrate holder 112A, the holder 102 rotates 120 degrees around the rotation axis 106, and the substrate holder 112 is placed between the flat anode 104 and the cathode where plasma is generated in a stable state. Move between 105 and 105. At this time, the plasma is separated from the semiconductor substrate before and after the etching process by the shield 1tM113. After the semiconductor substrate 101 has been etched for a predetermined time, the holding plate 102 rotates again, and the substrate holding part 112B on which the next semiconductor substrate is placed moves between the anode and cathode 104 and 103.

一方、基板保持部112A上の、エツチング処置された
半導体基板101は、ピストン111により押し上げら
れ、平行移動してきた搬送フォーク110Bに移される
。搬送フォーク110Bかもとの位置に戻ると、搬送ベ
ルト109Bにより収納カセット107Bに収納される
On the other hand, the etched semiconductor substrate 101 on the substrate holder 112A is pushed up by the piston 111 and transferred to the conveying fork 110B, which has moved in parallel. When the transport fork 110B returns to its original position, it is stored in the storage cassette 107B by the transport belt 109B.

このようにして、供給カセット107A中の半導体基板
101は順次基板保持部112に移され、安定状態のプ
ラズマ中でエツチングされ、そして自動的に収納カセッ
ト107Bに収納される。
In this way, the semiconductor substrates 101 in the supply cassette 107A are sequentially transferred to the substrate holder 112, etched in stable plasma, and then automatically stored in the storage cassette 107B.

供給カセッl−107A、 収納カセット107へ保持
基板1021反応気体心気営105に接続する陽極10
4等は全て同一の真空容器内におかれてもよく、各カセ
ットと搬送ベルトおよび搬送フォークを予備の真空容器
においてもよい。
Supply cassette 107A, storage cassette 107, holding substrate 1021, and anode 10 connected to reaction gas core 105
4 etc. may all be placed in the same vacuum container, or each cassette, conveyor belt, and conveyor fork may be placed in a spare vacuum container.

尚、上記実施例においては三角形状の保持板を用いた場
合について説明したが、円形等能の形状でらってもよく
、また、基数保持部が3つ以上であって連続的に半導体
基板をプラズマヂにさらすことも可能で今る。
In the above embodiment, a triangular holding plate is used, but a circular holding plate may also be used, and three or more radix holding parts may be used to continuously hold the semiconductor substrate. It is now possible to expose the body to plasma.

〔発明の効果〕〔Effect of the invention〕

以上詳細に説明したように、本発明によtLば、安定な
プラズマ中で半導体基板をエツチングすることができる
ため、素子に損傷を与えることのない高品質のエツチン
グ処理が可能なプラズマエツチング装置が得られるので
、半導体装置の製造に大きな効果がめる。
As explained in detail above, the present invention enables a semiconductor substrate to be etched in stable plasma, thereby providing a plasma etching apparatus capable of performing high-quality etching processing without damaging devices. Therefore, it has a great effect on the manufacturing of semiconductor devices.

【図面の簡単な説明】[Brief explanation of drawings]

$1図は、プラズマエツチング装置の電極間における時
間に対する電圧の変化を示す図、第2図(a)−(C)
  は、本発明の一実施例における半導体基板と保持板
の動きを説明するための模式的断面図、第3図は、本発
明の他の実施例の一部切欠き斜視図である。 1・・・・・・真空容器、2・・・・・・供給カセット
、3・・・・・・半導体基板、4a、4b、4c・・・
・・・保持板、5・・・・・・反応気体導入管、6・・
・・・・陽極、7・・・・・・陰極、8・−・・・・プ
ラズマ、9・・・・・・収納カセット、10・・・・・
・排気管、11・・−・・・高周波電源、12・・・・
・・シールド電極、101・・・・・・半導体基板、1
02・・・・・・保持板、103・・・・・・陰極、1
04・・・・・・陽極、105・−・・・・反応気体導
入管、106・・・・・・回転軸、107A・・・・・
・供給カセット、107B・・・・・・収納カセット、
108・・・・・・カセット支持台、109N、109
B・・・・・・搬送ベルト、11(1,110B・・・
・・・搬送フォーク、111・・・・・・ピストン、1
12・・・・・・基板保持部、113・・・・・・シー
ルド電極。
Figure 1 is a diagram showing the change in voltage with respect to time between the electrodes of a plasma etching device, and Figures 2 (a) to (C).
3 is a schematic cross-sectional view for explaining the movement of a semiconductor substrate and a holding plate in one embodiment of the present invention, and FIG. 3 is a partially cutaway perspective view of another embodiment of the present invention. 1... Vacuum container, 2... Supply cassette, 3... Semiconductor substrate, 4a, 4b, 4c...
...Holding plate, 5...Reaction gas introduction pipe, 6...
...Anode, 7...Cathode, 8...Plasma, 9...Storage cassette, 10...
・Exhaust pipe, 11... High frequency power supply, 12...
...Shield electrode, 101...Semiconductor substrate, 1
02... Holding plate, 103... Cathode, 1
04... Anode, 105... Reaction gas introduction tube, 106... Rotating shaft, 107A...
・Supply cassette, 107B...Storage cassette,
108...Cassette support stand, 109N, 109
B... Conveyor belt, 11 (1,110B...
...Transportation fork, 111... Piston, 1
12... Substrate holding part, 113... Shield electrode.

Claims (1)

【特許請求の範囲】[Claims]  半導体基板を保持する保持板と、該保持板に半導体基
板を載置する基板搬入手段と、前記保持板を平行平板電
極間に発生しているプラズマ中に搬入しかつ搬出する搬
送手段と、エッチング終了後の半導体基板を前記保持板
より取り出す基板搬出手段とを含むことを特徴とするプ
ラズマエッチング装置。
A holding plate for holding a semiconductor substrate, a substrate carrying means for placing the semiconductor substrate on the holding plate, a conveying means for carrying the holding plate into and out of plasma generated between parallel plate electrodes, and etching. 1. A plasma etching apparatus comprising: substrate unloading means for taking out a semiconductor substrate after completion of etching from the holding plate.
JP14811184A 1984-07-17 1984-07-17 Plasma etching device Pending JPS6127633A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14811184A JPS6127633A (en) 1984-07-17 1984-07-17 Plasma etching device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14811184A JPS6127633A (en) 1984-07-17 1984-07-17 Plasma etching device

Publications (1)

Publication Number Publication Date
JPS6127633A true JPS6127633A (en) 1986-02-07

Family

ID=15445493

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14811184A Pending JPS6127633A (en) 1984-07-17 1984-07-17 Plasma etching device

Country Status (1)

Country Link
JP (1) JPS6127633A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5160999A (en) * 1988-11-10 1992-11-03 Rheinmetall Gmbh Acceleration resistant packaging for integrated circuits and method of producing them
WO2007094416A1 (en) * 2006-02-17 2007-08-23 Mitsubishi Heavy Industries, Ltd. Plasma processing apparatus and plasma processing method
JP2019009305A (en) * 2017-06-26 2019-01-17 東京エレクトロン株式会社 Plasma processing apparatus

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5160999A (en) * 1988-11-10 1992-11-03 Rheinmetall Gmbh Acceleration resistant packaging for integrated circuits and method of producing them
WO2007094416A1 (en) * 2006-02-17 2007-08-23 Mitsubishi Heavy Industries, Ltd. Plasma processing apparatus and plasma processing method
JP2007220926A (en) * 2006-02-17 2007-08-30 Mitsubishi Heavy Ind Ltd Apparatus and method for plasma treatment
US8480912B2 (en) 2006-02-17 2013-07-09 Mitsubishi Heavy Industries, Ltd. Plasma processing apparatus and plasma processing method
US9011634B2 (en) 2006-02-17 2015-04-21 Mitsubishi Heavy Industries, Ltd. Plasma processing apparatus and plasma processing method
JP2019009305A (en) * 2017-06-26 2019-01-17 東京エレクトロン株式会社 Plasma processing apparatus

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