JPS61276258A - Optical-electric integrated element - Google Patents

Abstract

PURPOSE:To reduce signal delay and the increase of wiring length by sharing a signal such as a clock signal as a common signal in an electronic circuit to an optical semiconductor element. CONSTITUTION:A plurality of circuit units 2 consisting of single or a plurality of logic elements are integrated to an integrated circuit substrate 1, and one or two or more of semiconductor light-emitting elements 3 are formed at a central section in the integrated circuit substrate 1 in a monolithic manner. Semiconductor photo-detecting elements coupled with electric elements are unified and shaped to each circuit unit 2. When a clock signal is transmitted over several circuit unit 2, the clock signal is applied to the semiconductor light-emitting elements 3, and optical signals corresponding to the clock signal are emitted. Optical signals emitted in response to the clock signal are detected simultaneously by the photo-detecting elements formed in the monolithic manner at every circuit unit 2, and the detecting signals are transmitted over the electric elements constituting a logic circuit as clock signals.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an optical/electrical integrated device that integrates an optical device and an electrical device.

[Technical background of the invention and its problems]

As the degree of integration of semiconductor integrated circuits increases year by year, one of the current problems is signal delay due to increased wiring length and load in high-density packaging, and design problems due to complicated wiring.
This includes increases in manufacturing costs.

In other words, in logic ICs, etc., the clock signal is a fundamental signal for system operation, and concurrency is required when distributing the clock signal within the chip, but high-density packaging This is a serious problem because the signal delay described above occurs and synchronization is lost.Also, since the clock signal is connected to at least one logic unit, the clock wiring that is added to the entire IC is a serious problem. The ratio is large, and is therefore an obstacle to high integration.In such conventional technology, there has been a desire for high-speed signal distribution that ensures sufficient simultaneity and is easy to distribute.

[Purpose of the invention]

The present invention has been made in view of the above points, and an object of the present invention is to provide an optical/vapor integrated device in which an original semiconductor device is integrated into an electronic integrated circuit.

That is, the purpose is to reduce the conventional signal delay and increase in wiring length by having the optical semiconductor element carry a common signal in the Kameko circuit, for example, a clock signal.

[Summary of the invention]

An integrated circuit consisting of a plurality of circuit units, one or more semiconductor light emitting elements integrally formed on a substrate on which this integrated circuit is formed, and semiconductor light emitting elements each integrally formed in a plurality of circuit units. and a semiconductor photodetector element that detects a common optical signal and supplies the detected signal to the circuit unit.

Moreover, this common optical signal is selectively detected only by the hand conductor photodetecting element, thereby obtaining an optical-polar-air-air integrated element.

〔Effect of the invention〕

According to the present invention, by supplying a clock from the optical semiconductor element 1 integrated into the logic circuit board, the optical clock can be propagated to the entire area of a chip of several millimeters square. So to speak, the delay difference is only a few tens of ps.
Almost simultaneous clocks can be distributed. Each circuit unit only needs to have one light receiving element for detecting light from the semiconductor light emitting element, and wiring related to tarock distribution is not required. This increases the effective area of the IC and further increases the degree of integration. In addition, in conventional taro clock wiring, if one part of the wiring is cut, all the circuit units connected to that wiring will malfunction, but the optical clock according to the present invention performs a function that can be called an individual distribution system. Therefore, such a problem does not occur. Furthermore, since the clock wiring of the IC can be omitted, the degree of freedom in design is increased and pattern layout becomes much easier.

In addition, the common optical signal is selective; by detecting it only with the dual detection element, it is possible to prevent malfunctions caused by the optical detection characteristics of the optical circuit elements in the circuit unit, which tend to have a slight optical detection characteristic. etc. can be prevented.

[Embodiments of the invention]

Embodiments of the present invention will be described below with reference to the drawings.

Figure 's1 shows a conceptual diagram for explaining the present invention in detail, and shows an integrated circuit board (1a) +: a circuit unit consisting of a plurality of logic elements) (2a) is integrated. Furthermore, one or more semiconductor light emitting elements (3a) are monolithically formed in the center of this integrated circuit board (la). Also, each circuit unit) (2a
) is integrally formed with a semiconductor photodetector element coupled to an electrical element. When a clock signal is supplied to each circuit unit (2a), this tarlock signal is applied to the semiconductor light emitting element (3a) to cause it to emit an optical signal according to the clock signal. The optical signal emitted in response to this clock (a) is detected simultaneously by a monolithically formed photodetector element for each of the plurality of circuits (2a), and this detected signal is detected as a clock signal. The light is supplied to the electrical elements that make up the logic circuit.Next, a cross-sectional view of a portion where the semiconductor light emitting device, the photodetecting device, and the FBT forming part of the Kameko circuit are monolithically formed is shown in Fig. 2(a). , and its equivalent direction path is shown in FIG. 2(b) E, and will be explained using this.

The LED part (1) has a double heterostructure, and the active layer (4) with a thickness of about 1 μm has a P-GaAfflAS layer (3 μm) with a thickness of about 3 μm.
) and an n -GaAAA human S layer (6) of about 10 μm. In addition, the LED has a shape in which the magnetic flow path is constricted by a P-Ga doll S layer (5) of about 2 μm in order to increase luminous efficiency. In order to receive the optical output from LHAD, the photodetector has an i-G of about 5 μm.
The P-I-Ni structure is formed between the P region formed by diffusing P dopants in the aAs layer (7) or by ion implantation and the n-(Japanese S layer) (6). The first stage FIT of the circuit unit has a source aυ, a drain H, and a drain H formed on i-GaAs by ion implantation.
It consists of a gate part @, and the gate part is connected to the P' magnetic pole of the PIN-PD (photodiode). Also PIN
-The N electrode of the FD is connected to the N bridge of the LED through a common HA (6).

It has an external terminal QJ. An equivalent circuit of the above circuit is shown in the lower part of FIG. In such a structure, by forming the P+ spiral pole of the PIN-PD deep in any location that requires light input, it is possible to receive light as if digging a well. . In addition, the 1-GaAs layer (with a force of several μm or more absorbs most of the light and does not reach the FET, so that the common optical signal can be selective (= reach only the photodetector element). .

FIG. 3 shows another embodiment of the present invention, in which (a) is a partial sectional view and (b) is an equivalent circuit diagram thereof. In the previous example, the light receiving section was a PIN-FD, but here a photoconductor (PC), which is easy to manufacture, is used. LED section,
The FET section is the same as in the previous embodiment.

1- GaAs jii G! The magnetic potential of the PC part in I and L
The 4th place of n-GaA-gAsJi (a) in ID is a general EA6, so an i-GaAJ 3-person S layer is required to separate the 1st place. Since the degree of insulation of this separation layer differs depending on the degree of I, if necessary, -R4P -GaA-gpersonsr-
It is also conceivable to put this between the i-GaAAAs layer (3) and the n-GaA4As layer C.

The i-GaAs layer is 5 μm deep in the PC part.
This is because it is thick, as in the first embodiment.

The equivalent circuit is shown at the bottom of FIG. 2, but the LED part and the circuit unit part have nothing in common. In this example as well, the common optical signal is selectively received only by the photoconverter.

As mentioned earlier, the gate of the FET itself has light receiving sensitivity, although it is small. Of course, if this FgT is to be used as a photodetecting element for circuit operation, the F'ET may be formed like the photodetecting element described above.

[Brief explanation of drawings]

FIG. 1 is a conceptual diagram for explaining one embodiment of the present invention, FIG. 2 is a partial sectional view of FIG. 1 and its equivalent circuit diagram, and FIG. 3 is a diagram showing another embodiment. 2... Substrate 1... Semiconductor light emitting element section 9.
...Semiconductor Photodetector Element Department 10...FEIT Department Representative Patent Attorney Noriyuki Chika (and 1 other person) No. 1
Figure 2nd ward

Claims (2)

[Claims] (1) An integrated circuit consisting of a plurality of circuit units, one or more semiconductor light emitting elements integrally formed on a substrate on which the integrated circuit is formed, and each integrated circuit formed integrally on the plurality of circuit units. a semiconductor photodetection element that detects a common optical signal from the semiconductor light emitting element and supplies the detected signal to the circuit unit, and the common optical signal is selectively detected only by the semiconductor photodetection element. An optical/electrical integrated device characterized by: (2) The semiconductor photodetector element is formed in a low concentration layer together with the circuit unit, and is a P-I-N photodiode or photoconductor formed deep within the low concentration layer so as to selectively receive light. An optical/electrical integrated device according to claim 1.