JPS61274410A - Amplifying circuit - Google Patents

Abstract

PURPOSE:To obtain an amplifying circuit which has a wide frequency band, and also is suitable for converting it to a semiconductor integrated circuit, by unifying and integrating extending from a pre-amplifier to a current mirror output. CONSTITUTION:The titled circuit is provided with a pre-amplifying means 21 of wide frequency band for amplifying an input signal, and plural voltage-current converting means 25 for converting a voltage level variation of an output signal from this pre-amplifying means 21 to a current variation, and amplifying its current signal by a current mirror circuit having a current amplifying operation being proportional to an effective area ratio of a transistor. Also, said pre- amplifying means 21 and plural voltage-current converting means 25 are formed on the same semiconductor substrate. The voltage-current converting circuit 25 is constituted of plural current mirror circuits, for instance, eight pieces of current mirror circuits which is connected in parallel, and even if an output current of one piece of current mirror circuit is a small current, a current flowing through a line lA corresponding to a current synthesizing means becomes a large current in proportion to the number of current mirror circuits.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to an amplifier circuit that can obtain a wide frequency band and high output, and is particularly suitable for use in video equipment such as various display devices, measuring equipment, etc. be.

[Background of the invention]

Television receivers are generally known as video equipment, but in recent years, display devices that display desired images on picture tubes based on video signals and color signals supplied from electronic computers have become commonplace. It has become. The video equipment described above requires an amplification circuit with a high frequency band and high amplification degree, so-called a video amplifier, in order to amplify high frequency video signals and color signals. As for television receivers, "Introductory color television" (Showa 57.
7.2 6th edition 1st printing Issue 1 Publisher: Tokyo Denki University Press,
An amplifier circuit as shown in pp. 187-140) is used.

By the way, the frequency band of a video amplifier used in a television receiver is approximately 4.5 MHz, as is known to those skilled in the art. As described above, since conventional video signal amplification circuits require capacitor coupling, there is a problem if the frequency band (several 10 Hz to several 10 MHz) is limited by the characteristics of the capacitor or the stray capacitor.

However, display devices used as data processing terminal equipment for electronic computers are required to provide high-resolution and high-definition images. For this reason, some devices have more than 1,000 scanning lines, and the shadow masks of picture tubes (cathode ray tubes) have also become finer.

In order to display high-resolution and high-definition images, it is necessary to minutely adjust the electron beam of the picture tube, and this requires a high-output video amplifier.
This was made clear through studies by the inventors.

In addition, in order to perform data processing at high speed, the frequency response must be accelerated, and for this purpose, a video amplifier with a wide frequency band (for example, 200 MHz) is required. This was revealed through examination.

On the other hand, not only display devices but also electronic devices in general tend to be smaller and lighter, and each circuit constituting the electronic devices has come to be formed using a semiconductor integrated circuit.

When implementing the video amplifier into a semiconductor integrated circuit, a PNP transistor with a large base charge and a low cutoff frequency is unsuitable for the video amplifier, and because it requires a large current to flow in order to obtain high output, it is particularly difficult to dissipate heat. It was found that the first prize required consideration.

Also, the video amplifier has at least a red (
R) signal, green (G) signal, and blue (B) signal, so-called three primary color signals, are often supplied, but it is sometimes necessary to improve crosstalk characteristics to reduce interference between the above signals. found. Furthermore, the three primary color signals R, G, and B are
It has also been found that since the signal is supplied to the video amplifier in a DC-blocked state, stable images can be projected by setting the fluctuation of the so-called pedestal level in accordance with the input level.

The present invention and the like have studied the above-mentioned technical problems and technical trends, and have found that a semiconductor integrated circuit technology called an ultra-fine process device is suitable for forming a semiconductor integrated circuit.

A video amplifier individually integrated into a semiconductor circuit is provided for each of the three primary color signals to reduce the amount of heat generated.In addition, by forming an NPN transistor using the ultrafine process device described above and configuring the video amplifier, a wide frequency band can be obtained. I realized that I would be able to do it. Furthermore, we have developed a circuit technology that can obtain high output power without providing a so-called power amplifier circuit within a semiconductor integrated circuit. Furthermore, regarding the setting of the pedestal level, we have developed a circuit technology that can detect the level of the output signal during the period in which the pedestal level appears, and use that level to stabilize the pedestal level of the video amplifier.

[Purpose of the invention]

An object of the present invention is to provide an amplifier circuit that has a wide frequency band and is suitable for semiconductor integrated circuit implementation.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Summary of the invention]

The outline of the invention disclosed in the present invention is as follows. That is, the first feature is that the output circuit has a cascode configuration of a current mirror and a high-voltage transistor, and since the current mirror can operate with a low voltage power supply, the preamplifier and the current mirror output are integrated. Achieve integrated integration.

Moreover, it will come to the surface in ultra-fine miniaturization, which is essential for higher frequencies.

The purpose is to avoid the restriction of a decrease in breakdown voltage of internal elements.

Furthermore, the second feature is that it has a built-in detection circuit that detects and amplifies pedestal level (DC bias) fluctuations, and uses the output of this detection circuit to control the bias of the first stage of the video amplifier. This is necessary when a plurality of display devices are driven by one D/A converter, in addition to preventing a decrease in dynamic range or a decrease in linearity characteristics essential for a video amplifier. The goal is to achieve high input impedance performance.

In addition, when integrating, gain adjustment terminals, bias adjustment terminals, multi-input multiplexer functions, etc. are added, and the range of applications is not narrowed due to high integration.
With fewer external parts, it is possible to apply the present invention to display devices or printers that require similar technology.

[Embodiments of the invention]

Hereinafter, one embodiment of an amplifier circuit to which the present invention is applied will be described with reference to FIGS. 1 to 4. Note that Fig. 1 is a block diagram of a display device to which the above amplifier circuit is applied, Fig. 2 is a block diagram showing the circuit configuration of the above amplifier circuit, Fig. 3 is a circuit diagram of the above amplifier circuit, and Fig. 4 is the circuit operation. FIG. 2 is a waveform diagram for explaining.

First, the overall structure of the °C display device will be explained with reference to FIG.

Reference numeral 1 denotes an electronic computer which supplies color signals representing the three primary colors of R, G, and B to the D/A converter 2 as digital signals. From the D/A converter 2, analog R, G,
The three primary color signals of B are obtained.

Each line fi1. 'Q, , fi, are supplied to the amplifier circuits 11, 12, and 13.

The amplifier circuits 11 to 13 are each formed of an individual semiconductor integrated circuit (hereinafter referred to as an IC). These are the three primary color signals R and G when the amplifier circuits 11 to 13 are formed on the same semiconductor substrate.

This is to reduce the possibility that B leaks to adjacent amplifier circuits and worsens crosstalk.

Further, by forming each of the amplifier circuits 11 to 13 on a separate IC, the heat generated from one IC is reduced, so there is an advantage that heat radiation becomes easier.

Three primary color signals R amplified by each amplifier circuit 11 to 13
, G, and B are □ at each cathode of the picture tube 3.

K2. K, and an image with colors corresponding to the levels of the three primary color signals R, G, and B is displayed.

By the way, although each of the above-mentioned amplifier circuits 11 to 13 is formed of an individual IC, they actually have the same circuit configuration. Therefore, in the description of the circuit configuration of each of the amplifier circuits 11 to 13, for convenience of explanation, the amplifier circuit 11 provided for amplifying the R signal will be described.

The circuit configuration of the amplifier circuit 11 will be described with reference to FIG. Note that the circles surrounding the numbers in the IC indicate external connection terminals.

Reference numeral 21 denotes a buffer amplifier, which is a preamplification means, and includes two amplifiers A and B. This circuit configuration is designed to display two images in an overlapping manner, so to speak, in a display device. This is for increasing the added value, and basically it may be one amplifier.The above R signal is supplied to the amplifier A via the DC blocking capacitor C1.

A switch circuit 22 is provided for selectively transmitting the output signals of the amplifiers A and H to the subsequent stage.

The switch circuit 22 includes two switch circuits +S
Z, but two switches S1.
Switching of S is performed by control signals Va and Vb. Note that the switch S1. Both of S and S can be turned on, or only one of them can be turned on.

) The resistor R installed outside the IC is used to set the gain of the amplifier circuit 11 to a desired value, but 29 is used to set the basic value, and fine adjustment of the gain is performed by adjusting the gain of the next stage. This is done by the control circuit 24.

The gain control circuit 24 is a gain circuit 24 that controls voltage gain.
a and a drive circuit 24b that drives the gain circuit 24a. Note that the drive circuit 24b controls the voltage gain of the gain circuit 24a by comparing the reference voltage Vref and the control signal Vc.

Reference numeral 25 denotes a voltage-current conversion circuit, which is composed of a plurality of current mirror circuits, that is, eight current mirror circuits connected in parallel in this embodiment. According to this circuit configuration, even if the output current of one current mirror circuit is small, the current flowing through the line Q□, which corresponds to the current combining means in the present invention, is proportional to the number of current mirror circuits. This will result in a large current.

Note that the current flowing through line a is the output circuit 26 of the next stage.
It sucks current from the source.

The output circuit 26 performs current-voltage conversion and supplies an output voltage Vo obtained as a voltage drop across a load resistor R to the cathode, and a part of the output voltage Vo is variable in order to obtain a feedback signal Vf. It is also supplied to the resistor V.

That is, the output voltage Vo includes the R signal and the synchronization signal, and there is also a Bedistal period in between. Looking at the input terminals of amplifiers A and B, the R signal is supplied as an AC component, so a DC bias must be set, and its voltage level must be set to the pedestal level. The feedback signal Vf is obtained for this purpose, but what actually needs to be fed back is only the pedestal level.The detection circuit 27 described below is provided to achieve the above purpose.

The detection circuit 27 receives a reference voltage B ref and a feedback signal vO.
a comparator 27a that obtains the pedestal level by comparison with
Switch S2 is turned on during the period when the pedestal level is obtained, and capacitor C2 maintains the pedestal level outside the pedestal level period.
, an amplifier 27b, and a control circuit 27c that switches the pedestal level on. Note that the control signal Vd is a signal that changes to high level during the bedistal period, and is supplied in synchronization with the bedistal period of the R signal.

Voltage Vp is a voltage corresponding to the pedestal level, and is applied to amplifier A via resistors Ra and Rb.

Set the bias voltage of B to a predetermined voltage level.

Note that the amplifier circuits 12 and 13 have the same circuit configuration as the amplifier circuit 11, but for convenience of illustration, terminals 5 to 10 and external devices connected to each of the above terminals are shown as parts. omitted.

Next, the circuit operation of the amplifier circuit 11 will be explained in more detail with reference to FIGS. 3 and 4. Since amplifiers A and B have the same circuit configuration, the respective circuit components are given the same reference numerals, and amplifier B is given the suffix '. Furthermore, a control circuit 23a.

23b and 27c have the same circuit configuration, so the power supply voltage Vcc supplied to the 21st terminal and the power supply voltage Vcc supplied to the 10th terminal are the same as the power supply voltage Vcc supplied to the output circuit 26, Lower voltage. and,
Two ground lines are provided between terminals 22 and 23, but this is because the current flowing through the voltage-current circuit 25 is a large current, and this is to reduce fluctuations in the GND level caused by this current. This is the purpose. That is,
Since the ground line in the IC has an inductance component, when a current including a high frequency component flows, a voltage drop occurs and the GND level fluctuates, which in turn becomes a cause of video fluctuation. However, by adopting the IC structure as in this embodiment, it is possible to reduce the above phenomenon.

In amplifier A, transistor Q1 is an input transistor, and resistor R-z corresponds to the voltage level of R signal.
, Rzx, h controls the current flowing through transistor Q2.

Since the transistors Q, , Q, constitute a current mirror circuit, the transistors Q, ~Q, and the resistors R1,
, R14 is also controlled by the transistor Q1.

On the other hand, the resistor Rl &#R11l t R1, and the transistors Q, , Q, also constitute a current mirror circuit, which defines the current flowing through the transistors Q,, Q,.

Assuming that the R signal goes high and the current flowing through the transistor Q2 increases, the current flowing through the transistor Q3 also increases, and the base current of the transistor Q decreases by that amount.

And from transistor Q, to transistor Q.

Since the current flowing through the transistor Q decreases, the decreased amount is absorbed from the diode-connected transistor Q. Therefore, the voltage drop across the resistor R1 becomes large, and this is supplied to the next stage as an output voltage.

In this case, the transmission of the output voltage is controlled by the control circuit 23a as follows.

When the control signal Va is at high level, the transistor Q z
Since the emitter voltage of
is applied to transistor Qi2 via.

Then, transistor Q□ operates in an on state, and transistor Q8. A base current is supplied to the circuit, and it operates in the on state. Note that transistor Q□ is transistor Q
This is to prevent the base voltage of , from rising above the collector voltage, and the resistor R1 supplies a bias voltage to the transistor Q1g.

Thus, transistor Q1. When is turned on,
The current flowing through the resistor R1 increases, and its voltage drop also increases. In this case, the base voltage of transistor Q21, which operates as switch S1, decreases, so that it is turned off and transmission of the output voltage of amplifier A is blocked.

On the other hand, when the control signal Va is switched to low level, the transistor QLX is turned on.

According to the current flowing through the transistor Q1□ of the power supply Vcc and the resistor R2, the sink current by the transistor Q7 and the base current of the transistor Q21 flow through the resistor R1, and the transistor Q8□ is turned on. In other words, the switch S is closed and the output voltage of the amplifier A is transmitted.

The above circuit operation is performed similarly for amplifier B and control circuit 23b. Therefore, by changing the levels of the control signals Va and Vb, the output voltage of one or both of the amplifiers A and B appears selectively on the line itt. Note that amplifier B operates in the same manner as amplifier A, and control circuit 23b operates in the same manner as control circuit 23a.

Further, the ground lines of the amplifiers A and B and the line of a constant voltage circuit 100, which will be described later, are connected to GND via a terminal No. 23, separately from other ground lines. This is because if the level fluctuation of the GND line occurs especially in the first stage, it will be directly amplified in the latter stage, resulting in large fluctuations in the image.
This was done to reduce this decrease.

The output voltage appearing on line Q1□ is then supplied to the gain circuit 24 via two resistors R and R1.

By the way, 31 is a constant current circuit, with a resistor R11°Ro
supplies a bias voltage to transistor Q3, and transistor Q via transistor Qsx. ~Transistor Q2. stabilizes the base current supplied to the and,
The resistors R, , , R□ define the current flowing through the transistor Qas, and the resistor R0 supplies the bias voltage. The transistor Qia*Qat t Qat is composed of N transistors, and the desired amount of current can be obtained depending on the number of transistors, in other words, in proportion to the emitter area.

22, regarding the gain circuit 24a, the emitter voltage VX of the transistor Q4z+04g is determined by the above output voltage, and the transistor Q41゜Q44
The emitter voltage Vy of is determined by the transistor Qas and the resistor R. The resistors R1 and R37 are load resistors, and the output voltage is obtained as a voltage drop across the resistor R1.

The output voltage of the gain circuit 2a is the voltage VX and the bias voltage Vs of the transistors Q41 to Q44.

The bias voltage V
The settings of s and vt are performed by the drive circuit 24b.

Resistor R41-Ram Transistor Q. t 0g29
QK2 transistor Q. Each base resistance R of eQts is
Configure a current mirror circuit, transistor Q, 4゜Q
Determine the current flowing through □, etc. Also, resistance R4! .

R44 supplies a bias voltage to transistor Q M 4, and at the same time, voltage Vrafzz is also supplied.

On the other hand, each emitter resistor R of the resistor B->-Q-s, 'r' transistor Q71°Q, Q, , transistor Qtx, transistor Q constitutes a current mirror circuit, and the transistors Q6, ~Qs4 The current flowing through the transistor Q is defined on the emitter side.
The collector side of 1□~Q a 4 is a transistor Q s
A predetermined current is defined by s t Q g s. Note that the base voltage of the transistor Q
Constant voltage circuit 100 configured by m* Q s *
is maintained at a predetermined voltage level by.

Then, the voltage Vs determined by the current flowing through the transistor Q$il Qa2 and the transistor Qa21
The voltage Vt determined by the current flowing through Qa4 is
As described below, it is determined by the voltages Vraf and Vref1□.

That is, the voltage Vraf is supplied to the bases of the transistors Q and □yQsz via the resistor R4, while
Transistor Q via resistors R4, ~R4. .

It is supplied to each base of Q and 4. Therefore, in this state, the transistor Q6□tQsz becomes high level by the voltage drop across the resistors R□ to Ro.

However, since transistor Q, 4 is in the on state,
A current mirror circuit composed of transistors Q, . transistor Q
Since the current flowing through sa is regulated to a predetermined amount of current, the output current is passed through resistor R4 to transistor Qs.
Flows to the base of ay Qa<.

Therefore, the current flowing through the transistor Q64g Q@g also increases, and the voltage Vt increases accordingly. Therefore, the resistors R4 and R4 function as so-called attenuators, and the attenuator switching operation is performed by the voltage Vref□1, and the voltages Vs and Vt correspond to the attenuator output.

In the gain circuit 24a, the transistor Q41 is turned on by the voltage difference of Vs-Vy, and the current flowing through the resistor R3 is determined, and at the same time, the transistor Q4# is also turned on by the voltage difference of Vt-Vx. Resistance R
A current equal to the sum of transistors Q44#Qa1 flows through ay, and the voltage drop due to resistor R1 is magnified. That is, the voltages Vs and Vt are used to double the amplification. Also, as is clear from the above circuit operation,
The gain circuit 24 also performs a current-voltage conversion operation.

The output voltage of the gain circuit 24 is supplied to the ninth stage current-voltage conversion circuit 25, and an offset voltage adjustment circuit 31 is also associated with this circuit.

In the adjustment circuit 31, the resistors R, 1, R, and Y supply a bias voltage to the transistor (Lit Q**).

Resistors R,,,R,4 supply a bias voltage to transistors Q,3. Then, if the resistance VR is controlled.

Transistor Q. Since the bias voltage of changes.

The current flowing through the transistor Q*t*Q*z% resistor R1 is controlled, and the voltage drop across the resistor R0 is adjusted.

This voltage drop is used for offset adjustment of the voltage-current conversion circuit 24.

Next, the circuit operation of the voltage-current conversion circuit 25 will be explained.

However, one circuit consists of seven sets of voltage-current conversion circuits 25a to 2.
5h and have the same circuit configuration, only one circuit 25a will be explained.

Transistoro 1□1. Q engineering 1. is the power supply Vcc
, is supplied, and resistor R1t-Rst)' transistor Q
ttz+Q11. The current flowing through the gain circuit 24a is controlled by the output voltage of the gain circuit 24a. Since transistors Q1□2, Q4, and Qll form a current mirror circuit, transistors Q□8. By transistor Q
1□2~Q Engineering 1. By controlling the base current of
Transistor Q28. The base current of is also controlled. At this time, depending on the above adjustment voltage, the transistor
The current flowing through Qiill is controlled and transistor Q1
1. Fine adjustment of the base current is made.

The transistor Q1□ supplies a base current to the transistor Q□sty Qixx forming the current mirror circuit, and the amount of current changes in accordance with the output voltage of the gain circuit 24. Therefore, the output circuit 26. The current flowing from the line n1 through the transistor Q1zzs and the resistor R1 changes in accordance with the output voltage of the gain circuit 24 and, going back further, with the voltage level of the R signal.

For convenience of explanation, one voltage/current conversion circuit 25a
Assuming that Ia is the current drawn in, the same amount of current is drawn by each of the voltage-current conversion circuits 25b to 25h. As a result, the amount of current sucked from the output circuit 26 via line Q1 is 8Ia.

and an N-channel MOS transistor Qa that eliminates the influence of the resistor R1 and the output capacitor from the power supply Vccm;
The current 8Ia is sucked by the voltage-current conversion circuit 25 through the transistor Qb whose base is grounded in an alternating current manner.・Then, as mentioned above, the output voltage Vo
is obtained, which is supplied to the cathode of the picture tube.

Resistance R1°.

VR constitutes a feedback circuit for clamping the pedicle level, and a feedback signal Vf having a waveform as shown in FIG. 4 is supplied to the detection circuit 27. Note that the pedestal level corresponds to P in the figure. 'Next, the circuit operation of the detection circuit 27 will be explained.

Resistor R, □, Transistor Q, 1 to Q□3. , and each transistor 2,~Q,. A resistor R connected to the base of the resistor R constitutes a constant current circuit.

Transistors Q i419 Q L 4 Z constitute a comparison circuit 27a, and resistors R1Q1. Q1□ is the reference voltage V
rsf. Transistor Q14a, Q
144 is a clamper whose bias voltage is connected to a resistor R
1°.

R114, supplied by transistor Q1□.

When the comparison circuit 27a detects the pedestal level P, the transistor Q□46 is driven.

A current is supplied to the switch S.

On the other hand, the transistor Q constituting the switch S<t
t Qt4m includes a transistor Qtos t QIS
A base current is supplied from a constant current circuit composed of l+Q resistor R1, and switch S3 is connected to control circuit 27c.
Opening/closing control is performed by.

The control signal Vd is set to a low level corresponding to the period of the bedicle level P, and is kept at a high level during other periods.

When the control signal Vd is at a high level, the control circuit 23a
The circuit operation described above is also performed in the control circuit 27c, and the transistor Q□5 is turned on.

On the other hand, during the period when the control signal Vd is at a low level, the transistors Q1. 〃 is in the off state.

And transistor Q1. When 〃 is off, the transistor provided as a level shifter (□., Q8□
There is no current sinking through the transistor Q□, 7
turns on, and transistor Q14m turns off.

Therefore, the Bedistal level of the output signal of the comparator circuit 27a is charged to the capacitor C8 provided as a storage element via the resistor R187, and the level is stored.

Regarding the above operation, when transistor Q08 is on, transistor Q0. turns on and resistor Rx
*t, h The capacitor C1 is discharged via the transistor Q1411eQ1□ and the resistor R. This operation is repeated, and the voltage is applied to the transistor Q1,1 forming the comparison circuit via the resistor R11 to the level of the feedback signal Vf. A corresponding DC voltage will be supplied. Transistor Q□.

The bias voltage is resistor Rx3m transistor Q engineering. It is maintained at a predetermined voltage level by a constant voltage circuit made up of the following.

Therefore, transistor Q14. The current flowing through QL@2 changes depending on the charging voltage of the capacitor C2, and the level of the change corresponds to the level change of the feedback signal Vf.

Transistor Q 1@* e Qtss s Qxss
, resistors R1,5 constitute a current mirror circuit, so the above current change is caused by the current change from transistor Q1.6 to resistor Ra.
.

This results in a change in the base current supplied to the transistors QU and Q1' via Rb. That is, amplifier A.

The B DC bias is maintained at a predetermined level value by the Bedistal level of the R signal. Therefore, even if the R signal is supplied as an alternating current component as described above, fluctuations in the image displayed on the picture tube can be reduced.

Above, one embodiment of the present invention has been described in detail.

Hereinafter, the features of the present invention and the effects obtained thereby will be specifically explained based on the above embodiments.

In FIG. 3, the output circuit configuration of one video amplifier is a current mirror output transistor Q.

, a bipolar transistor Q1, and a MOS transistor Q are coupled in cascode.

Transistors Q and Q can be put to practical use even if one of them is omitted, but in the embodiment, the bipolar transistor Q is cascoded to avoid non-linearity of the gain due to the round effect of Q11□. Furthermore, for higher voltage resistance, M
This is a cascode version of the OS transistor Q1.

According to such a configuration, the linearity of the output does not depend on the value of the output emitter resistance R1, and R,7 is, for example, 1.
Even if it is about Ω, it can be put into practical use sufficiently; for example, even if a current of 0.3 A is passed, the voltage drop is 0.3 V. Therefore.

The collector voltage required for Q tit is about 5 V, which is sufficient, and even if this current mirror output transistor Qixi is integrated with the preamplifier circuit, the power consumption is very small.
Since it can operate with a low power supply voltage, it is possible to integrate the preamplifier and the output current drive transistor on the same chip using a miniaturization process that is advantageous for increasing frequencies.

Next, input Q141, Ql, 6 and Q23. The detection unit 27 which outputs Q of the first stage of the amplifier with its output,
It is configured to control the bias of the buffer amplifier 21 to the voltage-current conversion circuit 25 and the output section 2.
6 are all DC coupled. According to this configuration, even if a DC-blocked input is received, the bias voltage at the pedestal level of each part can operate at a constant level without causing fluctuations in the operating bias voltage caused by DC blocking. This has the effect of minimizing the range and allowing operation with a low voltage power supply.

In addition, in order to control the bias of the transistor Q1, the resistor Ra connected to the detection unit 27 can be set to a high resistance value of 1, for example, about 100 Ω, and the purpose can be sufficiently achieved. This has the effect of increasing the input impedance of the amplifier by about one order of magnitude, reducing input reflection loss, and reproducing high-precision images with low reflection distortion.

Furthermore, since the effect of keeping the bias voltage constant at the pedestal level is also applied to the input of the gain control circuit 24a, the following effects can be obtained. Namely.

The input/output voltage gain G of the gain control section 31 is the same as that of the drive circuit 2.
Under a constant output condition of the drive circuit 24b, K can be approximately expressed as a proportional constant determined by the output condition of the drive circuit 24b.

However, even more secretly.

R,+r,,.

However, r3.3 is the emitter resistance of transistor Q43, and r8.7 is Q. varies depending on the emitter current flowing through the

Therefore, if the input at the pedestal level, that is, the difference between the emitter voltage of Q,3 and the emitter voltage of Qo, is not constant, the emitter current of 04m will fluctuate, and as a result, as is clear from equation (2), However, according to the present invention, since the output of the detection circuit 27 is fed back to the first stage of the buffer amplifier before the input section of the gain control circuit 24a, it is possible to prevent the gain fluctuation. There is.

Next, in FIG. 2, the buffer amplifier 21 is A.

According to the 0-wire configuration, each buffer amplifier A, Since the same bias is applied to H, when switching between A and B, there is an effect of preventing hazards such as fluctuations in the output potential and flickering on the output image.

In addition, in FIG. 2, from the buffer amplifier 21 to the gain circuit 2
4a, each terminal is drawn out and the connection is made by an external resistor R1. According to this configuration, by changing the resistance of R1, it is possible not only to expand the setting range of the total gain, but also to easily adjust the frequency-gain characteristics by, for example, connecting a capacitor in parallel with R1. There is.

Next, the offset adjustment circuit 31 shown in FIG. According to this configuration, the output terminal level can be stabilized by coupling the output terminal 24 of the detection circuit 27 and the terminal 7 with an external resistor or the like. That is, as explained above. In the case where the detection circuit 27 is coupled only to the buffer amplifier 21, when the gain is narrowed down to zero by the intermediate gain control circuit 24a, there is a possibility that the stabilization function of the output output level will be lost. By adding coupling, this can be prevented, and even if the gain control range is narrowed down to zero, the output output level can be stabilized.

Although the invention made by the present inventor has been specifically explained above based on examples, it goes without saying that the present invention is not limited to the above-mentioned examples, and can be modified in various ways without departing from the gist thereof. stomach.

For example, more buffer amplifiers may be provided.

The same applies to the control circuit 23. Furthermore, the number of voltage-current conversion circuits can also be changed arbitrarily depending on the purpose of use. As mentioned earlier, the R2O and B amplifier circuits may be provided on the same chip.

In the above description, the invention made by the inventors of the present invention was mainly applied to a video amplifier, which is the field of application in which the invention is based.

The present invention is not limited thereto, and can be used, for example, in measurement equipment that requires a broadband amplifier circuit, such as an oscilloscope.

Furthermore, it can also be used in communication devices using digital signals.

It may also be used in audio equipment.

〔Effect of the invention〕

The rod conductor-integrated amplifier circuit of the present invention allows wide frequency band and high output amplification.

[Brief explanation of drawings]

FIG. 1 shows a block diagram of a display device showing an embodiment of the present invention, FIG. 2 shows a block diagram of an amplifier circuit applied to the display device, and FIG. 3 shows a circuit diagram of the amplifier circuit. FIG. 4 shows a waveform diagram explaining the circuit operation. 1... Electronic computer, 2... D/A converter, 3...
Picture tube, 11... amplifier circuit, 21... buffer amplifier,
22... Switch circuit, 23... Control circuit, 24...
...Gain control circuit, 25...Voltage-current conversion circuit, 2
6...Output circuit. 27...detection circuit, j2. ...signal synthesis means, Vf
...Feedback signal, Vd, Va, Vb...Control signal, R
...Input signal, Vo...Output voltage, Q1~011
m...Transistor, R~R137...Resistor, I
C...Semiconductor integrated circuit.

Claims (1)

[Claims] 1. In an amplifier circuit that amplifies a wide frequency band signal,
A wide frequency band preamplification means for amplifying an input signal, and a current amplification effect that converts a voltage level change of an output signal from the preamplification means into a current change, and converts the current signal into a current change proportional to the effective area ratio of the transistor. an amplifier circuit comprising: a plurality of voltage-to-current conversion means for amplification by a current mirror circuit having a current mirror circuit; the pre-amplification means and the plurality of voltage-to-current conversion means are formed on the same semiconductor substrate. . 2. In an amplifier circuit that amplifies a wide frequency band signal,
A wide frequency band preamplification means for amplifying an input signal, a gain control means for controlling the gain of an output signal from the preamplification means, and a voltage level conversion of the output signal from the gain control means based on a current change. a plurality of voltage-to-current conversion means for converting and amplifying the current signal by a current mirror circuit having a current amplification effect proportional to the effective area of the transistor; and combining the output currents of the plurality of voltage-to-current conversion means; A current synthesizing means for obtaining a high output current, and an output signal obtained by current-to-voltage conversion of the high output current from the current synthesizing means are compared with a reference voltage to define a predetermined voltage level. a detection means applied to an input of the preamplification means to define a DC level of the input signal, the preamplification means, the gain control means, and the plurality of voltage-current conversion means; An amplifier circuit characterized in that the current combining means and the detecting means are formed on the same semiconductor substrate. 3. The amplification according to claim 2, wherein a video signal is input as the input signal, the reference voltage of the detection means is set to a pedestal level, and the output signal is applied to the cathode of the picture tube. circuit. 4. In claim 2, the detection means:
A comparison circuit that compares an output signal with a reference voltage, a switch circuit that controls transmission of the output voltage of the comparison circuit, and a control circuit that controls opening and closing of the switch circuit in response to a predetermined level position of the output signal. a storage element that stores the voltage level of the voltage signal supplied via the switch circuit; and a signal transmission path that defines the DC level on the input side of the preamplifier based on the stored voltage level. An amplifier circuit characterized by comprising a feedback path. 5. In claim 2, terminals are provided at the output of the preamplifier and the input of the gain control means, and are drawn out to the outside, so that the connection between the preamplifier and the gain control means is performed externally. An amplifier circuit featuring: 6. In claim 2, the output of the detection means,
and an amplifier circuit characterized in that an adjustment control terminal for adjusting the offset of the voltage-current conversion means is provided and drawn out to the outside, so that the output of the detection means and the offset adjustment control terminal can be coupled externally.