JPS61269372A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS61269372A JPS61269372A JP60110467A JP11046785A JPS61269372A JP S61269372 A JPS61269372 A JP S61269372A JP 60110467 A JP60110467 A JP 60110467A JP 11046785 A JP11046785 A JP 11046785A JP S61269372 A JPS61269372 A JP S61269372A
- Authority
- JP
- Japan
- Prior art keywords
- collector
- emitter
- base
- substrate
- conductivity type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 14
- 239000000758 substrate Substances 0.000 claims abstract description 16
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 5
- 239000013078 crystal Substances 0.000 claims description 5
- 229910052710 silicon Inorganic materials 0.000 claims description 5
- 239000010703 silicon Substances 0.000 claims description 5
- 230000015556 catabolic process Effects 0.000 abstract description 2
- 238000004519 manufacturing process Methods 0.000 abstract 1
- 238000009792 diffusion process Methods 0.000 description 6
- 230000000694 effects Effects 0.000 description 2
- 206010011878 Deafness Diseases 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〔技術分野〕
本発明は半導体装置、特にマルチコレクタ横形pnp)
ランジスタ又はこれを含むICに関する。[Detailed Description of the Invention] [Technical Field] The present invention relates to semiconductor devices, particularly multi-collector horizontal PNP).
The present invention relates to transistors or ICs including transistors.
横形pnp)ランジスタは、コロナ社発行、1979年
4月5日初版、集積回路工学(1)P165〜p168
に記載されているとと<、n型シリコン結晶基板(エピ
タキシャル層)をベースとシテ、基板表面にp型層から
なるコレクタ及びエミッタを横方向に対向させたもので
ある。コレクタな複数に分割したマルチコレクタ横形P
NP)ランジスタは複数段の回路に対してコレクタ電流
を所定比で配分して供給する場合に使われる。Horizontal pnp) transistor, published by Corona Publishing, first edition April 5, 1979, Integrated Circuit Engineering (1) P165-168
, an n-type silicon crystal substrate (epitaxial layer) is used as a base, and a collector and an emitter made of a p-type layer are laterally opposed to each other on the surface of the substrate. Multi-collector horizontal P divided into multiple collectors
NP) transistors are used to distribute and supply collector current to multiple stages of circuits at a predetermined ratio.
第5図、第6図はコレクタを2等分割化した横形pnp
)ランジスタを示し、第7図はその等価回路を示す。1
はn聾シリコン結晶基板(エピタキシャル層)、2はp
散拡散層からなるエミッタ、3 a + 3 bは電流
分配比1:1でエミッタから対角度で2等分割されたp
型層からなるコレクタである。4はn型拡散層からなる
ベース取り出し部、5は表面酸化膜、6はA!かうなる
電極である。Figures 5 and 6 show a horizontal pnp in which the collector is divided into two equal parts.
) shows a transistor, and FIG. 7 shows its equivalent circuit. 1
is n deaf silicon crystal substrate (epitaxial layer), 2 is p
The emitter consisting of a diffused diffusion layer, 3a + 3b, is divided into two halves diagonally from the emitter with a current distribution ratio of 1:1.
It is a collector consisting of a type layer. 4 is a base extraction portion consisting of an n-type diffusion layer, 5 is a surface oxide film, and 6 is A! This is a similar electrode.
このうち、コレクタ3a(Ct)はベース4とA1電極
すにより短絡しであるため、コレクタ3b(Ct)<比
べて高い電圧が加わる。この場合、コレクタ3a、3b
のベース幅(WB)を創造マスク上で同一にしておくと
、印加電圧の高いコレクタ3&の方の空乏層7の延びが
大きく、したがって実効ベース@WBIが他方のコレク
タ3b@の空乏層の延びによる実効ベース幅WBt よ
り狭くなり、hFmが上って1=1の電流分配比がずれ
てしまうことになる。Among these, since the collector 3a (Ct) is short-circuited between the base 4 and the A1 electrode, a higher voltage is applied than the collector 3b (Ct). In this case, collectors 3a, 3b
If the base width (WB) of is kept the same on the creation mask, the extension of the depletion layer 7 of the collector 3& where the applied voltage is higher is larger, and therefore the effective base @WBI is the extension of the depletion layer of the other collector 3b@. Therefore, the effective base width WBt becomes narrower than the effective base width WBt, and hFm increases, causing the current distribution ratio of 1=1 to deviate.
本発明は上記した問題を克服するためになされたもので
あり、その目的は電流分配比のずれないマルチコレクタ
半導体装置の構造な提供することKある。The present invention has been made to overcome the above-mentioned problems, and its object is to provide a structure of a multi-collector semiconductor device in which the current distribution ratio does not shift.
本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば下記のとおりである。A brief overview of typical inventions disclosed in this application is as follows.
すなわち、nW半導体基板(エピタキシャル層)をベー
スとして、この基板表面の一部に形成されたp型層をエ
ミッタとし、上記基板表面の他の一部にエミッタに対向
して分割形成された複数のp型層をコレクタとする半導
体装置において、上記分割による各コレクタ電流が一定
比となるように実効ベース幅を変えであるものである。That is, an nW semiconductor substrate (epitaxial layer) is used as a base, a p-type layer formed on a part of the surface of this substrate is used as an emitter, and a plurality of layers are formed separately on another part of the substrate surface facing the emitter. In a semiconductor device having a p-type layer as a collector, the effective base width is changed so that each collector current resulting from the above division is at a constant ratio.
〔実施例1〕
第1図1g2図は本発明の一実施例を示すものであって
、第1図はコレクタを2等分割化した横形pnp)ラン
ジスタの拡散パターンを示す平面図、第2図は第1図に
おけるA−A断面図である。[Embodiment 1] Fig. 1g2 shows an embodiment of the present invention, in which Fig. 1 is a plan view showing the diffusion pattern of a horizontal pnp) transistor in which the collector is divided into two parts, and Fig. 2 is a sectional view taken along line A-A in FIG. 1.
同図における各構成部分は前掲第5図、第6図で示した
横形pnp)ランジスタのそれと共通するから、これら
は同一の指示番号記号を用いである。Each component in this figure is the same as that of the horizontal pnp (pnp) transistor shown in FIGS. 5 and 6 above, so the same designation numbers and symbols are used for these components.
第1図に示すように、エミッタp 型層2と一方のコレ
クタp 型層3bの間の耐圧CBVCKO)で決定され
たベース幅WB! K対し、空乏層7の拡がり分を考慮
してコレクタp 型層3aは装造iスク上で見かけのベ
ース幅がWB、>WB、となるよう忙形成する。As shown in FIG. 1, the base width WB! is determined by the breakdown voltage CBVCKO) between the emitter p-type layer 2 and one collector p-type layer 3b! In contrast, considering the expansion of the depletion layer 7, the collector p-type layer 3a is formed so that the apparent base width is WB, >WB, on the built-in i-sk.
このよう釦、マスクの上でのベースの幅はWB 。 The width of the base above the button and mask is WB.
>WBt となっているが、コレクタ3a、3bに加わ
る電圧差により、空乏層広がりの幅が異なるため、実効
ベース幅はW B r =W B 、となる。この結果
、コレクタ3a、31)のhFKは同一となり電流分配
比のズレを防止することができる。>WBt, but since the width of the depletion layer spread differs depending on the voltage difference applied to the collectors 3a and 3b, the effective base width becomes W B r =W B . As a result, the hFKs of the collectors 3a and 31) are the same, and it is possible to prevent a deviation in the current distribution ratio.
〔実施例2〕
第3図は本発明の他の一実施例を示すものであって、コ
レクタを2等分割化した横形pnp)ランジスタの拡散
パターンを示す平面図である。[Embodiment 2] FIG. 3 shows another embodiment of the present invention, and is a plan view showing a diffusion pattern of a horizontal pnp transistor in which the collector is divided into two equal parts.
この実施例では、エミッタp 型層2とコレ2+
りp W層3 a e 3 bとの間の見かけ上のベー
ス幅WB、、WB、を等しくとる一方、エミッタに対向
するコレクタの対辺長−e(又は対角度θ)を変えるこ
とにより空乏層広がり幅差による実効ベース幅の差を分
配角度(コレクタ対辺長の差)で補正したものである。In this embodiment, the apparent base widths WB, WB, between the emitter p-type layer 2 and the pW layer 3a e 3b are set to be equal, while the opposite side length of the collector facing the emitter is - By changing e (or opposite angle θ), the difference in effective base width due to the difference in depletion layer spread width is corrected by the distribution angle (difference in opposite side length of the collector).
すなわち、ベースと短絡される側のコレクタ3aのエミ
ッタへの対辺長21を他のコレクタ3bの対辺長!、よ
りも短かくすることで実質的なコレクタ電流比はIC1
=IC,とし、電流分配比のズレを防止することができ
る。That is, the length 21 of the side opposite to the emitter of the collector 3a that is short-circuited with the base is the length 21 of the side opposite the emitter of the other collector 3b! By making it shorter than , the effective collector current ratio becomes IC1
=IC, and it is possible to prevent a deviation in the current distribution ratio.
以上本発明者によってなされた発明を実施例にもとづき
具体的に説明したが、本発明は上記実施例に限定される
ものではなく、その要旨を逸脱しない範囲で種々変更可
能であることはいうまでもない。Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor.
たとえば、!4図はコレクタを4等分割した横形pnp
)う/ジスタに適用した場合の例を示す拡散パターンの
平面図である。for example,! Figure 4 shows a horizontal pnp with the collector divided into four equal parts.
) is a plan view of a diffusion pattern illustrating an example of application to U/D.
+ この場合、4分割されコレクタp 減拡散層3m。+ In this case, it is divided into four parts: collector p and 3 m of reduced diffusion layer.
3tz3c、3dのうち、3aはエミッタに対向する見
かけ上のベース幅WBをかえて実効ベース幅が全て等し
くなるようにして、各コレクタのhyzを同一ならしめ
、電流分配のずれをなくした。3tz Of 3c and 3d, 3a changes the apparent base width WB facing the emitter so that all the effective base widths are equal, and the hyz of each collector is made the same to eliminate deviation in current distribution.
本発明はリニアIC全般に応用することができる。 The present invention can be applied to linear ICs in general.
第1図、第2図は本発明の一実施例な示し、第1図は平
面図、第2図は第1図におけるA−A断面図である。
第3図、第4図は本発明の他の実施例をそれぞれ示す平
面図である。
第5図、第6図はこれまでのマルチコレクタ・横形PN
Pトランジスタの例を示し、第5図は平面図、第6図は
同A−A断面図である。
第7図は第5図に等価の回路図である。
l・・・n型シリコン結晶基板(エピタキシャル層)。
2・・・エミッタp 型層、3・・・コレクタp 型層
、4・・・ベースn 型層。
第 1 図
第 2 図
第 3 図
第 4 図1 and 2 show one embodiment of the present invention, FIG. 1 is a plan view, and FIG. 2 is a sectional view taken along the line AA in FIG. 1. FIGS. 3 and 4 are plan views showing other embodiments of the present invention, respectively. Figures 5 and 6 show conventional multi-collector horizontal PNs.
An example of a P transistor is shown, and FIG. 5 is a plan view, and FIG. 6 is a sectional view taken along line A--A. FIG. 7 is a circuit diagram equivalent to FIG. 5. l...N-type silicon crystal substrate (epitaxial layer). 2...Emitter p-type layer, 3...Collector p-type layer, 4...base n-type layer. Figure 1 Figure 2 Figure 3 Figure 4
Claims (1)
面の一部に形成された第2導電型領域をエミッタとし、
上記基体表面の他の一部に上記エミッタに対向して形成
され、複数に分割された第2導電型領域をそれぞれコレ
クタとする半導体装置であって、分割された各コレクタ
電流が所望の比となるように各コレクタとエミッタとの
距離が異なった上記第2導電型領域を具備していること
を特徴とする半導体装置。 2、上記基体はn型シリコン結晶基板(エピタキシャル
層)からなり、上記エミッタ及び、コレクタはp型層か
らなる特許請求の範囲第1項に記載の半導体装置。 3、第1導電型半導体基体をベースとして、上記基体表
面の一部に形成された第2導電型領域をエミッタとし、
上記基体表面の他の一部に上記エミッタに対向して形成
され複数に分割された第2導電型領域をコレクタとする
半導体装置であって、上記分割による各コレクタ電流が
一定の比となるようにエミッタに対向するコレクタ対辺
長(分配角度)をもたせて上記第2導電型領域が形成さ
れていることを特徴とする半導体装置。 4、上記基体はn型シリコン単結晶基板(エピタキシャ
ル層)からなり上記エミッタ及びコレクタはp型層から
なる特許請求の範囲の第3項に記載の半導体装置。[Claims] 1. A semiconductor substrate of a first conductivity type is used as a base, and a region of a second conductivity type formed on a part of the surface of the substrate is used as an emitter;
A semiconductor device in which a plurality of divided second conductivity type regions formed opposite to the emitter on another part of the surface of the substrate serve as collectors, wherein each of the divided collector currents has a desired ratio. A semiconductor device comprising the second conductivity type regions having different distances between the respective collectors and emitters such that the distances between the respective collectors and the emitters are different from each other. 2. The semiconductor device according to claim 1, wherein the base body is an n-type silicon crystal substrate (epitaxial layer), and the emitter and collector are p-type layers. 3. A semiconductor substrate of a first conductivity type is used as a base, and a region of a second conductivity type formed on a part of the surface of the substrate is used as an emitter;
A semiconductor device having, as a collector, a second conductivity type region formed on another part of the surface of the substrate opposite to the emitter and divided into a plurality of parts, such that each collector current resulting from the division is at a constant ratio. A semiconductor device characterized in that the second conductivity type region is formed so as to have a length (distribution angle) of the opposite side of the collector facing the emitter. 4. The semiconductor device according to claim 3, wherein the base body is an n-type silicon single crystal substrate (epitaxial layer), and the emitter and collector are p-type layers.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60110467A JPS61269372A (en) | 1985-05-24 | 1985-05-24 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP60110467A JPS61269372A (en) | 1985-05-24 | 1985-05-24 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61269372A true JPS61269372A (en) | 1986-11-28 |
Family
ID=14536445
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP60110467A Pending JPS61269372A (en) | 1985-05-24 | 1985-05-24 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61269372A (en) |
-
1985
- 1985-05-24 JP JP60110467A patent/JPS61269372A/en active Pending
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