JPS61265825A - Back-surface treating apparatus for semiconductor substrate - Google Patents
Back-surface treating apparatus for semiconductor substrateInfo
- Publication number
- JPS61265825A JPS61265825A JP10860585A JP10860585A JPS61265825A JP S61265825 A JPS61265825 A JP S61265825A JP 10860585 A JP10860585 A JP 10860585A JP 10860585 A JP10860585 A JP 10860585A JP S61265825 A JPS61265825 A JP S61265825A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- light
- focal points
- back surface
- converging
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 44
- 239000004065 semiconductor Substances 0.000 title claims abstract description 39
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 9
- 239000010453 quartz Substances 0.000 abstract description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 4
- 238000005247 gettering Methods 0.000 abstract description 4
- 229910052710 silicon Inorganic materials 0.000 abstract description 4
- 239000010703 silicon Substances 0.000 abstract description 4
- 230000003749 cleanliness Effects 0.000 abstract description 3
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 239000006061 abrasive grain Substances 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000002245 particle Substances 0.000 description 3
- 238000004381 surface treatment Methods 0.000 description 3
- 238000010521 absorption reaction Methods 0.000 description 1
- 239000007795 chemical reaction product Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
- Cleaning Or Drying Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体基板裏面処理装置に関し、特に裏面ゲッ
タリング処理装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor substrate backside processing apparatus, and particularly to a backside gettering processing apparatus.
従来、半導体基板の裏面ゲッタリング処理装置において
、裏面歪量の制御精度が高く多量の半導体基板処理がで
きる装置としては、第２図にその模式断面図を示すよう
な装置がある。この装置では半導体基板１０を支える支
持具２０がるり、半導体基板裏面６０に相対して砥粒〔
シリカ〕吹き出し口４０が設置されている。圧縮空気を
用いて砥粒を砥粒吹き出し口４０から吹き出し、砥粒の
流れ５０は半導体基板１０に衝突し半導体基板裏面６０
に歪場を形成する。Conventionally, among backside gettering processing apparatuses for semiconductor substrates, there is an apparatus as shown in FIG. 2, a schematic cross-sectional view of which is capable of processing a large amount of semiconductor substrates with high control accuracy of the backside strain amount. In this device, a support 20 supporting a semiconductor substrate 10 is placed around the abrasive grains [
Silica] A blowout port 40 is installed. Abrasive particles are blown out from the abrasive outlet 40 using compressed air, and the flow 50 of the abrasive particles collides with the semiconductor substrate 10 and hits the back surface 60 of the semiconductor substrate.
form a strain field.
上述した従来の半導体基板裏面処理装置は、半導体基板
裏面の歪量の制御精度が高いとはいえ、制御するために
は砥粒の材質、砥粒の大きさ、圧縮空気の圧力、吹き出
しロサイズ、半導体基板までの距離等の多くのパラメー
タを最も効果あるように設定する必要があった。そのた
、め、デバイス製造工程、半導体基板の特長等によりそ
れぞれのパラメータの最適条件を決める複雑な作業が必
要でめり九。Although the above-mentioned conventional semiconductor substrate backside processing equipment has high accuracy in controlling the amount of distortion on the backside of the semiconductor substrate, it is necessary to control the amount of distortion on the backside of the semiconductor substrate by changing the material of the abrasive grains, the size of the abrasive grains, the pressure of compressed air, the blowout size, Many parameters, such as the distance to the semiconductor substrate, had to be set to be most effective. In addition, complicated work is required to determine the optimal conditions for each parameter depending on the device manufacturing process, the characteristics of the semiconductor substrate, etc.
また、裏面処理中に砥粒の汚染が半導体基板の表面活性
層にまでおよび表面活性層を汚染する問題があった。そ
のため、デバイス製造工程の途中で裏面処理を行うこと
ができなかった。さらにまた、裏面処理中はその性質上
清浄度を保つことが困難であるという欠点があった。In addition, there is a problem that contamination of the abrasive particles during back surface treatment reaches the surface active layer of the semiconductor substrate and contaminates the surface active layer. Therefore, back surface treatment could not be performed during the device manufacturing process. Furthermore, there is a drawback that it is difficult to maintain cleanliness during back surface treatment due to its nature.
〔問題点を解決するため２手段〕
本発明の半導体基板裏面に歪場を導入する半導体基板裏
面処理装置は、光源を具備し、前記光源と前記半導体基
板に前記光源からの元が前記半導体基板裏面上に複数個
の焦点を結ぶように配置した光集束装置を設けたことを
特徴としている。[Two Means for Solving the Problems] A semiconductor substrate backside processing apparatus for introducing a strain field to the backside of a semiconductor substrate according to the present invention is provided with a light source, and a source from the light source is directed between the light source and the semiconductor substrate. It is characterized by the provision of a light converging device arranged so as to connect a plurality of focal points on the back surface.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第１図は本発明の一実施例の概略断面図である。FIG. 1 is a schematic cross-sectional view of one embodiment of the present invention.
半導体基板１を支える支持具２があり、これらが石英チ
ャンバ３内に収納されている。石英チャンバ３の外側に
赤外線ランプ４があり、赤外線ランプ４と半導体基板１
間に光集束装置１０が設けらｎている。光集束装置１０
は凸レンズ７と平面上に多数の光集束レンズ８ｔ−配列
したものとから成る。There is a support 2 that supports a semiconductor substrate 1, and these are housed in a quartz chamber 3. There is an infrared lamp 4 outside the quartz chamber 3, and the infrared lamp 4 and the semiconductor substrate 1
A light focusing device 10 is provided between them. Light focusing device 10
consists of a convex lens 7 and a large number of light converging lenses 8t arranged on a plane.
この装置において、赤外線ランプ４から出た光は凸レン
ズ７によって平行光線となり、この平行光線は光集束レ
ンズ８により集束される。光集束レンズ８と半導体基板
裏面６間の距離を光集束レンズ８の赤外線の焦点距離に
等しく設定しておくことにエリ、多数の光集束レンズ８
の焦点はすべて半導体基板裏面６上に結ばれる。In this device, light emitted from an infrared lamp 4 is converted into parallel light by a convex lens 7, and this parallel light is focused by a light converging lens 8. It is advantageous to set the distance between the light focusing lens 8 and the back surface 6 of the semiconductor substrate to be equal to the focal length of the infrared rays of the light focusing lens 8.
are all focused on the back surface 6 of the semiconductor substrate.
半導体基板中の光の透過率が良い場合は、半導体基板裏
面の同きを上下逆にして配置することもできる。If the light transmittance in the semiconductor substrate is good, it is also possible to arrange the semiconductor substrate with the back side of the semiconductor substrate upside down.
不
また、石英チャンバ３内は真空もしくは単活性ガスで満
されており、シリコン基板表面に反応生成物が形成され
るのを防ぐと共にシリコン基板を極めて高い清浄度に保
っている。ここで、光が石英チャンバ３を透過する部分
での光の吸収及び屈折が問題となる場合は、装置全体を
石英チャンバ内に納めることもできる。その場合は支持
具２を温度制御して基板を一定温度以下に保つ必要があ
るＯ
さらにまた、光集束レンズ８０代りに７レネル帯板を用
いてもよい。Furthermore, the interior of the quartz chamber 3 is filled with a vacuum or a monoactive gas to prevent reaction products from being formed on the silicon substrate surface and to maintain the silicon substrate at an extremely high degree of cleanliness. Here, if absorption and refraction of light in the portion where the light passes through the quartz chamber 3 becomes a problem, the entire device may be housed within the quartz chamber. In that case, it is necessary to control the temperature of the support 2 to keep the substrate below a certain temperature.Furthermore, a 7 renel strip plate may be used instead of the light converging lens 80.
以上説明したように本発明は、光源からの光を半導体基
板裏面上に複数個の焦点を作るように集束させることに
より、焦点近傍の半導体基板裏面に高温部の焦点とその
周辺の低温部との間で生ずる熱ひずみによる歪場を導入
してゲッタリングを行なう半導体基板裏面処理装置であ
る。As explained above, the present invention focuses light from a light source to create a plurality of focal points on the back surface of a semiconductor substrate, thereby creating a focal point of a high-temperature area and a low-temperature area around it on the back surface of the semiconductor substrate near the focal point. This is a semiconductor substrate backside processing apparatus that performs gettering by introducing a strain field due to thermal strain generated between
光は、処理する半導体基板の裏面にだけ作用し、表面活
性層を汚染することがないので、製造工程の途中でも使
用できる。また、歪量の制御は光源の出力を変えるだけ
という極めて少数のパラメータの操作で可能となる。The light acts only on the back side of the semiconductor substrate being processed and does not contaminate the surface active layer, so it can be used even during the manufacturing process. Furthermore, the amount of distortion can be controlled by manipulating an extremely small number of parameters, such as simply changing the output of the light source.
第１図は本発明の一実施例の概略断面図、第２図は従来
の装置の模式断面図でるる。
１．１０・・・・・・半導体基板、２，２０・・・・・
・支持具、３・・・・・・石英チャンバ、４・・・・・
・赤外線ランプ、５・・・、・・赤外線、６，６０・・
・・−・半導体基板裏面、７・・・・・・凸レンズ、８
・・・・・・光集束レンズ、１０・・・・・・光集束装
置、４０・・・・・・砥粒吹き出し口、５０・・・・・
・砥粒の流れ。FIG. 1 is a schematic sectional view of an embodiment of the present invention, and FIG. 2 is a schematic sectional view of a conventional device. 1.10... Semiconductor substrate, 2,20...
・Support, 3...Quartz chamber, 4...
・Infrared lamp, 5...,...Infrared ray, 6,60...
...-- Back side of semiconductor substrate, 7... Convex lens, 8
......Light focusing lens, 10... Light focusing device, 40... Abrasive grain outlet, 50...
・Flow of abrasive grains.
Claims (1)
装置において、光源を具備し、前記光源と前記半導体基
板間に前記光源からの光が前記半導体基板裏面上に複数
個の焦点を結ぶように配置した光集束装置を設けたこと
を特徴とする半導体基板裏面処理装置。A semiconductor substrate backside processing apparatus that introduces a strain field to the backside of a semiconductor substrate, comprising a light source and arranged between the light source and the semiconductor substrate so that light from the light source focuses on a plurality of focal points on the backside of the semiconductor substrate. 1. A semiconductor substrate backside processing apparatus, characterized in that it is provided with a light focusing device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10860585A JPS61265825A (en) | 1985-05-20 | 1985-05-20 | Back-surface treating apparatus for semiconductor substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10860585A JPS61265825A (en) | 1985-05-20 | 1985-05-20 | Back-surface treating apparatus for semiconductor substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61265825A true JPS61265825A (en) | 1986-11-25 |
Family
ID=14489033
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10860585A Pending JPS61265825A (en) | 1985-05-20 | 1985-05-20 | Back-surface treating apparatus for semiconductor substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61265825A (en) |
-
1985
- 1985-05-20 JP JP10860585A patent/JPS61265825A/en active Pending
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