JPS61253843A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS61253843A JPS61253843A JP9548185A JP9548185A JPS61253843A JP S61253843 A JPS61253843 A JP S61253843A JP 9548185 A JP9548185 A JP 9548185A JP 9548185 A JP9548185 A JP 9548185A JP S61253843 A JPS61253843 A JP S61253843A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- substrates
- pellets
- case body
- pellet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 40
- 239000008188 pellet Substances 0.000 claims abstract description 37
- 239000000758 substrate Substances 0.000 claims abstract description 32
- 229920002545 silicone oil Polymers 0.000 claims abstract description 7
- 239000007788 liquid Substances 0.000 claims description 6
- 239000011347 resin Substances 0.000 claims 1
- 229920005989 resin Polymers 0.000 claims 1
- 239000002826 coolant Substances 0.000 abstract description 8
- 238000000034 method Methods 0.000 abstract description 6
- 230000017525 heat dissipation Effects 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 230000005855 radiation Effects 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 230000009977 dual effect Effects 0.000 description 2
- 230000007257 malfunction Effects 0.000 description 2
- 230000015654 memory Effects 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000000356 contaminant Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- QSHDDOUJBYECFT-UHFFFAOYSA-N mercury Chemical compound [Hg] QSHDDOUJBYECFT-UHFFFAOYSA-N 0.000 description 1
- 229910052753 mercury Inorganic materials 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 238000004382 potting Methods 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5385—Assembly of a plurality of insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/44—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements the complete device being wholly immersed in a fluid other than air
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
- H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/105—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
- H01L2225/10—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10
- H01L2225/1011—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10 the containers being in a stacked arrangement
- H01L2225/1017—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10 the containers being in a stacked arrangement the lowermost container comprising a device support
- H01L2225/1023—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10 the containers being in a stacked arrangement the lowermost container comprising a device support the support being an insulating substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
- H01L2225/10—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10
- H01L2225/1011—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10 the containers being in a stacked arrangement
- H01L2225/1047—Details of electrical connections between containers
- H01L2225/107—Indirect electrical connections, e.g. via an interposer, a flexible substrate, using TAB
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
- H01L2225/10—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10
- H01L2225/1011—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices having separate containers the devices being integrated devices of class H10 the containers being in a stacked arrangement
- H01L2225/1094—Thermal management, e.g. cooling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
［技術分野］
本発明は複数の半導体装置の高密度実装に適用して有効
な技術に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a technique that is effective when applied to high-density packaging of a plurality of semiconductor devices.
［背景技術］
複数の半導体装置を一つの基板上に取付けて、コンピュ
ータの外部記憶装置等として用いることが知られている
。[Background Art] It is known that a plurality of semiconductor devices are mounted on one substrate and used as an external storage device of a computer or the like.
これは、たとえばガラスエポキシ樹脂やアルミナ等から
なるボード上にランダム・アクセス・メモリー（ＲＡＭ
）としての多数の半導体装置がアドレス生成用の半導体
装置とともに取り付けられ、これと電源および外部接続
端子等で一つの記憶装置を構成するものである。This is a random access memory (RAM) on a board made of, for example, glass epoxy resin or alumina.
) are attached together with a semiconductor device for address generation, and these together with a power supply, external connection terminals, etc. constitute one memory device.
ところで、このような用途に用いられる半導体装置とし
ては、デュアル・インライン・パッケージ（Ｄ Ｉ Ｐ
）型のものが知られているが、外部記憶装置に大容量が
必要とされるようになってくると、このパッケージ形状
の半導体装置はパンケージ巾およびリードの拡がりのた
めに効率的な実装密度が得られないことが本発明者によ
って明らかにされた。By the way, a dual inline package (DIP) is a semiconductor device used for such purposes.
) type, but as external storage devices began to require large capacity, semiconductor devices with this package shape became more efficient due to the wider pancage width and lead expansion. The inventor has revealed that this cannot be obtained.
すなわち、外部記憶装置として大容量を得るためには、
外部記憶装置自体も大型化してしまう結果となるのであ
る。In other words, in order to obtain large capacity as an external storage device,
This results in the external storage device itself becoming larger.
さらに、多数の半導体装置を高密度で実装した場合、従
来の実装方法では熱放散が十分ではなく、各半導体装置
が高温化し、これが信頼性低下の原因となる。Furthermore, when a large number of semiconductor devices are mounted at high density, conventional mounting methods do not provide sufficient heat dissipation, and each semiconductor device becomes hot, which causes a decrease in reliability.
なお、半導体装置の高密度実装の技術について説明しで
ある例としては、昭和５８年１１月２８日株式会社サイ
エンスフォーラム発行「超ＬＳＩデバイスハンドブック
Ｊ、Ｐ２３２〜Ｐ２３８がある
［発明の目的］
本発明の目的は、複数のペレットを有する半導体装置に
おいて小型でしかも高集積度化、大容量化が可能な技術
を提供することにある。An example of the technology for high-density packaging of semiconductor devices is "Ultra LSI Device Handbook J, P232-P238, published by Science Forum Co., Ltd., November 28, 1980 [Object of the Invention] The present invention The purpose of the present invention is to provide a technology that allows a semiconductor device having a plurality of pellets to be made compact, highly integrated, and large in capacity.
本発明の他の目的は、高密度実装された半導体装置にお
いて、熱による誤動作等を防止して信頼性の高い半導体
装置を提供することにある。Another object of the present invention is to provide a highly reliable semiconductor device that prevents malfunctions caused by heat in a semiconductor device that is densely packaged.
本発明の前記ならびにその他の目的と新規な特徴は、本
明細書の記述および添付図面から明らかになるであろう
。The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.
［発明の概要］
本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば、次の通りである。[Summary of the Invention] A brief overview of typical inventions disclosed in this application is as follows.
すなわち、半導体ペレットをフェイスダウンボンディン
グにより高密度で基板に取付け、該基板を筺体内に並列
に複数収納する構造とすることにより、小型の半導体装
置で大容量化を実現することが可能となる。That is, by attaching semiconductor pellets to a substrate at high density by face-down bonding and arranging a plurality of substrates in parallel in a housing, it is possible to realize a large capacity with a small semiconductor device.
また、筺体内に液体を充填することにより、対流による
熱放出が可能となり、ペレットの高温化を防止して信頼
性の高い半導体装置を提供することができる。Further, by filling the liquid in the housing, heat can be released by convection, and it is possible to prevent the pellet from becoming hot, thereby providing a highly reliable semiconductor device.
［実施例］
第１図は本発明の一実施例である半導体装置を取付基板
に実装した状態で示す断面図、第２図はペレットの取付
けられた基板を示す平面図である。[Embodiment] FIG. 1 is a sectional view showing a semiconductor device according to an embodiment of the present invention mounted on a mounting board, and FIG. 2 is a plan view showing the board on which pellets are mounted.
本実施例の半導体装置１はたとえば大型コンビ二一夕の
外部記憶装置の一部として用いられるものであり、アル
ミニウム等の金属からなる筺体２にシリコンオイルから
なる液状の冷却媒体３が充填され、筺体２内にはペレッ
ト１３を取付けた基板５が並列方向に収納され、筺体２
の上面は放熱フィン６が設けられた蓋体７で封止されて
なるものである。The semiconductor device 1 of this embodiment is used, for example, as part of an external storage device of a large convenience store, and a casing 2 made of metal such as aluminum is filled with a liquid cooling medium 3 made of silicone oil. Boards 5 with pellets 13 attached are housed in the housing 2 in a parallel direction, and the housing 2
The upper surface is sealed with a lid 7 provided with radiation fins 6.
ここで、筺体２は内面底部にソケット８が設けられてお
り、該ソケット８の電極９はスルーホール配線１０を介
して筺体２の外側に設けられているリードピン１１と電
気的に接続されている。Here, the housing 2 is provided with a socket 8 at the bottom of the inner surface, and an electrode 9 of the socket 8 is electrically connected to a lead pin 11 provided on the outside of the housing 2 via a through-hole wiring 10. .
基板５はたとえば第２図に示すように、シリコンカーバ
イド（Ｓ ｉ Ｃ）のような熱伝導度の大きい絶縁材料
からなり、その表面にはアルミニウムによる配線層１２
が形成されており、該基板１２の所定位置にはアドレス
生成回路が形成された半導体ペレット１３ａとともに多
数のランダム・アクセス・メモリー（ＲＡＭ）を構成す
る半導体ペレット１３ｂがフェイスダウンボンディング
によって取付けられ、さらに各ペレット１３８．１３ｂ
の周囲はポツティング法によって被着されたシリコンゲ
ル１４によって覆われている。ここで、シリコンゲル１
６は各ペレット１３ａ、１３ｂの非基板対向面側が外部
に露出する様に基板５上のペレット１３ａ、１３ｂの周
囲にのみボッティングされている。なお、特に制限され
ないが、シリコンゲル１４は各ペレットへの汚染物の進
入を防止し、各ペレットの信頼性を向上させるために用
いられる。さらに、基板５の端部にはアルミニウム配線
で電極部１４が形成されており、前記配線層１２を介し
て各ペレット１３ａ、１３ｂと電気的に接続されている
。As shown in FIG. 2, the substrate 5 is made of an insulating material with high thermal conductivity, such as silicon carbide (S i C), and has a wiring layer 12 made of aluminum on its surface.
A plurality of semiconductor pellets 13b constituting a large number of random access memories (RAM) are attached to a predetermined position of the substrate 12 by face-down bonding together with a semiconductor pellet 13a on which an address generation circuit is formed. Each pellet 138.13b
Its periphery is covered with silicone gel 14 deposited by a potting method. Here, silicon gel 1
6 is boted only around the pellets 13a, 13b on the substrate 5 so that the non-substrate facing surface side of each pellet 13a, 13b is exposed to the outside. Although not particularly limited, the silicon gel 14 is used to prevent contaminants from entering each pellet and improve the reliability of each pellet. Furthermore, an electrode portion 14 is formed with aluminum wiring at the end of the substrate 5, and is electrically connected to each pellet 13a, 13b via the wiring layer 12.
筺体２内に前記基板５を収納する際には、基板端部の電
極部１４を筺体２の内面底部に設けられたソケット８の
電極９に当接する様に挿入することによって行う、かか
る作業により、基板５上のべし７ト４と筺体２のリード
ピン１１との電気的接続が達成される。When storing the board 5 in the casing 2, the electrode part 14 at the end of the board is inserted so as to come into contact with the electrode 9 of the socket 8 provided at the bottom of the inner surface of the casing 2. , electrical connection between the pin 4 on the substrate 5 and the lead pin 11 of the housing 2 is achieved.
その後、筺体２内に化学的に不活性な冷却媒体としての
シリコンオイル３を満たし、蓋体７をボル１−１５で筺
体２に固定することにより本実施例の半導体装置１を得
ることができる。なお、シリコンオイル３は基板５を筺
体２に取付ける前に予め筺体２内に充填しておいてもよ
い。Thereafter, the semiconductor device 1 of this embodiment can be obtained by filling the casing 2 with silicone oil 3 as a chemically inert cooling medium and fixing the lid 7 to the casing 2 with bolts 1-15. . Note that the silicone oil 3 may be filled in the housing 2 in advance before the substrate 5 is attached to the housing 2.
この半導体装置１の実装は例えば第１図に示すように行
われる。This semiconductor device 1 is mounted, for example, as shown in FIG.
すなわち、取付基板１７に設けられているスルーホール
電極１８にリードピン１１を挿入し、該リードピン１１
の周囲を半田１９で固定することにより、取付基板１７
と半導体装置１の電気的溝、通が達成される。なお、取
付基板にはたとえばデュアルインラインパッケージ型半
導体装置２０もしくはコンデンサ２１等の素子を取付け
たＩ１０ボートが形成された基板２２が取付けられ、さ
らに外部との接続用のコネクタが前記半導体装置１およ
びＩ１０ボート基板２２と電気的に接続された状態で取
付けられている。That is, the lead pin 11 is inserted into the through-hole electrode 18 provided on the mounting board 17, and the lead pin 11
By fixing the periphery of the mounting board 17 with solder 19,
Thus, electrical grooves and connections of the semiconductor device 1 are achieved. The mounting board includes, for example, a dual in-line package semiconductor device 20 or a board 22 formed with an I10 board on which elements such as a capacitor 21 are mounted, and a connector for external connection is attached to the semiconductor device 1 and the I10 board. It is attached in a state where it is electrically connected to the boat board 22.
このように本実施例によれば、ペレット１３ａ。As described above, according to this embodiment, the pellet 13a.
１３ｂがフェイスダウンボンディングによって基板５に
取付けられ、さらに該基板５が筺体２内に並列に複数枚
収納されているため、小さいスペースで多数のペレット
を高密度に実装した半導体装置を得ることができる。13b is attached to the substrate 5 by face-down bonding, and a plurality of the substrates 5 are housed in parallel in the housing 2, so it is possible to obtain a semiconductor device in which a large number of pellets are densely mounted in a small space. .
このように、基板５を熱伝導率の良い材料で形成するこ
とによりペレット４に発生した熱はフェイスダウンボン
ディングの電極及び基板５を通じ筺体２に効率良く伝え
られる。In this way, by forming the substrate 5 from a material with good thermal conductivity, the heat generated in the pellet 4 can be efficiently transmitted to the casing 2 through the face-down bonding electrode and the substrate 5.
さらに、シリコンオイルのように粘性の小さい冷却媒体
３を筺体２内に充填することにより、この冷却媒体３が
ペレッ）１３ａ、１３ｂの背面とれた放熱フィン６から
外部に効率良く放出される。Furthermore, by filling the housing 2 with a cooling medium 3 having a low viscosity such as silicone oil, this cooling medium 3 is efficiently discharged to the outside from the heat dissipation fins 6 formed on the back surfaces of the pellets 13a and 13b.
この上、ペレット４からフェイスダウンボンディングの
電極を通じ基板５のペレット４との対向面から熱対流と
いう放熱経路も確保される。このためペレット４の高温
化を防止することができ、信転性の高い半導体装置１を
提供することができる。In addition, a heat radiation path called thermal convection is also secured from the pellet 4 through the face-down bonding electrode and from the surface of the substrate 5 facing the pellet 4. Therefore, it is possible to prevent the pellet 4 from increasing in temperature, and it is possible to provide a semiconductor device 1 with high reliability.
また、この半導体装置１を複数、架体に納めてより大規
模なシステムとすることは容易である。Furthermore, it is easy to house a plurality of semiconductor devices 1 in a frame to form a larger system.
なお、本実施例ではペレット４を取付けた基板５が筺体
２に対して着脱自在に取付けられているため、ペレット
不良等にともなうリペアが極めて容易である。また、こ
の様に基板５を着脱自在な構造とすることにより、必要
とするメモリ容量にあわせて筺体２内の基板数を調節す
ることができ、外部記憶装置の低コスト化を図ることも
できる。In this embodiment, since the substrate 5 on which the pellets 4 are attached is removably attached to the housing 2, it is extremely easy to repair the defective pellets. Furthermore, by making the board 5 removable in this way, the number of boards in the housing 2 can be adjusted according to the required memory capacity, and the cost of the external storage device can be reduced. .
［効果］
（１）、フェイスダウンボンディングにより取付けられ
たペレットと該ペレットと結線されてなる電極を有する
２以上の基板と、該基板を並列方向に収納しかつ該基板
の電極と電気的導通が達成されてなる外部電極を有する
構造とすることにより、小型でしかも高集積度を達成す
る半導体装置を提供することができる。[Effects] (1) Two or more substrates having a pellet attached by face-down bonding and an electrode connected to the pellet, and the substrates are housed in a parallel direction and are electrically connected to the electrodes of the substrate. By adopting the structure having the external electrodes thus achieved, it is possible to provide a semiconductor device that is small and achieves a high degree of integration.
（２）、筺体内に液体を充填することにより、熱対流に
よる放熱効果を得ることができるため、ペレットの高温
化を防止し誤動作のない信鎖性の高い半導体装置を提供
することができる。(2) By filling the liquid into the housing, it is possible to obtain a heat dissipation effect due to thermal convection, so it is possible to prevent the pellet from increasing in temperature and provide a highly reliable semiconductor device that does not malfunction.
（３）、基板を筺体に着脱自在に取付けることにより、
ペレット不良等による基板の交換が極めて容易となる。(3) By removably attaching the board to the housing,
It becomes extremely easy to replace the board due to pellet defects or the like.
以上本発明者によってなされた発明を実施例に基づき具
体的に説明したが、本発明は前記実施例に限定されるも
のではなく、その要旨を逸脱しない範囲で種々変更可能
であることはいうまでもない。Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the Examples and can be modified in various ways without departing from the gist thereof. Nor.
たとえば、筺体内に充填する冷却媒体として粘性が低く
対流効果のあるシリコンオイルについて説明したが、こ
れに限らず熱伝導性の高い液体だとえば水銀等を充填し
てもよい。For example, although silicone oil with low viscosity and a convection effect has been described as a cooling medium to be filled in the housing, the cooling medium is not limited to this, and mercury or the like may be filled as a liquid with high thermal conductivity.
また、基板と筺体とはピンとソケットにより着脱自在に
取付けられている場合についてのみ説明したが、半田等
で固定的に取付けられたものであってもよい。Moreover, although the case where the board and the casing are detachably attached using pins and sockets has been described, they may be fixedly attached using solder or the like.
本実施例では外部に放熱フィン６を取付けたが、その他
いかなる筺体２の冷却方法に対しても本発明が有効なこ
とは言うまでもない、また、基板を筺体内に複数列収納
してもよい。In this embodiment, the heat dissipation fins 6 are attached to the outside, but it goes without saying that the present invention is effective for any other method of cooling the housing 2, and the substrates may be housed in multiple rows within the housing.
［利用分野］
以上の説明では主として本発明者によってなされた発明
をその背景となった利用分野である、コンピューターの
外部記憶装置に適用した場合について説明したが、これ
に限定されるものではなく、他の如何なる用途を有する
半導体装置に適用しても有効な技術である。[Field of Application] In the above explanation, the invention made by the present inventor was mainly applied to the external storage device of a computer, which is the background of the invention, but the invention is not limited to this. This technique is effective even when applied to semiconductor devices having any other uses.
第１図は本発明の実施例である半導体装置を取付基板に
実装した状態で示す断面図、
第２図はペレットの取付けられた基板を示す平面図であ
る。
１・・・半導体装置、２・・・筺体、３・・・冷却媒体
、４・・・ペレット、５・・・基板、６・・・放熱フィ
ン、７・・・蓋体、８・・・ソケット、９・・・電極、
１０・・・スルーホール配線、１１・・・リードピン、
１２・・・配線層、１３ａ、１３ｂ・・・ペレット、１
４・・・電極部、１５・・・ボルト、１６・・・シリコ
ンゲル、１７・・・取付基板、１８・・・スルーホール
電極、１９・・・半田、２０・・・半導体装置、２１・
・・コンデンサ、２２・・・基板、２３・・・コネクタ
。FIG. 1 is a sectional view showing a semiconductor device according to an embodiment of the present invention mounted on a mounting board, and FIG. 2 is a plan view showing the board on which pellets are mounted. DESCRIPTION OF SYMBOLS 1... Semiconductor device, 2... Housing, 3... Cooling medium, 4... Pellet, 5... Substrate, 6... Radiation fin, 7... Lid, 8... Socket, 9...electrode,
10...Through hole wiring, 11...Lead pin,
12... Wiring layer, 13a, 13b... Pellet, 1
4... Electrode portion, 15... Volt, 16... Silicon gel, 17... Mounting board, 18... Through hole electrode, 19... Solder, 20... Semiconductor device, 21...
... Capacitor, 22... Board, 23... Connector.
Claims (1)
レットおよび該ペレットと結線されてなる電極を有する
２以上の基板と、該基板を収納しかつ該基板の電極と電
気的導通が達成されてなる外部電極を有する筺体とから
なることを特徴とする半導体装置。 ２、上記筺体内に液体が充填されていることを特徴とす
る特許請求の範囲第１項記載の半導体装置。 ３、上記液体がシリコンオイルであることを特徴とする
特許請求の範囲第２項記載の半導体装置。 ４、上記基板に取付られたペレットに樹脂コーティング
がされてなることを特徴とする特許請求の範囲第１項記
載の半導体装置。 ５、基板が筺体に対して着脱可能な方法で取付けられて
いることを特徴とする特許請求の範囲第１項記載の半導
体装置。[Scope of Claims] 1. Two or more substrates having pellets attached by face-down bonding and electrodes connected to the pellets, which house the substrates and achieve electrical continuity with the electrodes of the substrates. 1. A semiconductor device comprising: a casing having an external electrode; 2. The semiconductor device according to claim 1, wherein the housing is filled with liquid. 3. The semiconductor device according to claim 2, wherein the liquid is silicone oil. 4. The semiconductor device according to claim 1, wherein the pellet attached to the substrate is coated with a resin. 5. The semiconductor device according to claim 1, wherein the substrate is detachably attached to the housing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9548185A JPS61253843A (en) | 1985-05-07 | 1985-05-07 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9548185A JPS61253843A (en) | 1985-05-07 | 1985-05-07 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61253843A true JPS61253843A (en) | 1986-11-11 |
Family
ID=14138803
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9548185A Pending JPS61253843A (en) | 1985-05-07 | 1985-05-07 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61253843A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102012111489A1 (en) * | 2012-11-27 | 2014-05-28 | Dr. Ing. H.C. F. Porsche Aktiengesellschaft | Device for cooling power electronic for use in motor vehicle e.g. hybrid vehicle, has separating elements that are fluidly connected to each other, and electronic components that are arranged in respective cooling chambers |
| US20170208705A1 (en) * | 2016-01-15 | 2017-07-20 | Hamilton Sundstrand Corporation | Immersion cooling of power circuit |
| JP2017520933A (en) * | 2014-07-14 | 2017-07-27 | マイクロン テクノロジー， インク． | Stacked semiconductor die assembly and associated system having high efficiency thermal path |
-
1985
- 1985-05-07 JP JP9548185A patent/JPS61253843A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102012111489A1 (en) * | 2012-11-27 | 2014-05-28 | Dr. Ing. H.C. F. Porsche Aktiengesellschaft | Device for cooling power electronic for use in motor vehicle e.g. hybrid vehicle, has separating elements that are fluidly connected to each other, and electronic components that are arranged in respective cooling chambers |
| JP2017520933A (en) * | 2014-07-14 | 2017-07-27 | マイクロン テクノロジー， インク． | Stacked semiconductor die assembly and associated system having high efficiency thermal path |
| US20170208705A1 (en) * | 2016-01-15 | 2017-07-20 | Hamilton Sundstrand Corporation | Immersion cooling of power circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| USRE36469E (en) | Packaging for semiconductor logic devices | |
| US5646828A (en) | Thin packaging of multi-chip modules with enhanced thermal/power management | |
| KR100953051B1 (en) | Stackable electronic assembly | |
| US6774478B2 (en) | Stacked semiconductor package | |
| US6002177A (en) | High density integrated circuit packaging with chip stacking and via interconnections | |
| US5138434A (en) | Packaging for semiconductor logic devices | |
| US5710459A (en) | Integrated circuit package provided with multiple heat-conducting paths for enhancing heat dissipation and wrapping around cap for improving integrity and reliability | |
| US6424532B2 (en) | Heat sink and memory module with heat sink | |
| US8415788B2 (en) | System and method for dissipating heat from semiconductor devices | |
| US6075287A (en) | Integrated, multi-chip, thermally conductive packaging device and methodology | |
| US5726492A (en) | Semiconductor module including vertically mounted semiconductor chips | |
| US20020181216A1 (en) | Electronic module having a three dimensional array of carrier-mounted integrated circuit packages | |
| KR0131195B1 (en) | Semiconductor module | |
| CN109903789A (en) | solid state drive | |
| KR100236671B1 (en) | Vertically mounted semiconductor chip package having a printed circuit board and a heat sink and a package module including the same | |
| JP2005005629A (en) | Electronic device | |
| JPH09213851A (en) | Heat radiation method and heat radiation means for ic device | |
| JP2845227B2 (en) | Multi-chip module mounting structure | |
| JPS61253843A (en) | Semiconductor device | |
| JP2812014B2 (en) | Semiconductor device | |
| US7227258B2 (en) | Mounting structure in integrated circuit module | |
| JP3874888B2 (en) | Memory module and memory system | |
| JP4108909B2 (en) | Semiconductor device | |
| JP2001035975A (en) | Bga-type semiconductor device package | |
| JP3460930B2 (en) | Electronic circuit package |