JPS6125114Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a magnetic bubble memory device that is effective in determining the quality of gate function.

Bubble memory uses permalloy patterns and conductor patterns on a magnetic crystal film with a garnet crystal structure to create bubble generation circuits, transfer circuits, storage circuits,
This memory has the function of making a bubble memory chip equipped with a detection circuit, etc., applying a bias magnetic field perpendicularly to the chip to stably hold bubbles, and transferring the bubbles using a driving magnetic field applied in parallel.

In such a bubble memory, the circuit that switches the bubble from one circuit to another, such as from the transfer circuit to the storage circuit or from the transfer circuit to the detection circuit, is called a gate circuit, but this circuit is different from other circuits. The bias margin is smaller than that of the circuit.

Here, the bias margin refers to the stable region of the bias magnetic field that is applied perpendicular to the chip surface in order for bubbles to exist stably.If the bias magnetic field value is larger than this stable region value, the bubble will disappear; In this case, it diverges and changes to the original striped magnetic domain.

The magnetic field where the bubble disappears is called the collapse magnetic field.
The magnetic field where the bubbles diverge is called the stripe-out magnetic field, and the magnetic field region in between where the bubbles stably exist is called the bias margin, and the width of this varies depending on the magnitude of the driving magnetic field.

Now, when manufacturing a bubble memory, it is necessary to guarantee that the bubble memory operates stably against fluctuations in the drive circuit or power supply within a certain range, so the pulse width applied to the gate circuit must be adjusted. , phase variation tolerance, etc. must be measured. However, since there are many combinations of the three items of pulse current value, width, and phase, it takes a considerable amount of time.
Moreover, the test circuit is also expensive, and it is desired to save labor.

The gate circuit has a conductor pattern on a magnetic crystal film, and a transfer pattern made of permalloy is placed on top of it via an insulating layer. Even if the two are aligned as designed, the gate circuit will not work properly. Although the bias margin of the transfer pattern is narrower than that of a normal transfer pattern, the phase margin for performing the gate operation becomes narrower as the mutual positions of the two deviate from the designed values. This corresponds to the narrowing of the bias margin of the gate circuit.

This mutual positional deviation between the conductor pattern and the transfer pattern is caused by a deviation in mask alignment during pattern formation in memory chip manufacturing, but even in the maximum case, a deviation of 5% or more is rare.

Therefore, in the bubble memory device according to the present invention, this condition is considered to be the worst condition, and a monitor gate circuit is prepared in which the mutual positions of the conductor pattern and the transfer pattern are shifted by a maximum of +5% and -5% in the bubble traveling direction. However, by measuring the bias margin width of this monitor circuit, it is possible to determine whether or not other ordinary gate circuits satisfy the standard values.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a bubble memory circuit based on the major-minor system, FIG. 2 is an explanatory diagram of the bubble switching function, and FIG. 3 is a diagram showing the relationship between bias margin and drive magnetic field.

In FIG. 1, the bubbles generated in the generator 1 are sent into the corresponding minor loops 5 by the action of the transfer gate 4 every time the storage signals for one piece of information are aligned on the major loop 3 toward the eraser 2. The bubble information moves within the minor loop 5 by the driving magnetic field, and as this is repeated, all information is stored in the minor loop 5.

Next, in the case of reading, the bubble information from the minor loop 5 is transferred to the major loop 3 by the action of the transfer gate 4, and is divided into two by the duplicator 6. One is detected by the detector 7, and the other one is The information is erased by the eraser 2 or stored again in the original minor loop 5 by the action of the transfer gate 4.

In the case of this major/minor system, the gate circuit is a circuit that connects the major loop and the minor loop via the transfer gate 4, and this is the circuit that switches the bubble from the major loop 3 to the minor loop 5, or from the minor loop 5 to the major loop 3. This is a circuit that performs transfer/transfer functions such as switches.

Such gate circuits are provided at the entrance and exit of the minor loop or at the dividing circuit for bubble detection, but the number of gate circuits used in one memory chip is extremely large.

Taking this example as a 300K bit memory chip,
The information storage part consists of 268 minor loops, and each minor loop is formed by 1.097 bits, that is, 1.097 transfer patterns.
This achieves a bit capacity of 293.996 bits (1097 x 268).

This memory chip has 268 minor loops, so there are at least this many gate circuits.

Figure 2 shows major loop 3 and minor loop 5.
In the enlarged view of the gate circuit consisting of the monitor gate circuit A on the right side, compared to the normal circuit B on the left side, the pattern is created by consciously changing the alignment of the conductor pattern 10 and the transfer patterns 9 and 16 by l. The value of l is the maximum value of the deviation that occurs during mask alignment, and in this case is 5%. The switching operation of the gate circuit on the right side will now be explained as follows.

It is assumed that the bias magnetic field is applied from the back side to the front side of the drawing, and that the drive magnetic field _HD is rotating counterclockwise. In this case, the condition for the bubble to transfer from the major loop to the minor loop is that the direction of the driving magnetic field enters the IN region indicated by the lower left circle and approaches direction 1, and bubble 8 is at the shoulder position of transfer pattern 9 in the major loop. When a pulse current is applied to the conductor pattern 10 in the direction of the arrow in the state where the magnetic field has been transferred to , the outside of the conductor pattern 10 becomes attracted, so the bubble 8 becomes a bar-shaped pattern with the magnetic field oriented in the direction 2. After the pulse current is turned off, the current is transferred to the minor loop transfer pattern 14 via the transfer pattern 12 and the rod-shaped pattern 13. This operation is called transfer-in, and the pulse current is transferred to the transfer pattern 14 of the minor loop. The pulse current application time in is the range indicated by IN in the lower left circle.

Next, in the transfer out operation in which the bubble is transferred from the minor loop to the major loop, the direction of the rotating magnetic field enters the OUT region in the lower left diagram, and the conductor pattern is transferred to the shoulder position of the transfer pattern 16. When a pulse current is applied to 10, the outside of the conductor pattern becomes attracted,
The bubble 15 moves to the left end of the bar pattern 17 with the magnetic field oriented in the direction 4. Next, when the current in the conductor pattern 10 is cut off, it passes through the transfer pattern 18 according to the driving magnetic field and is transferred to the major loop pattern 19.
The transfer will be made to.

In order to perform such a bubble switching operation, it is necessary that the conductor pattern 10 and the permalloy transfer patterns 9 and 16 are properly aligned, and if this alignment is significantly deviated, the gate No function occurs, and even if the mutual positions shift, the conditions for performing the gate function are very limited. For example, in Fig. 2, if the position of the conductor pattern 10 is shifted to the left, it is necessary to output the pulse current earlier in order to synchronize it with the rotational direction of the driving magnetic field. This indicates that this is a memory device with a narrow phase margin.

A narrower phase margin in a gate circuit corresponds to a narrower bias margin. In other words, the range of the bias magnetic field that performs the gate function is limited, and the region where bubbles exist becomes narrower.

In Figure 3, the vertical axis shows the bias magnetic field and the horizontal axis shows the magnitude of the driving magnetic field.As the relative position of the conductor pattern 10 and the transfer pattern 9 or 16 shifts in the gate circuit, the bias magnetic field increases. It shows that it is narrowing and turning over.

Here, the region represents a collapsed magnetic field region where bubbles disappear, and the region represents a striped-out magnetic field region where bubbles diverge.

In the bubble memory device according to the present invention,
In addition to the normal loop, a loop with a gate circuit in which the mutual positions of the conductor pattern and the transfer pattern are shifted by 3 to 5% left and right or front and back is provided as a monitor, and by measuring the bias margin of this gate circuit, it is possible to It is used to judge the functions of the many gate circuits provided, and the reason why the value of 5% was chosen is that this value can be considered the worst value in the production of memory chips, and if it deviates by more than this, the gate function will be disabled. This is because it can be considered difficult to accomplish.

As a means of carrying out this invention, the measurer shown in Fig. 1 is used.
In the case of the minor method, gate circuits for the minor loops 20 and 21 at the ends and the major loop 3 are made with their mutual positions shifted by 5%, and their margin widths are measured. Then, by comparing the relationship between the relative position deviation and bias margin of the gate circuit with a similar relationship diagram shown in Figure 3, we can determine how much tolerance the gate function of the manufactured bubble memory chip has. It can be estimated.

In manufacturing a memory chip, it is difficult to completely align the conductor pattern and the transfer pattern in the gate circuit, and some misalignment is unavoidable. For example, when a positional deviation of about 2% occurs in pattern alignment, the positional deviations at the monitor gate are 7% and 3%, and by measuring the margin width of this monitor gate, this value can be set as the worst value and a large number of gates can be It is possible to estimate the range in which the circuit margin width is distributed.

The present invention aims to save labor by measuring the bias margin width of the monitor gate in place of the conventional phase test for each gate.

[Brief explanation of the drawing]

FIG. 1 is a bubble memory circuit based on the major-minor system, FIG. 2 is an explanatory diagram of the gate function, and FIG. 3 is a diagram of the relationship between the bias margin and the driving magnetic field. Explanation of the symbols: 1 is a bubble generation circuit, 3 is a major loop, 4 is a transfer gate, 5 is a minor loop, 9 and 16 are permalloy transfer patterns, or 10 is a transfer pattern.

Claims (1)

[Scope of utility model registration request] In order to judge the quality of the gate functions for multiple gates in a bubble memory chip, a monitor gate is provided in addition to the normal gate, which is set to the worst position misalignment between the conductor pattern and the permalloy drive pattern during pattern molding. A magnetic bubble memory device characterized by: