CN110061127B - Magnetic tunnel junction forming method and magneto-resistive random access memory - Google Patents

Magnetic tunnel junction forming method and magneto-resistive random access memory Download PDF

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CN110061127B
CN110061127B CN201910419482.7A CN201910419482A CN110061127B CN 110061127 B CN110061127 B CN 110061127B CN 201910419482 A CN201910419482 A CN 201910419482A CN 110061127 B CN110061127 B CN 110061127B
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layer
magnetic
tunnel junction
magnetic tunnel
antiferromagnetic
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CN110061127A (en
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崔岩
罗军
杨美音
许静
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Institute of Microelectronics of CAS
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N50/00—Galvanomagnetic devices
    • H10N50/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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    • H10N50/00—Galvanomagnetic devices
    • H10N50/10—Magnetoresistive devices

Abstract

The application discloses a method for forming a magnetic tunnel junction, which comprises the steps of providing a substrate, wherein a bottom electrode is formed on the substrate; and forming a magnetic tunnel junction on the bottom electrode, wherein the magnetic tunnel junction comprises a vertical pinning layer, a first magnetic layer, a tunneling layer, a second magnetic layer and an antiferromagnetic layer which are sequentially laminated from bottom to top, the first magnetic layer and the second magnetic layer have vertical anisotropy, an interface bias field is formed at the junction of the antiferromagnetic layer and the second magnetic layer, and magnetic moment overturning is completed under the action of the interface bias field and spin Hall effect, so that data writing is realized. The write operation relies on pulse voltage, the current passing through the tunnel junction is extremely small, so that the power consumption is extremely low, the barrier layer of the tunnel junction is not damaged, the pulse time is related to the intensity of the applied pulse voltage, the magnetic moment directional overturning can be realized without precisely controlling the pulse time, the pressure of a clock circuit is reduced, and the reliability is improved. The application also discloses a magneto-resistive random access memory.

Description

Magnetic tunnel junction forming method and magneto-resistive random access memory
Technical Field
The present disclosure relates to the field of semiconductors, and more particularly, to a method for forming a magnetic tunnel junction and a magnetoresistive random access memory.
Background
With the development of spintronics, a magnetoresistive random access memory (MRAM, magnetoresistive Random Access Memory) based on a magnetic tunnel junction (Magnetic Tunnel Junction, MTJ) has been widely used, which can be used independently or integrated with a device using the random access memory, such as a processor, an application specific integrated circuit, or a system on a chip.
Currently, the large writing power consumption is one of the problems to be solved by MRAM. The core structure of the MRAM is an MTJ, so that the structure and the writing mode of the MTJ are optimized, and the core solution with high writing power consumption is provided. At present, two more efficient magnetic moment reversing modes, namely Spin-Orbit Torque (SOT) and voltage-controlled magnetic anisotropy (Voltage Control Magnetic Anisotropy, VCMA), are mainly developed in the industry to solve the problem of high writing power consumption.
However, the SOT-MTJ belongs to a three-terminal device, which is not beneficial to high-density integration, and in addition, for a tunnel junction with vertical anisotropy, an external magnetic field is needed to realize directional inversion, and the current density of inversion is still larger because the spin Hall angle of the current heavy metal material is relatively smaller; the conventional VCMA-MTJ realizes the magnetic moment directional inversion through VCMA effect, and the time of applying voltage needs to be precisely controlled, which has extremely high requirement on the clock control of a circuit, so that the writing error rate of the conventional VCMA-MTJ is higher and the reliability is lower.
Disclosure of Invention
In view of this, the present application provides a method of forming a magnetic tunnel junction by forming an antiferromagnetic layer on a second magnetic layer of a magnetic tunnel junction, generating an interface bias field based on a "ferromagnetic/antiferromagnetic" interface to replace an externally applied magnetic field, completing a magnetic moment inversion under the bias field and the spin hall effect, and achieving data writing. The write operation relies on pulse voltage, and the electric current through the tunnel junction is very little, therefore the consumption is very low, can not produce the damage to the barrier layer of tunnel junction yet to pulse time is related with the pulse voltage intensity that applys, need not accurate control pulse time can realize the directional upset of magnetic moment, has reduced the pressure of clock circuit, has increased the reliability. Correspondingly, the application also provides a magneto-resistive random access memory.
In one aspect, the present application provides a method for forming a magnetic tunnel junction, including:
providing a substrate, wherein the substrate is formed with a bottom electrode;
and forming a magnetic tunnel junction on the bottom electrode, wherein the magnetic tunnel junction comprises a vertical pinning layer, a first magnetic layer, a tunneling layer, a second magnetic layer and an antiferromagnetic layer which are sequentially laminated from bottom to top, the first magnetic layer and the second magnetic layer have vertical anisotropy, and an interface bias field is formed at the interface of the antiferromagnetic layer and the second magnetic layer.
Optionally, the shape of the magnetic tunnel junction is elliptical, and the direction of the interface bias field is along a short axis of the ellipse.
Optionally, forming a magnetic tunnel junction on the bottom electrode includes:
sequentially growing each material layer of the magnetic tunnel junction;
patterning of the material layers of the magnetic tunnel junction is performed to form the magnetic tunnel junction.
Optionally, the antiferromagnetic layer includes any one of IrMn, ptMn, and FePt.
Optionally, the first magnetic layer, the tunneling layer, the second magnetic layer, and the antiferromagnetic layer are formed by:
magnetron sputtering, molecular beam epitaxy, or pulsed laser deposition.
Optionally, the magnetic tunnel junction further includes:
a test electrode layer on the antiferromagnetic layer.
Optionally, the magnetic tunnel junction further includes: and the high-K dielectric layer and the top electrode are positioned on at least the test electrode layer.
In one aspect, the present application provides a magnetoresistive random access memory, including:
a substrate;
a bottom electrode over the substrate;
and the magnetic tunnel junction is positioned above the bottom electrode and comprises a vertical pinning layer, a first magnetic layer, a tunneling layer, a second magnetic layer and an antiferromagnetic layer which are sequentially laminated from bottom to top, wherein the first magnetic layer and the second magnetic layer have vertical anisotropy, and the antiferromagnetic layer has an interface bias field at the interface with the second magnetic layer.
Optionally, the shape of the magnetic tunnel junction is elliptical, and the direction of the interface bias field is along a short axis of the ellipse.
Optionally, the antiferromagnetic layer includes any one of IrMn, ptMn, and FePt.
Optionally, the magnetic tunnel junction further includes: a test electrode layer on the antiferromagnetic layer.
Optionally, the magnetic tunnel junction further includes: and the high-K dielectric layer and the top electrode are positioned on at least the test electrode layer.
From the above technical solutions, the embodiments of the present application have the following advantages:
the embodiment of the application provides a method for forming a magnetic tunnel junction, which comprises the steps of providing a substrate, forming a bottom electrode on the substrate, forming the magnetic tunnel junction on the bottom electrode, and sequentially stacking a vertical pinning layer, a first magnetic layer, a tunneling layer, a second magnetic layer and an antiferromagnetic layer from bottom to top, wherein the first magnetic layer and the second magnetic layer have vertical anisotropy, an interface bias field is formed at the junction of the antiferromagnetic layer and the second magnetic layer, and magnetic moment overturning is completed under the action of the interface bias field and spin Hall effect, so that data writing is realized. The write operation relies on pulse voltage, the current passing through the tunnel junction is extremely small, so that the power consumption is extremely low, the barrier layer of the tunnel junction is not damaged, the pulse time is related to the intensity of the applied pulse voltage, the magnetic moment directional overturning can be realized without precisely controlling the pulse time, the pressure of a clock circuit is reduced, and the reliability is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 illustrates a flow chart of a method of forming a magnetic tunnel junction provided by an embodiment of the present application;
FIGS. 2A-2B are schematic structural diagrams corresponding to a series of processes of a method for forming a magnetic tunnel junction according to an embodiment of the present disclosure;
FIG. 3 illustrates a schematic shape of a magnetic tunnel junction in an embodiment of the present application;
FIG. 4 illustrates a schematic diagram of a moment flip in an embodiment of the present application;
FIGS. 5A-10B illustrate cross-sectional and top views corresponding to various steps in forming a magnetic tunnel junction in an embodiment of the present application;
fig. 11 shows a schematic structural diagram of a magnetoresistive random access memory according to an embodiment of the application.
Detailed Description
In order that the above objects, features and advantages of the invention will be readily understood, a more particular description of the invention will be rendered by reference to the appended drawings.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, but the present invention may be practiced in other ways other than those described herein, and persons skilled in the art will readily appreciate that the present invention is not limited to the specific embodiments disclosed below.
In the following detailed description of the embodiments of the present invention, reference is made to the accompanying drawings, which form a part hereof, and in which are shown by way of illustration only, and in which is shown by way of illustration only, and in which the scope of the invention is not limited for ease of illustration. In addition, the three-dimensional dimensions of length, width and depth should be included in actual fabrication. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples, which are for the purpose of brevity and clarity, and which do not themselves indicate the relationship between the various examples and/or arrangements discussed.
Aiming at the problems that SOT-MTJ needs an external magnetic field to realize directional overturning, the spin Hall angle of a heavy metal material is relatively smaller, the overturning current density is still larger, the writing power consumption is large, VCMA-MTJ needs to accurately control the time of applying voltage, the circuit clock control requirement is higher, the VCMA-MTJ writing error rate is high, and the reliability is low, the application provides a method for forming a magnetic tunnel junction.
The write operation relies on the pulse voltage, the current of the tunnel junction is extremely small, therefore, the write power consumption is extremely low, the barrier layer of the tunnel junction, namely the tunneling layer, is not damaged, the pulse time is related to the intensity of the applied pulse voltage, the pulse time is not required to be accurately controlled, the pressure of a clock circuit is reduced, and the reliability is improved.
In order to make the technical solution of the present application clearer and easier to understand, the method for forming the magnetic tunnel junction of the present application will be described below with reference to specific embodiments.
Fig. 1 is a flowchart of a method for forming a magnetic tunnel junction according to an embodiment of the present application, and fig. 2A to 2B are schematic structural diagrams corresponding to a series of processes of the method for forming a magnetic tunnel junction according to an embodiment of the present application, and referring to fig. 1 and fig. 2A to 2B, the method includes:
s101: a substrate 10 is provided, said substrate 10 being formed with a bottom electrode 20.
S102: a magnetic tunnel junction 30 is formed on the bottom electrode 20, the magnetic tunnel junction 30 includes a vertical pinning layer 31, a first magnetic layer 32, a tunneling layer 33, a second magnetic layer 34, and an antiferromagnetic layer 35 sequentially stacked from bottom to top, the first magnetic layer 32 and the second magnetic layer 34 have vertical anisotropy, and the antiferromagnetic layer 35 forms an interface bias field at the interface of the second magnetic layer 34.
In the embodiment of the present application, the first magnetic layer 32 and the second magnetic layer 34 are formed of a ferromagnetic material having perpendicular anisotropy, and the ferromagnetic material may be an elemental ferromagnetic material, an alloy ferromagnetic material, a metal compound having magnetic properties, or the like, and may be a soft magnetic material such as Co, fe, ni, coFeB or Heusler alloy. The first magnetic layer 32 and the second magnetic layer 34 may be the same or different materials, depending on the particular needs. First, theDisposed under a magnetic layer 32 is a vertical pinning layer 31, which may be, for example, (Co/Pt) n Multilayer films are artificial antiferromagnetics, etc., to fix the magnetic moment of the first magnetic layer 32, i.e., the reference layer.
The antiferromagnetic layer 35 may be formed of antiferromagnetic material. In a magnetic material in which atomic spins are exchanged to exhibit an even arrangement, there is an antiferromagnetic exchange interaction between adjacent atoms, and the spins are arranged antiparallel, so that the magnetic moments are in an ordered state, but the total net magnetic moment is zero when not acted upon by an external field, and the magnetically ordered state is antiferromagnetic. As an example of the present application, the antiferromagnetic layer 35 may be formed of IrMn, ptMn, or FePt, but of course, the antiferromagnetic layer 35 may also be formed of a pure metal material such as α -Mn, cr, or the like.
In particular implementations, the interface between the second magnetic layer 34 and the antiferromagnetic layer 35 forms a "ferromagnetic/antiferromagnetic" interface upon which an interface bias field is generated that can replace the applied magnetic field. The magnetic tunnel junction finishes magnetic moment overturning under the action of the interface bias field and the spin Hall effect, and data writing is realized.
Further, the magnetic tunnel junction 30 may be made elliptical in a patterned manner when formed. The direction of the interface bias field formed by the antiferromagnetic layer 35 in the magnetic tunnel junction 30 at the interface with the second magnetic layer 34 is along the minor axis of the ellipse. As shown in fig. 3, which shows the shape of a magnetic tunnel junction, in this example, an oval shape with its in-plane anisotropy axis along the major axis of the oval, such as the x-axis in fig. 3, when a voltage greater than the forward threshold voltage V is applied to the tunnel junction c When the voltage is sufficiently long, the magnetic moment of the second magnetic layer 34 will be flipped from the direction perpendicular to the plane to the long axis. The positive threshold voltage refers to a voltage at which the perpendicular anisotropy disappears.
The interface bias field direction formed by the antiferromagnetic layer 35, such as an IrMn layer, at the interface with the second magnetic layer 34 is along the minor axis of the ellipse, such as the y-axis in fig. 3. When the applied voltage is removed, the easy axis of the second magnetic layer 34 returns to the vertical direction, and the moment of the second magnetic layer 34 will deterministically flip to the same or opposite direction as the easy axis due to the presence of the interface bias field, which breaks the time reversal symmetry.
The following description is made in connection with a specific example.
Referring to the schematic diagram of moment inversion shown in FIG. 4, assume initially that the direction of the moment of the second magnetic layer 34, such as CoFeB (CFB for short), in the magnetic tunnel junction 30 is positive along the z-axis, and a voltage V is applied at time t, where V.gtoreq.V c The perpendicular anisotropy of the CFB is vanished, at this time, the CFB is subjected to the combined action of demagnetizing energy and IrMn bias field (which is assumed to be applied by external magnetic field annealing in the positive y direction when the IrMn layer is grown), and since the equivalent magnetic field of the demagnetizing energy is larger than the bias field, the equilibrium position of the CFB magnetic moment will be along the x-axis, and the IrMn bias field in the positive y direction breaks the time inversion symmetry of the x-axis, so that after a period of time, the magnetic moment direction of the CFB will be oriented to be inverted to the-x direction, the length of time is related to the magnitude of the applied voltage, and the smaller the voltage the shorter the time. At this time, the applied voltage is removed and the vertical anisotropy of the CFB is restored, and the magnetic moment is flipped to the-z direction under the action of the bias field in the positive y direction and the vertical anisotropy field in the z direction. Thus, by this operation, the magnetic moment of the CFB is flipped from the +z direction to the-z direction. And vice versa.
In some possible implementations, the magnetic tunnel junction 30 may further include a test electrode layer located above the antiferromagnetic layer 35 for testing the magnetoresistance of the magnetic tunnel junction. In practical use, the test electrode layer may be formed of a metal material, and as an example, ru may be used.
Further, a high-K dielectric layer for protecting the antiferromagnetic layer 35 and a top electrode for coacting to provide a voltage to the magnetic tunnel junction may also be provided on the test electrode layer.
In view of the foregoing, the embodiments of the present application provide a method for forming a magnetic tunnel junction, which includes providing a substrate, where a bottom electrode is formed on the substrate, and forming a magnetic tunnel junction on the bottom electrode, where the magnetic tunnel junction includes a vertical pinning layer, a first magnetic layer, a tunneling layer, a second magnetic layer, and an antiferromagnetic layer sequentially stacked from bottom to top, where the first magnetic layer and the second magnetic layer have vertical anisotropy, and where an interface bias field is formed at a junction between the antiferromagnetic layer and the second magnetic layer, and magnetic moment inversion is completed under the action of the interface bias field and spin hall effect, so as to implement data writing. The write operation relies on pulse voltage, the current passing through the tunnel junction is extremely small, so that the power consumption is extremely low, the barrier layer of the tunnel junction is not damaged, the pulse time is related to the intensity of the applied pulse voltage, the magnetic moment directional overturning can be realized without precisely controlling the pulse time, the pressure of a clock circuit is reduced, and the reliability is improved.
For S102 described above, the present application further provides a specific implementation manner. Specifically, growing each material layer of the magnetic tunnel junction sequentially; patterning of the material layers of the magnetic tunnel junction is performed to form the magnetic tunnel junction.
For ease of understanding, the detailed implementation procedure of S102 will be described in detail with reference to the accompanying drawings. Wherein, S102 may be specifically implemented by the following steps:
the first step: a bottom electrode, a magnetic tunnel junction MTJ, and an antiferromagnetic layer are deposited.
In this example, the bottom electrode may be Au, the MTJ may include a CFB/MgO/CFB three-layer structure, and the antiferromagnetic layer may be any one of IrMn, ptMn, or FePt, and fig. 5A and 5B show a schematic cross-sectional view and a top view, respectively, of this step.
And a second step of: the bottom electrode and junction region of the magnetic tunnel junction are lithographically formed.
In particular implementations, the magnetic tunnel junction may be patterned lithographically, and fig. 6A and 6B show cross-sectional schematic and top views, respectively, of this step.
And a third step of: filling the insulating medium and performing test electrode deposition and patterning.
Specifically, after the bottom electrode and junction regions are lithographically etched, the SiO may be filled 2 Performing isolation protection, wherein the insulating medium SiO 2 Flush with IrMn; then, test electrode deposition is carried out again, and the test electrode deposition is carried out by a photoetching modeThe rows are patterned, wherein the test electrodes may be formed of Ru, with a Ru layer covering at least IrMn. Fig. 7A and 7B show a schematic cross-sectional view and a top view, respectively, of this step.
Fourth step: and depositing and patterning a high-K dielectric layer.
After forming the test electrode, a high-K dielectric layer is also required to be formed, wherein the high-K dielectric layer can be MgO or Al 2 O 3 Or HfO 2 Etc. In this example, mgO is used to form a high-K dielectric layer, and FIGS. 8A and 8B show schematic cross-sectional and top views, respectively, of this step.
Fifth step: filling an insulating medium and forming holes.
Similar to the filling of the insulating medium in the third step, the filling of SiO2 is flush with MgO. Then, the SiO2 is opened by etching, as shown in fig. 9A and 9B.
Sixth step: and (5) depositing and patterning a top electrode.
In this embodiment, the top electrode may be formed using Au, specifically, au is filled first, and then Au is subjected to photolithography to form a pattern as shown in fig. 10A and 10B, and as shown in fig. 10B, a voltage is applied between Vcc and GND, a VCMA pulse voltage is supplied, and a test voltage is supplied between Vread and GND for measuring the magnetoresistance of the MTJ.
Wherein, when forming the first magnetic layer, the tunneling layer, the second magnetic layer, the antiferromagnetic layer and other film layers of the magnetic tunnel junction, the magnetic tunnel junction can be formed by any one of magnetron sputtering, molecular beam epitaxy or pulse laser deposition.
The method for forming the magnetic tunnel junction provided in the embodiment of the present application is described in detail above, and in addition, the present application further provides a magnetoresistive random access memory formed by the method for forming the magnetic tunnel junction, as shown in fig. 11, the magnetoresistive random access memory includes:
a substrate 1101;
a bottom electrode 1102 located over the substrate;
a magnetic tunnel junction 1103 over the bottom electrode 1102, the magnetic tunnel junction 1103 comprising a vertical pinning layer 1104, a first magnetic layer 1105, a tunneling layer 1106, a second magnetic layer 1107, and an antiferromagnetic layer 1108 stacked in that order from bottom to top, the first magnetic layer 1105 and the second magnetic layer 1107 having a vertical anisotropy, the antiferromagnetic layer 1108 having an interface bias field at the interface of the second magnetic layer 1107.
Optionally, the magnetic tunnel junction 1103 has an elliptical shape and the direction of the interface bias field is along a short axis of the ellipse.
Optionally, the antiferromagnetic layer 1108 includes IrMn, ptMn, or FePt.
Optionally, the magnetic tunnel junction 1103 further includes: a test electrode layer 1109 on the antiferromagnetic layer 1108.
Specifically, a high-K dielectric layer 1110 is further included on the test electrode layer 1109, a top electrode 1111 is formed on the high-K dielectric layer, a VCMA voltage is loaded between the bottom electrode 1102 and the top electrode 1111 for realizing magnetic moment flipping, and a magnetic tunnel junction performance test voltage is loaded between the bottom electrode 1102 and the test electrode layer 1109 for measuring the magnetoresistance of the magnetic tunnel junction.
In a specific application, the MRAM described above may be arranged in an array form, forming a memory array of the MRAM, which may be independent or integrated in a device, such as a processor, an application specific integrated circuit or a system on a chip, etc., using the MRAM memory array.
In this specification, each embodiment is described in a progressive manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments. In particular, for embodiments of the device structure, since they are substantially similar to the method embodiments, the description is relatively simple, and reference is made to the description of portions of the method embodiments where relevant.
The foregoing is merely a preferred embodiment of the present invention, and the present invention has been disclosed in the above description of the preferred embodiment, but is not limited thereto. Any person skilled in the art can make many possible variations and modifications to the technical solution of the present invention or modifications to equivalent embodiments using the methods and technical contents disclosed above, without departing from the scope of the technical solution of the present invention. Therefore, any simple modification, equivalent variation and modification of the above embodiments according to the technical substance of the present invention still fall within the scope of the technical solution of the present invention.

Claims (8)

1. A method of forming a magnetic tunnel junction, comprising:
providing a substrate, wherein the substrate is formed with a bottom electrode;
forming a magnetic tunnel junction on the bottom electrode, wherein the magnetic tunnel junction comprises a vertical pinning layer, a first magnetic layer, a tunneling layer, a second magnetic layer and an antiferromagnetic layer which are sequentially laminated from bottom to top, the first magnetic layer and the second magnetic layer have vertical anisotropy, and an interface bias field is formed at the interface of the antiferromagnetic layer and the second magnetic layer;
the magnetic tunnel junction is elliptical in shape and the direction of the interface bias field is along the minor axis of the ellipse.
2. The method of claim 1, wherein forming a magnetic tunnel junction on the bottom electrode comprises:
sequentially growing each material layer of the magnetic tunnel junction;
patterning of the material layers of the magnetic tunnel junction is performed to form the magnetic tunnel junction.
3. The method according to any one of claims 1 to 2, wherein the antiferromagnetic layer comprises any one of IrMn, ptMn and FePt.
4. The method according to any one of claims 1 to 2, wherein the first magnetic layer, the tunneling layer, the second magnetic layer, and the antiferromagnetic layer are formed by:
magnetron sputtering, molecular beam epitaxy, or pulsed laser deposition.
5. The method of any of claims 1 to 2, wherein the magnetic tunnel junction further comprises:
a test electrode layer on the antiferromagnetic layer.
6. The method of claim 5, wherein the magnetic tunnel junction further comprises: a high-K dielectric layer and a top electrode over the test electrode layer.
7. A magnetoresistive random access memory, comprising:
a substrate;
a bottom electrode over the substrate;
a magnetic tunnel junction over the bottom electrode, the magnetic tunnel junction comprising a vertical pinning layer, a first magnetic layer, a tunneling layer, a second magnetic layer, and an antiferromagnetic layer laminated in that order from bottom to top, the first magnetic layer and the second magnetic layer having a vertical anisotropy, the antiferromagnetic layer having an interface bias field at an interface with the second magnetic layer;
the magnetic tunnel junction is elliptical in shape and the direction of the interface bias field is along the minor axis of the ellipse.
8. The memory of claim 7 wherein the magnetic tunnel junction further comprises: a test electrode layer on the antiferromagnetic layer.
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