JPS61248621A - Performance evaluation device for multiplex da converter - Google Patents

Abstract

PURPOSE:To allow the titled device to evaluate performance such as linearity error, glitch and conversion speed by providing a digital signal generating circuit generating >=2 digital data shifted to each other and a switching signal, a test DA converter inserting part and a display device. CONSTITUTION:A digital signal generating circuit 201 generating shifting >=2 digital data 21, 22 and a switching signal 23 switching digital data, a section inserted with a sample DA converter (DAC) 202 inputting digital data 21, 22 and the switching signal 23, and the display device 203 displaying a video signal subjected to DA conversion are provided. For example, the digital signal generating circuit 201 generates two digital inputs 21, 22 and the switching signal 23 and an analog signal 24 from the test DAC 202 is displayed on the display device 203 such as a display device. Thus, the performance of the multiplex DAC using >=2 digital inputs and using the switching signal to change over the conversion output such as linearity error, glitch and conversion speed is evaluated intuitively and easily.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a performance detailing device for a DA converter (hereinafter abbreviated as DAC), and in particular, provides two or more digital inputs,
The present invention relates to a performance evaluation device for a multiplex DAC that switches conversion outputs using a switching signal.

[Background of the invention]

In the conventional DAC performance evaluation device, as shown in FIG. 1, digital data 11 output from a digital signal generation circuit 101 is converted into an analog signal 12 by a test DAC 102, and displayed on a display bag N103 such as a display. be done. However, there is a device that provides details of the performance (linearity error, glitch, conversion speed, etc.) of a multiplex DAC that prepares n or more digital inputs (n > 2) and extracts analog signals using switching signals. There wasn't.

[Purpose of the invention]

An object of the present invention is to provide a performance evaluation device for a multiplexed DAC.

[Summary of the invention]

An outline of the present invention is shown in FIG. 2 for the case of n=2. The test multi-register type DAC is shown at 202. Two digital inputs 21. from the digital signal generation port w+201.
22 and a switching signal 23 are generated. The analog signal 24 of the DAC under test is displayed on a display bag w203 such as a display. The case where n=2 has been explained above, but
The same applies to the case where n>-3.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to FIG. FIG. 3 is a detailed diagram of the digital signal generation circuit 201 of FIG. 2. 301 is a memory for one frame of the display device. A memory read signal φ6 is sent from the control circuit 302.
As a result, the contents of two consecutive pixels are set in two latches 303. These two data D. Take 1. 2 is distributed to two latches 303 and 304 at different times using clocks φ1 and φ2. These timings are
As shown in the figure. As a result, the outputs D1°D2 of two consecutive pixels,
The timing with the switching signal φ3 of the multi-presence type DAC is such that the switching signal is input every half cycle of data, as shown in FIG.

FIG. 5 is a diagram showing a method for evaluating linearity errors and glitches. In the same figure (a), out of the three primary colors of red, green, and blue, for example, two DACs of red and green are displayed with their values changed from 1 full scale to + full scale. be. FIG. 6(b) shows a part of the video signal, which is changed from -full scale to +full scale during the blanking signal. The video signal for one frame is stored as a digital signal in the memory 301. A digital signal is read from the memory 301, converted to a video signal by the D multiplex type AC under test, and displayed on a display device. To evaluate the linearity error,
It is sufficient to check whether the density changes uniformly from left to right as shown in FIG. To examine the glitch in detail,
If vertical stripes are not visible in the figure (a), it is normal. Note that a counter may be used instead of the memory 301.

FIG. 6 is a diagram showing a method for evaluating conversion speed in detail. In the same figure (, ), vertical stripes are displayed in a display device with the thickness increasing from left to right. Figure (b) shows a part of the video signal, and during the blanking signal,
The pulse width increases from left to right.

The video signal for one frame is stored as a digital signal in the memory 301. A digital signal is read from the memory 301, converted to a video signal by the multiplex DAC under test, and displayed on a display device.

To evaluate the conversion speed, the vertical stripes become thinner as they go from right to left, as shown in FIG. 5A, but the point where they become invisible indicates the limit of the conversion speed.

Note that the display speed of the display device is assumed to be sufficiently higher than the conversion speed of the DAC.

Furthermore, the clock frequency of the master clock of the control circuit 302 can be made variable depending on the conversion speed of the multiplexed DAC under test.

〔Effect of the invention〕

According to the present invention, the multi-pressure type D provides two or more digital inputs and switches the conversion output using a switching signal.
AC performance, such as (1) linearity error (2) glitch (3) conversion speed, etc., can be evaluated intuitively and easily.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a conventional DAC performance evaluation device, FIG. 2 is a block diagram of a multi-pressure type DAC performance evaluation device, and FIG. 3 is a block diagram of a multi-pressure type DAC performance evaluation device according to an embodiment of the present invention. 4 is a detailed diagram of the evaluation device 201, FIG. 4 is a timing chart in FIG. 3, FIG. 5 is a diagram showing a method for evaluating linearity errors and glitches, and its signal waveform diagram, and FIG. FIG. 2 is a diagram showing a method for performing the same and a signal waveform diagram thereof. 21.22...□Digital data, 23...Analog signal, 201...Digital signal generation circuit, 20
2... Test multiplex type DAC1203... Display device.

Claims (1)

[Claims] In a device for evaluating the performance of a multiplex type DA converter that prepares two or more digital inputs and switches the conversion output using a switching signal, a switching signal that shifts two or more digital data mutually and switches the digital data is used. A multi-purpose video signal generator comprising: a digital signal generating circuit that generates a digital signal; a section into which a test DA converter is inserted into which the digital data and switching signals are input; and a display device that displays the DA-converted video signal. Performance evaluation device for Plex type DA converter.