JPS612481A - Fleming's code detector - Google Patents

Abstract

PURPOSE:To generate detecting signals continuously and to attain stable reception by forecasting the appearance of a Fleming's code detecting signal at the succeeding point from the past receiving condition and internally generating said detecting signal at the same timing as the past existing timing. CONSTITUTION:The same FC signal detecting signal FD as an conventional one is inputted to a superposed position detecting means 11. A time width detecting circuit 9 measures a time from the appearance of a horizontal synchronizing signal Sh to that of the signal FD and outputs the measured result. An FC existence detecting circuit 10 turns on its output signal if the FC signal exists in a horizontal scanning section, and turns off in case of absence. An arithmetic control means 16 inputs data from the detecting means 11, and if the FC signal exists at a fixed probability or more within a past fixed period in each horizontal scanning section, outputs a secondary FC signal detecting signal FD' from a signal generating means 14 independently of the detection of the signal FD in the succeeding same section. If there is no said existence, the signal inhibits the output of the signal FD', the average value of time delay between the signals Sh and FC is calculated and a pulse signal is generated as the signal FD' from the pulse generating circuit 12 at the similar timing.

Description

[Detailed Description of the Invention] Industrial Field of Application The present invention provides character and graphic information different from a normal video signal as a digital data signal (hereinafter referred to as a character signal) during a vertical retrace interval of a television signal. This invention relates to a method for reproducing a framing signal on the receiving side of a teletext broadcast that is superimposed and transmitted.

Conventional configuration and its problems First, the format of the character signal will be explained using FIG.

FIG. 1 shows the format of a character signal in one horizontal scanning section. The first 6 bits of glue is printed, the run-in signal (C
This is called the RI signal) and is used to synchronize the bits of the subsequent data, and the next 8 bits are used for framing.
It is called a code signal (FC signal) and is used to synchronize bytes of subsequent data. How to detect and utilize CRI and FC signals is extremely important in order to receive data correctly.

The basic configuration of the conventional FC signal detection method is shown in FIG. In Figure 2, 1 is an input terminal for a binary serial data signal, 2 is an input terminal for a clock signal reproduced from a CRI signal for sampling the data signal, and 3 is a serial-to-parallel converter with an 8-bit output terminal. 4 is a matching circuit having an 8-bit input terminal, and 5 is an output terminal for an FC signal detection signal.

In FIG. 2, the data signal input from terminal 1 is sent to output terminals PD0 to PD7 according to the timing of the clock signal from terminal 2 by serial-parallel conversion circuit 3.
are output while being shifted sequentially. Here, the - number circuit 4 outputs the output terminal 5 when the same data as the FC signal is input.
The FC signal detection signal is output to. In the teletext reception process, the subsequent data signal from input terminal 1 is divided into 8 bits using the clock signal from output terminal 2 and processed based on the output signal from output terminal 5. 0 Our country's literary broadcasting uses 1110o as an FC signal.
1o11' (transmission order) is used, but the timing of each signal in Figure 2 is shown in Figure 3. In general, the FC signal can be detected by detecting and correcting a 1-bit error in the FC signal. 4 matching circuits are constructed as shown in FIG.

The FC signal indicates the division of serial data into 8-bit units and is extremely important, and the operation of the FC signal detection circuit directly affects the performance of the teletext receiver.

However, in the conventional example shown in Figure 2, if noise mixes into the FC signal part and an error of 2 binoto or more occurs, the FC signal cannot be detected even if the waveform of the subsequent data part is normal. There is a serious problem that data is not imported. In other words, the ability to capture data in the horizontal scanning section depends on the detection of a mere 8-bit FC signal, and with the pattern transmission method, a phenomenon called line dropout on the screen often occurs in weak electric field areas or in areas with a lot of noise. Can be seen.

Purpose of the Invention In order to solve the above-mentioned problems, the present invention focuses on the continuity of the sent character signals, and utilizes the continuity of the presence of the FC signal and the continuity of the superimposed position to eliminate the effects of noise and waveform distortion. This is an attempt to detect a stable FC signal that is not easily affected.

Structure of the Invention The basic structure of the framing code detection method of the present invention is as follows:
Data indicating the presence of an FC signal detection signal obtained by the same means as in the conventional example and time interval data from the horizontal synchronization signal to the FC signal are accumulated in chronological order, and calculations and discrimination are performed to detect the FC signal for a certain period in the past. is above a certain probability, it is predicted that the character signal will be superimposed in the same way in the next same horizontal scanning section, and an FC signal detection pulse will be internally generated and output at the same timing as in the past, and the FC signal will be detected for a certain period in the past. The feature is that it is configured to stop internally generating the FC signal detection pulse, anticipating that if there is no signal, a character signal will be superimposed on the next same horizontal scanning section. Similar framing code detection means 9 is constructed with superimposition position detection means, pulse signal generation means, and arithmetic control means.

DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 4 shows an example of the configuration of the present invention. In FIG. 4, 1.2, 3, and 4.5 are the same as in FIG. These are output terminals, SD is a data signal, CK is a clock signal, FD is a primary FC signal detection signal, and 3.4 constitutes the FC signal detection means 6. 7 is the input terminal of the vertical synchronization signal, 8 is the input terminal of the horizontal synchronization signal, Sv is the vertical synchronization signal, sh is the horizontal synchronization signal, and 9 is the time delay from the horizontal synchronization signal sh to the primary FC signal detection signal FD. A time width detection circuit 10 detects the first-order F in each horizontal scanning section.
This is an FC presence detection circuit for temporarily storing whether or not the C signal detection signal FD is present. 12 is a pulse generation circuit that generates a constant pulse signal with an arbitrary time delay from the horizontal synchronizing signal sh by an external control signal, and 13 is a gate control that allows the pulse signal to pass only in an arbitrary horizontal scanning section by an external control signal. In the circuit, 12 and 13 constitute a pulse signal generating means 14, and the output terminal of the pulse signal generated here is connected to 15, a secondary FC signal which newly reproduces the internally generated pulse signal outputted to 15. Let it be the detection signal FD'. 16 uses the output signal from the superimposition position detection means 11, the vertical synchronization signal Sv, and the horizontal synchronization signal sh as input signals;
This is an arithmetic control means that uses the control signal of the pulse signal generating means of No. 4 as an output signal.

The operation of the framing code detection circuit configured as described above will be explained below.

The operation of the FC signal detection means 6 is the same as that of the conventional example shown in FIG.
is input. The time width detection circuit 9 receives the horizontal synchronization signal sh and the FC signal detection signal FD as input signals, and receives the horizontal synchronization signal s.
Measure the time from h to the primary FC signal detection signal FD,
Output that data. Here, as a specific example of how to define the time width, for example, a pulse with a frequency sufficiently higher than the horizontal synchronization frequency is generated, and
By pulse counting up to D, time width data can be obtained. Further, the FC presence detection circuit 10 also receives a horizontal synchronization signal sh.
and the primary FC signal detection signal FD as input signals, and if there is an FC signal in that horizontal scanning section, the output signal is turned ON, and if not, it is turned OFF.

Here, as a specific example of the FC presence detection circuit 1o, it can be realized by using, for example, a flip-flop circuit and using sh as a reset signal and FD as a set signal.

Then, the arithmetic control means 16 identifies the horizontal scanning section number from the vertical synchronizing signal Sv and the horizontal synchronizing signal sh, and detects the presence or absence of the FC signal from the superimposition position detecting means 11 for each horizontal scanning section, and determines whether or not the FC signal is superimposed. Timing data is input, and the pulse generation circuit 12 is time-controlled so that pulse signals are continuously generated at the same timing as the input time interval, and in the same horizontal scanning interval as the input FC signal presence data. The gate control circuit 13 is controlled so that the pulse signal from 12 is output.Here, the arithmetic control circuit 16 controls the gate control circuit 13 so that the pulse signal from , the pulse signal generating means 14 outputs the secondary FC signal detection signal FD' by predicting that a character signal will be superimposed in the next same horizontal scanning section regardless of whether or not the primary FC signal is detected. If there is no FC signal continuously for a certain period of time in the past, it is assumed that there is no character signal in the horizontal scanning section, and the gate of the pulse signal generating means 14 is controlled so that the secondary FC signal detection signal FD' is not output. It controls the control circuit 13, cumulatively averages the input time width data for a certain period of time, calculates the average value of the time delay between the horizontal synchronizing signal sh and the FC signal, and generates a pulse from the pulse generating circuit 12 at the same timing. Control the generation of signals. The secondary FC signal detection signal FD/ obtained as described above is the FC signal detection signal obtained in the present invention.

In the above explanation, it has been stated that the data obtained from the time width detection circuit 9 is simply cumulatively averaged for a certain period of time by the arithmetic control means 16, but abnormal values due to noise etc. are identified and eliminated when reading the data. Furthermore, it is possible to make the period for determining the degree of data dispersion and cumulatively averaging it variable. Specifically, we eliminate singular values that are unusually large or small from the past average values of the data, and when there is large variation in data due to weak electric fields, we lengthen the accumulation period and compare with strong electric fields. When the variation in the output signal is small, the fluctuation of the output signal becomes small and stable by shortening the accumulation period.In the embodiment shown in FIG. Therefore, it is possible to share the data processing microprocessor of the teletext receiver, and other parts can be realized relatively easily with a small number of parts, and it is easy to integrate into LSI.
Its practical effects are significant.

Effects of the Invention The framing code detection method of the present invention predicts the appearance of a framing code detection signal at the next point in time based on past reception conditions, and internally generates it at the same timing as the past existence timing. In this method, even if the framing code is detected only intermittently, continuous detection signals can be generated and stable reception is possible. If the data part of a character signal contains an error 9 correction code, it is possible to correct the error to a considerable extent if only the data part is considered, but if the framing code signal is detected and the data is captured, As will be discussed later, the seven-raming code detection method of the present invention is very effective in such cases as well.

[Brief explanation of drawings]

FIG. 2 is a timing diagram for explaining FIG. 2, and FIG. 4 is a configuration diagram of an embodiment of the present invention. 1... Data signal input terminal, 2... Clock signal input terminal, 3... Serial-to-parallel conversion circuit, 4... Matching circuit, 6...・・・・・・
FC signal detection signal output terminal. child, 6...FC signal detection means, 7...
Vertical synchronization signal input terminal, 8... Horizontal synchronization signal input terminal, 9... Time width detection circuit, 10...
... FC presence detection circuit, 11 ... Superposition position detection means, 12 ... Pulse generation circuit, 13 ...
...Gate control circuit, 14...Pulse signal generation means, 15...Pulse signal output terminal, 16...
Arithmetic control means, SD...data signal, CK...
...Clock signal, FD...1st FC signal detection signal, FD'...2nd FC signal detection signal, S
v...Vertical synchronization signal, sh...Horizontal synchronization signal. Name of agent: Patent attorney Toshio Nakao and 1 other person 1st
Figure 3

Claims (3)

[Claims] (1) A means for detecting a framing code signal from a serial data signal obtained from a data/clock demodulation circuit for a teletext signal, and a superimposition method for measuring the time width from a horizontal synchronizing signal to a position at which a framing code signal is superimposed. A position detecting means, a pulse signal generating means for generating a constant pulse signal with a specified time delay from a horizontal synchronization signal in a specified horizontal scanning section, and an arithmetic control means, wherein the arithmetic control means detects a constant pulse signal in a specified horizontal scanning section with a specified time delay. The framing code inputs and calculates data on the presence or absence of a framing code signal and the time width from the horizontal synchronizing signal, and outputs the generated pulse signal by controlling the pulse signal generating means as a detection pulse of the framing code signal. Code detection device. (2) The arithmetic control means stores whether or not a framing code signal is input for each horizontal scanning section, and if the framing code signal is present at a predetermined rate or more during a certain period in the past in each horizontal scanning section, it will be used for the next vertical scanning. The detection pulse of the framing code signal is output from the pulse signal generation means regardless of whether or not there is an input in the section, and if the framing code signal is not input more than a certain number of times in the past certain period in each horizontal scanning section, the next vertical scanning 2. The framing code detection device according to claim 1, wherein the framing code detection device is configured to stop the pulse generation from the pulse signal generation means during the scanning period. (3) The arithmetic control means removes abnormal values from the data obtained from the superimposed position detection means for each horizontal scanning section, accumulates and averages the data for a certain period of time, and controls the pulse signal generation means at certain time intervals, The framing code according to claim 1, characterized in that the pulse is generated in a horizontal scanning section corresponding to the input of the framing code signal with a time delay obtained from the superimposition position detection means. Detection device.